JPS5832548B2 - Sampling and binary conversion method for analog facsimile signals - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an algorithm for binarizing analog amplitude image signals such as facsimile signals, that is, a sampling binarization method for analog facsimile signals.

Conventionally, in this type of algorithm, the binarization determination level L
is set, and the sampling amplitude X is binarized as 0 (or 1) when X≦L, and as ■ (or O) when x>L.

However, as shown in Figure 1, A2, the amplitude of a thin line parallel to the main scanning direction that has a width narrower than the sub-scanning resolution pitch in the original facsimile transmission can be 1/2 or less, so it is difficult to convert it into a binary image. If the judgment level is set to 1/2 of the maximum amplitude value, thin lines in the main scanning direction will be reproduced/good, and in this case, if the binarization judgment level is simply moved to the white level side, noise etc. The problem was that image quality was likely to deteriorate due to the effects.

In order to eliminate the drawbacks of the conventional example, the present invention is characterized in that the current binarized output is determined by comprehensively determining the current sampling value and the sampling values before and after it. The object of the present invention is to provide a sampling binarization method for analog facsimile signals, which reproduces thin lines in the main scanning direction as binary output and minimizes the influence of noise and the like.

Hereinafter, embodiments will be described in detail with reference to the drawings.

FIG. 2 shows an embodiment of the present invention, where 1 is a signal input terminal, 2 is an A/D converter, and the signal is converted into an n-bit digital value.

3 is a buffer memory, A M, ......A-1
, Ao, A1, . . . , AN, and each block has a capacity of n bits, so the total capacity is (M+N+l)X n bits.

4 is a microprocessor, 5 is an output buffer, 6 is an oscillator, and 7 is a binary output terminal.

In addition, Fig. 3A shows the input waveform and the binarization determination level L1.
．． It shows the relationship of L2, and the opening in Figure 3 is M=1, N=
The binarized output waveform at the time of 2 is reduced.

Next, the operation of this embodiment will be explained.

First, when a waveform defined as shown in FIG. It is accumulated in 3.

Further, the microprocessor 4 is a block A of a buffer memory.

If this information is less than level L, Riki Kuroyama rOJ is output to the output buffer 5 and level L.
If it is a dog than 1, blocks A1 to ANM and A, to A
It is tested whether all of M are smaller than level L2 and larger than level L1.

As a result of this test, if the level is lower than the level L2 and if the level is a dog than the level L1, Riki Kuroyama "O" is output, and if not, Riki Hakuyama F-11 is output.

The oscillator 6 generates a clock for sampling the input signal, starts the A/D converter 2, and also performs timing for the buffer memory 3, processor 4, and output buffer 5, and outputs data from the 2f conversion output terminal 7. Outputs a binarized signal.

In addition, in the above explanation, the binarization judgment level is
L2, sample value and level L1. The algorithm was constructed by determining the size of L2, but by using two appropriate levels L, , , L12g and L21°L22, L, , <A.

<L, 2, L21<Ai<L22 (i\0).

As explained above, the present invention takes advantage of the property that when an analog waveform is binarized, a thin black line signal in the main scanning direction is generated continuously (... This method has the advantage of reducing the influence of noise and the like and improving image quality, and this effect is particularly remarkable for character patterns.

[Brief explanation of the drawing]

FIG. 1A is a diagram showing an example of thin lines in the main scanning direction.
FIG. 1 is a diagram showing the waveform of the thin line in the main and main scanning directions, FIG. 2 is a block diagram of an embodiment of the present invention, and FIG. and judgment level L,
, L2 is shown, and the opening in Figure 3 is 2 in Figure 2.
FIG. 3 is a diagram showing an example of a value-converted output waveform (when M-1, N=2). 1...Signal input terminal, 2...A-D converter, 3...Buffer memory, 4...
Microprocessor, 5...Output buffer, 6
...Oscillator, 7...Binary signal output terminal.

Claims (1)

[Claims] 1. An amplitude value X at a reference sampling point in a method in which an analog facsimile signal is sampled and the binarized output is set to "0" and "1". is for amplitude judgment levels L1□, L12, I'tt≧
When x□, “0”; when L12≦x□, “1”
, L1□〈Xo<L12, and the amplitude values of the sampling points after N pits and before M pits from the reference sampling point X-ya...XI, Xl...
-XN are all amplitude judgment levels L21, L22, L2□<xi<L22 (i = -M,...
. . -1, 1, . . . N), a sampling binarization method for an analog facsimile signal is characterized in that it outputs "0".