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JPS5832800B2 - Manufacturing method of printed wiring board with metal core - Google Patents
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JPS5832800B2 - Manufacturing method of printed wiring board with metal core - Google Patents

Manufacturing method of printed wiring board with metal core

Info

Publication number
JPS5832800B2
JPS5832800B2 JP15363279A JP15363279A JPS5832800B2 JP S5832800 B2 JPS5832800 B2 JP S5832800B2 JP 15363279 A JP15363279 A JP 15363279A JP 15363279 A JP15363279 A JP 15363279A JP S5832800 B2 JPS5832800 B2 JP S5832800B2
Authority
JP
Japan
Prior art keywords
metal core
final product
printed wiring
wiring board
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15363279A
Other languages
Japanese (ja)
Other versions
JPS5676596A (en
Inventor
紀久雄 宍戸
悦児 森本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP15363279A priority Critical patent/JPS5832800B2/en
Publication of JPS5676596A publication Critical patent/JPS5676596A/en
Publication of JPS5832800B2 publication Critical patent/JPS5832800B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Insulated Metal Substrates For Printed Circuits (AREA)

Description

【発明の詳細な説明】 本発明は金属芯入り印刷配線板の製造法に関し、詳しく
はスル−ホールを有し、表面を絶縁化処理した金属芯基
板に印刷配線加工により導電回路を形成する方法に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a printed wiring board with a metal core, and more specifically, a method of forming a conductive circuit by printing wiring processing on a metal core board having through-holes and having an insulated surface. It is related to.

金属芯入り印刷配線板は金属芯基板を全面絶縁処理する
必要性から加工サイズとしては、最終製品サイズで作業
を行なうのが普通とされて居り印刷配線加工により導電
回路を形成する際の電解メッキ処理において最終製品周
端面部に電解メッキ処理が付着し導電回路間のショート
が発生する欠点を持っていた。
Printed wiring boards with metal cores are usually processed to the final product size because it is necessary to completely insulate the metal core board, and electrolytic plating is used when forming conductive circuits through printed wiring processing. During processing, the electrolytic plating process adheres to the peripheral end surface of the final product, resulting in a short circuit between conductive circuits.

このため、最終製品周端面部に電気メッキを付着させな
いために最終製品周端面部へレジストを塗布する方法が
とられている。
For this reason, in order to prevent electroplating from adhering to the peripheral end surface of the final product, a method has been adopted in which a resist is applied to the peripheral end surface of the final product.

しかしながら、この方法では非能率的な作業となり、又
レジストのピンホール最終製品外形の複雑化などによる
塗布の困難さなどにより完全に目的を達することができ
ないことが多かった。
However, this method is inefficient and often fails to completely achieve its purpose due to the difficulty of coating due to the complicated external shape of the resist pinhole final product.

一方、レジスト塗布作業を削除する改良された方法とし
て、特開昭5339471がある。
On the other hand, Japanese Patent Laid-Open No. 5339471 discloses an improved method for eliminating the resist coating operation.

かかる方法は金属芯基板の最終製品形状の周辺に連結用
リブを介し間隔をおいて外形枠を配した状態で電気メツ
キ処理を行なう方法である。
This method is a method in which electroplating is performed in a state where outer frames are placed around the final product shape of the metal core substrate at intervals via connecting ribs.

この方法は、最終製品と外形枠との間のすき間を感光性
樹脂フィルムを露光硬化させてカバーさせようとするも
のであるが、露光して硬化する、感光性樹脂フィルムの
性質上スルーホール以外の比較的太きなすき間や、方形
を威す角のあるすき間を露光硬化させると現像後カバー
した部分の感光性樹脂フィルムがひび割れを起したり、
前記方形の角から破れたりすることが多く電解メッキ処
理において、最終製品周端部に電気メツキ液が侵入し保
護すべき部分に電解メッキが付着するため修正作業とし
て電解メッキ前に最終製品周端部へのレジスト塗布作業
を行なわなければならない欠点が尚、つきまとう。
This method attempts to cover the gap between the final product and the outer frame by exposing and curing a photosensitive resin film. If you expose and harden a relatively wide gap or a gap with corners that make a rectangular shape, the photosensitive resin film in the covered area may crack after development.
The corners of the square are often torn, and during electrolytic plating, the electroplating liquid invades the peripheral edge of the final product and the electrolytic plating adheres to the area that should be protected. However, there is still the disadvantage that resist coating work must be carried out on the parts.

従って本発明は、このような点に鑑みてなされたもので
その目的は、導電パターンを電解メッキにより絶縁皮膜
上に形成するに先立って行なわれる最終製品周端部への
レジスト塗布作業を排除する方法を得ることにある。
Therefore, the present invention has been made in view of these points, and its purpose is to eliminate the work of applying resist to the peripheral edge of the final product, which is performed prior to forming a conductive pattern on an insulating film by electrolytic plating. It's about finding a way.

以下図面に従い詳細に説明する。第1図は本発明の一実
施例方法に使用される金属芯入り印刷配線基板の途中工
程の平面図を示す。
A detailed explanation will be given below according to the drawings. FIG. 1 shows a plan view of an intermediate process of manufacturing a printed wiring board with a metal core used in a method according to an embodiment of the present invention.

同第1図に示す様にスルーホール1を有し、表面を図示
しない絶縁度膜で被覆した最終製品形状を或す金属芯基
板2と、この金属芯基板2の最終製品形状の周辺には連
結片3a 、3b 、3cによって所定の間隔4a 、
4b 、4cをおいて設けられた枠体5を有する金属芯
入り印刷配線基板6である。
As shown in FIG. 1, there is a metal core substrate 2 with a through hole 1 and a final product shape whose surface is covered with an insulating film (not shown), and around the final product shape of this metal core substrate 2, A predetermined interval 4a is provided by the connecting pieces 3a, 3b, 3c,
This is a printed wiring board 6 with a metal core, which has a frame 5 spaced apart from each other by 4b and 4c.

第2図は本発明の一実施例方法に使用するスペーサの平
面図を示し、前記第1図の間隔4a、4b。
FIG. 2 shows a plan view of a spacer used in a method according to an embodiment of the present invention, and shows the spacings 4a and 4b of FIG. 1.

4cをそれぞれふさぐ様な形状のスペーサ7a。Spacers 7a each have a shape that blocks each of the spacers 4c.

7b 、7cである。7b and 7c.

次に本発明の工程を含む金属芯入り印刷配線基板の製造
工程の一例を第1図に平面図として示した工程を含めて
第3A乃至第3G図に従がい詳説する。
Next, an example of the manufacturing process of a printed wiring board with a metal core including the process of the present invention will be described in detail with reference to FIGS. 3A to 3G, including the process shown as a plan view in FIG. 1.

同第3A図乃至第3G図は第1図A−A’線に沿う切断
面の円形鎖線部分の一部拡大断面図である。
3A to 3G are partially enlarged cross-sectional views of the circular chain line portion of the cross section taken along the line AA' in FIG. 1.

まず、第1図に示す様に厚さ1〜2朋の平坦な単一の金
属板を打抜き等により加工し、最終製品形状を威す金属
芯基板2と、該基板2の最終製品形状の周辺に連結片3
a 、3b 、3cによって所定の間隔4a 、4b
、4cをおいて枠体5を形成する。
First, as shown in Fig. 1, a single flat metal plate with a thickness of 1 to 2 mm is processed by punching, etc., and a metal core substrate 2 that has the shape of the final product and a metal core substrate 2 that has the shape of the final product of the substrate 2 are formed. Connecting piece 3 around the periphery
Predetermined intervals 4a, 4b by a, 3b, 3c
, 4c to form the frame body 5.

そして前記最終製品形状を威す金属芯基板2の所望個所
に直径1間のスルーホール1を形成する。
Then, a through hole 1 with a diameter of 1 is formed at a desired location on the metal core substrate 2 that affects the shape of the final product.

次に第3A図に示すように金属芯基板2及び図示しない
連結片によって結合された外枠5を含む全面に電着塗装
法により150μ程度の絶縁皮膜8を形成する、4cは
最終製品形状を或す金属芯基板2と外枠5との間の間隔
である。
Next, as shown in FIG. 3A, an insulating film 8 of about 150 μm is formed on the entire surface including the metal core substrate 2 and the outer frame 5 connected by a connecting piece (not shown) by electrodeposition coating. 4c indicates the final product shape. This is the distance between a certain metal core substrate 2 and the outer frame 5.

次に第3B図に示すように、前記絶縁皮膜8の全面に、
銅メッキの密着力向上のためゴム系接着剤9を30μ程
度塗布する。
Next, as shown in FIG. 3B, on the entire surface of the insulating film 8,
Approximately 30 μm of rubber adhesive 9 is applied to improve the adhesion of the copper plating.

次に第3C図に示すように前記接着剤9の全面に、第1
μの無電解銅メッキ10を施す。
Next, as shown in FIG. 3C, a first layer is applied to the entire surface of the adhesive 9.
Electroless copper plating 10 of μ is applied.

更に第3D図に示すように、前記第2図に示したスペー
サ7cを最終製品形状を或す金属芯基板2と枠体5間の
間隔4cに挿入し、金属芯基板2と枠体5のすき間をふ
さぐ。
Furthermore, as shown in FIG. 3D, the spacer 7c shown in FIG. Close the gap.

この時スペーサ7cは前記基板2と厚さを同じくしてお
くことが好ましい。
At this time, it is preferable that the spacer 7c has the same thickness as the substrate 2.

次に第3E図に示すようにスペーサ7cを含む表裏面上
に感光性樹脂フィルム11を貼付し露光による導電パタ
ーン焼付、現像により導電パターン用マスクを形成する
Next, as shown in FIG. 3E, a photosensitive resin film 11 is attached to the front and back surfaces including the spacer 7c, and a conductive pattern mask is formed by baking a conductive pattern by exposure and development.

次に第3F図に示すように前記感光性樹脂フィルム11
から成るマスクで被覆されない部分に約50μの電解銅
メッキを被着し、導電パターン12を形成する。
Next, as shown in FIG. 3F, the photosensitive resin film 11
A conductive pattern 12 is formed by depositing electrolytic copper plating of approximately 50 μm on the portions not covered by the mask.

次に第3G図に示すように前記感光性樹脂フィルム11
から戊る導電パターン用マスクを剥離し、スペーサ7c
を撤去した後、更にクイックエツチングにより無電解銅
メッキ10の不必要部分を除去し、しかる後、連結片3
a 、3b 、3c部分を切断し、この部分を絶縁性皮
膜で被覆して完成する。
Next, as shown in FIG. 3G, the photosensitive resin film 11
Peel off the conductive pattern mask from the spacer 7c.
After removing the connecting piece 3, unnecessary parts of the electroless copper plating 10 are further removed by quick etching, and then the connecting piece 3 is removed.
The parts a, 3b, and 3c are cut, and these parts are covered with an insulating film to complete the process.

以上説明したように本発明方法によれば金属芯基板と枠
体との間にスペーサを挿入することにより、導電パター
ン形成の為の感光性樹脂フィルムのマスクにひび割れや
、破れかなくなり、所望部分にのみ導電パターンが形成
でき得るから、従来行なわれていた電解メッキ処理前の
不要部分(最終製品周端面部分)への電解メッキ被着防
止用レジスト塗布作業が割愛できる。
As explained above, according to the method of the present invention, by inserting a spacer between the metal core substrate and the frame, the mask of the photosensitive resin film for forming the conductive pattern will not be cracked or torn, and the desired portion will be removed. Since a conductive pattern can be formed only on the electrolytic plate, it is possible to omit the work of applying a resist to prevent electrolytic plating on unnecessary portions (peripheral end surface portion of the final product) before electrolytic plating, which was conventionally performed.

又感光性樹脂フィルムのマスクのひび割れや破れが皆無
である為改修作業からも開放される等の利益を生む。
Furthermore, since there is no cracking or tearing of the photosensitive resin film mask, there are benefits such as freedom from repair work.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例方法に使用される金属芯入り
印刷配線基板の途中工程の平面図を示す。 第2図は本発明の一実施例方法に使用するスペーサの平
面図を示す。 第3A図乃至第3G図は、本発明の一実施例製造方法の
工程断面図であると共に第1図A−A’線に沿う切断面
の円形鎖線部分の一部拡大断面図である。 1・・・・・・スルーホール、2・・・・・・金属芯基
板、3a。 3b 、 3c・・・・・・連結片、4a+4b+4c
・・・・・・間隔、5・・・・・・枠体、6・・・・・
・金属芯入り印刷配線板、7a、7b、、7c・・・・
・・スペーサ、8・・・・・・絶縁皮膜、9・・・・・
・接着剤、10・・・・・・無電解銅メッキ、11・・
・・・・感光性樹脂フィルム、12・・・・・・導電パ
ターン。
FIG. 1 shows a plan view of an intermediate process of manufacturing a printed wiring board with a metal core used in a method according to an embodiment of the present invention. FIG. 2 shows a plan view of a spacer used in one embodiment of the method of the present invention. 3A to 3G are process cross-sectional views of a manufacturing method according to an embodiment of the present invention, and are partially enlarged cross-sectional views of a circular chain line portion of a cut plane taken along line AA' in FIG. 1. 1...Through hole, 2...Metal core board, 3a. 3b, 3c...Connection piece, 4a+4b+4c
...... Spacing, 5... Frame, 6...
・Printed wiring board with metal core, 7a, 7b, 7c...
...Spacer, 8...Insulating film, 9...
・Adhesive, 10... Electroless copper plating, 11...
...Photosensitive resin film, 12... Conductive pattern.

Claims (1)

【特許請求の範囲】 1 スルーホールを有する金属芯基板の最終製品形状の
周辺に連結片を介し、間隔をおいて枠体を配した状態で
これらの表面上を絶縁皮膜で被覆す。 る工程と、前記絶縁被膜上に導電路を威す導電パターン
を電解メッキにより形成する工程と、前記連結片を切断
することにより前記枠体を最終製品形状の金属芯基板か
ら切離す工程と、前記最終製品形状の金属芯基板の前記
切断部に絶縁皮膜を施す工程とを含む金属芯入り印刷配
線基板の製造方法に於て、前記電解メッキにより導電パ
ターンを形成する工程に先立って、前記間隔にスペーサ
を挿入し、最終製品形状と前記枠体との間隔をうめる工
程を有する事を特徴とする金属芯入り印刷配線基板の製
造方法。
[Scope of Claims] 1. Frames are arranged at intervals around the final product shape of a metal core substrate having through holes via connecting pieces, and the surfaces thereof are covered with an insulating film. a step of forming a conductive pattern forming a conductive path on the insulating coating by electrolytic plating, and a step of separating the frame body from the metal core substrate in the shape of a final product by cutting the connecting piece; In the method for manufacturing a printed wiring board with a metal core, which includes the step of applying an insulating film to the cut portion of the metal core substrate in the shape of the final product, prior to the step of forming a conductive pattern by electrolytic plating, the spacing is A method for manufacturing a printed wiring board with a metal core, comprising the step of inserting a spacer into the frame to fill the gap between the final product shape and the frame.
JP15363279A 1979-11-29 1979-11-29 Manufacturing method of printed wiring board with metal core Expired JPS5832800B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15363279A JPS5832800B2 (en) 1979-11-29 1979-11-29 Manufacturing method of printed wiring board with metal core

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15363279A JPS5832800B2 (en) 1979-11-29 1979-11-29 Manufacturing method of printed wiring board with metal core

Publications (2)

Publication Number Publication Date
JPS5676596A JPS5676596A (en) 1981-06-24
JPS5832800B2 true JPS5832800B2 (en) 1983-07-15

Family

ID=15566740

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15363279A Expired JPS5832800B2 (en) 1979-11-29 1979-11-29 Manufacturing method of printed wiring board with metal core

Country Status (1)

Country Link
JP (1) JPS5832800B2 (en)

Also Published As

Publication number Publication date
JPS5676596A (en) 1981-06-24

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