JPS5833585B2 - computer switching device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a switching device for two computers in automatic train control for railways, for example, and more specifically, it is possible to maintain safety even when switching between computers fails. This invention relates to a switching device.

Generally, in automatic train control in railways, in the unlikely event that the computer currently performing control fails, a backup computer is prepared to replace it, and by switching from the down computer to the backup computer, the previous control can be continued. Although safety was to be maintained, it was still necessary to maintain safety even if this switching process failed.

Therefore, as a conventional device of this type, there is one shown in FIG.

In FIG. 1, 1 is a computer as a first computer (currently under control), and 2 is a computer as a second computer (for backup).

3.4 are registers, respectively, for calculator 1 and calculator 2.
It is provided and connected to the corresponding computer, and maintains the operating status of the corresponding computer.

Reference numeral 5 denotes an AND circuit, which is connected to the registers 3 and 4 and outputs an abnormality signal S1 when both registers 3 and 4 receive inputs.

Next, the operation of the conventional device shown in FIG. 1 will be explained.

When the computer 1 goes down, a state update signal as a switching signal is sent to the register 3, and the contents of the register 3 are updated to the down state.

As a result, the register 3 sends the state change signal 1a as a switching signal to the computer 2, and also sends the down signal 3aAN
It is sent to D circuit 5.

The computer 2 that receives the state change signal 2a executes the switching process, but if the switching process fails, it sends the status update signal 1b to the register 4 and updates the contents to the down state, resulting in the down signal 3b being updated. It is sent to the AND circuit 5.

Since the AND circuit 5 receives both of the down signals 3a and 3b, it sends out an abnormality signal S1 to each device (not shown) for maintaining safety.

When the computer 2 goes down, the status update signal 1b and the status change signal 2b each become a switching signal, and the computer operates in the same way as when the computer 1 goes down.

Since the conventional switching device is configured as described above, the state change signal 2a is used as a switching signal in all cases.

2b is not transmitted to the computer to be switched, there is a drawback that the abnormality signal S1 is not sent even though the switching process is not executed.

The present invention has been made in order to eliminate the above-mentioned drawbacks, and provides a switching device for a computer that can reliably send an abnormal signal even when switching processing cannot be performed using a switching signal.

An embodiment of the present invention will be described below with reference to FIG. 2.

In FIG. 2, the same reference numerals as in FIG. 1 indicate the same or equivalent parts.

6 is an OR circuit whose input terminals are connected to registers 3 and 4.

7 is an OR circuit whose input terminals are connected to computers 1 and 2.

8 is a timer/counter as a timer, which starts counting by inputting the start signal 5a from the OR circuit 6, and ends counting by the reset signal 5b from the OR circuit 7, and the reset signal is output within a predetermined time. If 5b is not input, a timer overflow signal is sent.

9 is an OR circuit whose input terminal is connected to the AND circuit 5 and the timer/counter 8;

Next, the operation of the embodiment of the present invention shown in FIG. 2 will be explained.

When the computer 1 goes down, the register 3 outputs the status change signal 2a as a switching signal, similar to the conventional one shown in FIG.
At the same time, the down signal 3a is sent out, and the OR circuit 6 generates the activation signal 5a due to the generation of the down signal 3a.
The timer/counter 8 is started by sending out the timer/counter 8.

On the other hand, the computer 2 that receives the state change signal 2a as a switching signal executes the switching process in the same way as in the conventional one, and if it is not successful, the state change signal 1b is sent out, the contents of the register 4 are updated, and the computer 2 goes down. Since the signal 3b is input to the AND circuit 5, the OR circuit 9 sends out the abnormality signal S1.

Conversely, if the switching process is successful, the computer 2 sends out the reset signal 4b and the timer/counter 8 stops counting, so the abnormality signal S is not output.

Next, if the state change signal 2a is not generated even though the computer 1 is down, or if the state change signal 2a is generated but the computer 2 cannot receive the signal, the computer 2 performs the switching process. Since the state update signal 1b and the reset signal 4b are not activated, the timer/counter 8, which has already started counting by the start signal 5a, will send out the timer overflow signal T8 after a predetermined time, so the OR An abnormality signal S is output from the circuit 9.

When the computer 2 goes down, the status update signal 1b and the status change signal 2b each become a switching signal, and the computer operates in the same way as when the computer 1 goes down.

As described above, according to this embodiment, even if the switching process to switch control to another computer fails due to the computer being controlled going down, the train being controlled may run out of control and cause a collision. Based on the abnormal signal output when a switching failure occurs, it is possible to prevent dangers such as accidents resulting in injury or death at railroad crossings, as well as the accompanying traffic jams.

In addition, although the switching device for two computers in railway automatic train control has been described above, this invention is not limited to this, but also maintains safety even when switching processing fails when switching computers and continuing processing. It is clear that it can be used in any general public where there is a need.

Furthermore, although a timer/counter has been described as a timer in the embodiment, it is not limited to this, but it is clear that a timer that holds a signal for a predetermined period of time using a set signal, then outputs it, and is reset by a reset signal can also be used. be.

As described above, according to the present invention, even when switching processing using a switching signal cannot be performed, the timer is operated at the same time as the switching signal is generated, and a timer overflow signal is sent after a predetermined period of time, thereby providing an IJ try cycle. This has the advantage that abnormality processing is carried out after a certain period of time regardless of the situation, and an abnormality signal can be reliably output.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional switching device for a computer, and FIG. 2 is a block diagram showing an embodiment of the present invention. In the figure, 1 and 2 are calculators, 3 and 4 are registers, 5 is an AND circuit, 6, 7, and 9 are OR circuits, and 8 is a timer/counter. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Claims] 1. In a computer switching device that switches from a first computer to a second computer in response to a switching signal; a state change signal of the first computer is supplied, and the state signal is transmitted to the second computer. a first register 3 for supplying and transmitting a first down signal; a second computer state change signal;
a second register 4 that supplies the state signal to the first computer and also sends out a second down signal; an AND circuit 5 that is supplied with the first down signal and the second down signal;
A first OR circuit 6 to which a first down signal and a second down signal are supplied; and a second OR circuit to which a first computer reset signal and a second computer reset signal are supplied. 7: a timer counter 8 which is activated by the output of the first OR circuit 6, reset by the output of the second OR circuit 6, and sends out an output after counting a predetermined time; A switching device for a computer, comprising: a third OR circuit 9 to which an output is supplied and which sends out an abnormal signal.