JPS5833705B2 - Hands-on-hand training - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in the wiring structure of a semiconductor device having multilayer wiring.

A semiconductor integrated circuit consists of transistors and
Since a large number of circuit elements such as diodes and resistors are integrated, it is impossible to form all the necessary wiring on the surface of the semiconductor substrate due to the substrate area.

Therefore, by forming the necessary wiring in multiple stages, that is, in multiple layers, on the surface of the semiconductor substrate via an insulating layer, an effect equivalent to substantially increasing the area of the substrate surface is obtained.

FIG. 1 shows a conventional multilayer wiring structure, and shows a case of a two-layer structure.

A semiconductor substrate 1 is made of silicon or the like, and necessary circuit elements (not shown) are formed inside the semiconductor substrate.

2 is an insulating layer made of SiO2 or the like formed on the surface of the substrate 1; 3 is a first wiring made of aluminum or the like formed on the surface of the insulating layer 2; one end thereof is connected to a desired circuit element in the substrate 1; It is connected to one area (not shown).

4 is a second layer formed on the surface of the insulating layer 2 and the first wiring 3;
The insulating layer is made of SiO□p S t 3 N4 or various glasses and resins, such as PIQ (polyimide isoindoquinazolinedione) resin.

5 is a second wiring made of aluminum or the like formed on the surface of the second insulating layer 4; 3, and a so-called contact state is maintained.

The second wiring 5 is covered with the third insulating layer 7 except for a portion 5' thereof.
covered and protected from the external atmosphere.

The same material as the second insulating layer can be used for the third insulating layer 7.

A portion 5' of the second wiring 5 (used as a so-called bonding pad) is connected to this portion by an external electrode wire 8 made of a gold wire or the like by a well-known wire bonding technique.

By the way, when the external electrode wire 8 was bonded to the bonding pad 5' during the manufacture of a semiconductor device having the above wiring structure, a peeling phenomenon was observed in the pad y portion.

After investigating the cause of this, we found that the moisture contained in the second insulating layer 4 evaporates during bonding, and at that time, the part of the second insulating layer 4' that is below the pad 5 value in particular touches the pad 5'. It was found that this occurs due to the force acting to push it up.

Generally, insulating layers made of resin or the like contain moisture to varying degrees, so it has been difficult to eliminate the above-mentioned defects.

The present invention has been made as a result of addressing the above-mentioned problems, and attempts to eliminate the conventional drawbacks by improving the wiring structure.

The basic structure of the present invention is to have a multilayer wiring formed by forming a lower wiring layer and an upper wiring layer thereon via an insulating layer made of resin, and a bonding pad formed at the same time as the upper wiring layer. A semiconductor device comprising a wire connected to the bonding pad, the semiconductor device having a reinforcing metal layer formed at the same time as the lower layer wiring below the bonding pad, and having an opening in the insulating layer above the reinforcing metal layer. The reinforcing metal layer and the bonding pad are in contact with each other at the iron portion, and a wire is connected to the bonding pad on the contact portion.

The present invention will be described in detail below with reference to FIG.

Note that the same parts as in FIG. 1 are designated by the same numbers.

The first wiring 3 is located directly below the portion of the pad 5' of the second wiring 5 to which the external electrode wire 8 is bonded, and the first wiring 3 is connected to the second wiring 5 in this portion 3'. is short-circuited.

In this case, the first wiring 3' in this portion does not necessarily need to be connected to the circuit element, and may simply serve as a base for the pad 5'cD.

However, it is of course possible to connect it to a circuit element and use it as the wiring itself.

This type of wiring 3' does not require any special process compared to the conventional wiring, and can be obtained by vapor deposition, sputtering, etc. at the same time as forming the first wiring 3.

According to the wiring structure described above, when bonding the external electrode wire 8 to the bonding pad 5', there is no insulating layer directly under the pad 5' and instead there is a wiring 3 or 5, so it is difficult to bond the external electrode wire 8 to the bonding pad 5'. No defects occur and peeling of the pad 5' is prevented.

In addition, as is clear from Figure 2, the base of the bonding pad does not contain moisture like resin, and is more stable than the underlying wiring layer, which is made of harder aluminum such as aluminum. Since the surface of the pad is smaller than the flat part that exists inside the large hole in the insulating layer,
Make sure the wire is bonded to the pad.

Therefore, a highly reliable semiconductor device can be obtained.

The wiring 3' can be easily formed directly under the pad 5' by simply changing the photoetching mask pattern for forming the hole 6 in the second insulating layer 4 after forming the second insulating layer 4. be able to.

In the embodiments of this text, the case of two-layer wiring is particularly shown as an example of multi-layer wiring, but the present invention is not limited thereto, and can be similarly applied to a case of three or more layers.

In short, in the multilayer wiring structure, it is sufficient that the part of the uppermost wiring directly below the pad to which the external electrode line is connected is connected (supported) to the lower wiring.

[Brief explanation of the drawing]

FIGS. 1 and 2 are vertical cross-sectional views showing semiconductor devices according to the prior art and embodiments of the present invention. 1... Semiconductor substrate, 2, 4, 4', 7.
...Insulating layer, 3.3'...First wiring, 5
, 5'... Second wiring, 6... Dried L
8...External electrode wire.

Claims (1)

[Claims] 1. It has a multilayer wiring formed by forming a lower wiring layer and an upper wiring layer on top of the lower wiring layer via an insulating layer made of resin, and a wire is connected to a bonding pad formed at the same time as the upper wiring layer. The semiconductor device has a reinforcing metal layer formed at the same time as the lower layer wiring under the bonding pad, and has an opening in the insulating layer on the reinforcing metal layer, and the reinforcing metal layer in the iron part. A semiconductor device having multilayer wiring, characterized in that a metal layer and a bonding pad are in contact with each other, and a wire is connected to the bonding pad on the contact portion.