JPS5838985B2 - Suihei AFC Cairo - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a horizontal AFC circuit in a television receiver, and its purpose is to extract the receiver's low-voltage power supply, the power supply for the video output circuit, etc. from the horizontal drive circuit. In this case, a constant voltage can always be obtained regardless of the operation of the horizontal AFC circuit.

All horizontal oscillation circuits in television receivers use a self-oscillation system, but they operate more stably when the oscillation circuit is triggered by a synchronization signal separated from the composite video signal.

However, when using a direct synchronization method in which the oscillation circuit is directly triggered by a horizontal synchronization signal separated from the composite video signal, the oscillation cycle is disturbed by noise signals mixed in the synchronization signal band, which impairs the stability of the screen.

For this reason, conventional television receivers are provided with an automatic frequency control (AFC) circuit that detects the phase difference between the synchronization signal and the oscillation signal and automatically controls the operation of the oscillation circuit using this detection signal.

The basic configuration of the AFC circuit can be roughly divided into a sawtooth AFC circuit that detects differences in peak values using a discrimination method and a pulse width AFC circuit that is controlled using pulses.

FIG. 1 is a block diagram showing the configuration of a conventionally used pulse width AFC circuit, where H is a horizontal synchronizing signal input terminal;
1 is a phase discrimination circuit that receives the horizontal synchronization signal and the output (triangular wave) signal of the horizontal oscillation circuit 2 as input, and detects the phase difference between them.The phase difference is detected as a difference in pulse width, and the detected voltage is passed through an integrating circuit to a DC current. Convert to voltage.

2 is a horizontal oscillation circuit composed of a bistable multivibrator (flip-flop), the oscillation frequency of which is controlled by the DC voltage from the phase discrimination circuit 1;

3 is a phase discrimination circuit which receives the output (triangular wave) signal from the horizontal oscillation circuit 2 and the horizontal output (flyback pulse) signal from the horizontal drive and horizontal deflection output circuit 5 and detects the phase difference between them; The phase difference is detected by determining the difference in pulse width, and the detected voltage is converted to DC voltage through an integrating circuit.

4 is a phase shift circuit. The horizontal oscillation output signal is stabilized by being controlled by the DC voltage from the phase discrimination circuit 1, but the horizontal output (flyback pulse) signal depends on the accumulation time (T8) of the transistor itself used in the horizontal output circuit. ) and the accumulation time (
Due to the fluctuation of T8), the phase is not constant but fluctuates,
This causes the image to move on the screen of the receiver.

This variation is detected as the output DC voltage of the phase discrimination circuit 3, that is, the input DC voltage of the phase shift circuit 4.

The phase shift circuit 4 uses this detected voltage to control the horizontal oscillation circuit 2.
The output (triangular wave) signal is controlled to obtain a drive signal to the next stage that should always keep the phase of the horizontal output (flyback pulse) signal constant.

Phase shift circuit 4 drives horizontal drive and horizontal output circuit 5.

In this way, variations in the storage time (T8) occurring in the transistors in the horizontal output circuit are compensated for.

FIG. 2 is a specific circuit diagram of the phase shift circuit 4 in FIG. 1, and 11 and 12 are transistors forming a differential amplifier circuit,
13 is a constant current source setting transistor of the differential amplifier circuit;
4 is a collector load resistance of the transistor 11, and 15 is a switching transistor.

The signal waveforms of each signal input/output terminal in FIG. 2 are shown with the same symbols as the terminal symbols as shown in FIG. 3.

That is, the triangular wave signal A from the horizontal oscillation circuit is applied to the terminal A, and the DC voltage G from the phase discrimination circuit is applied to the terminal G.

A rectangular wave signal synchronized with the triangular wave signal A mentioned above is applied to terminals C and D.

Further, the respective rectangular wave signals have a phase inversion relationship.

When the transistors 12 and 13 are turned on, that is, when the terminal C is at a positive potential and the potential at the terminal G is higher than the potential at the terminal A, a high level output appears at the terminal O.

Assuming that the potential at the terminal G changes from G' to σ' as shown in FIG. 3, the period during which the output appears at the terminal O changes from T1' to T1''.

When the horizontal output circuit is driven through the horizontal drive circuit, this change in the leading edge that occurs at the terminal O is reversed in phase, resulting in a change in the falling portion, that is, a change in the cutoff timing.

The phase of the horizontal output (flyback pulse) signal mentioned above is always kept constant.

This is sufficient for the operation of the phase shift circuit, but if the low voltage source of the receiver and the power source for the video output circuit are configured to be taken out from the horizontal drive circuit, the waveform at terminal O in Figure 3 is shown. Since the horizontal drive circuit is driven by the signal,
The power supply voltage taken out from the horizontal drive circuit varies each time the phase shift circuit operates.

The present invention improves the drawbacks of the conventional ones as described above, and embodiments thereof will be described below with reference to the drawings.

FIG. 4 shows a horizontal AFC circuit using the present invention;
The figure is a waveform diagram of each signal input/output terminal.

Note that each signal is given the same symbol as the terminal symbol.

In FIG. 4, transistor 21 is transistor 22.
Darlington connection is made with the transistor 25 to form a differential amplifier circuit.

Transistor 23 and transistor 24 form an OR gate circuit.

Resistors 26 and 27 are drive resistors for transistors 21,
By shunting the emitter current of 23.24, these transistors are operated in the stable region.

Transistor 28 and transistor 35 form a differential amplifier circuit, and resistor 29 is their common emitter resistor.

Transistor 30 is Darlington-connected to transistor 31 and forms a differential amplifier circuit with transistor 32.

Resistor 33 and resistor 34 are drive resistors, and transistor 3
0°23.24 is made to operate in the stable region.

The resistor 36 is the emitter resistor of the output transistor 37, the diode 38 is a temperature compensation diode, the resistor 39 is a base bias resistor of the transistor 370, and the resistor 40 is an output resistor, and a capacitor 41 is connected to the capacitor 41, across which the output voltage is generated.
．． Resistor 42 and capacitor 43 form an integrating circuit.

Resistor 44 is a pace drive resistor for transistor 23.

To explain the operation of the circuit shown in Fig. 4, a signal with the waveform shown by J in Fig. 5 is applied to terminal J, and the rectangular wave applied to terminal R is in a positive period, and the DC potential of the signal at terminal J is The transistor 22 is conductive during a period when the base potential e 9 f of the transistors 23 and 24 is higher than that of the base potentials e 9 f.

Therefore, during this period, the transistor 37 is not conductive;
No output appears at output terminal 2.

Conversely, when the rectangular wave applied to the terminal R is positive, the DC potential of the signal at the terminal J is equal to the base potential e of the transistors 23 and 24.
, f, the transistor 22
is cut off and transistor 25 becomes conductive, so transistor 37 becomes conductive and an output appears at output terminal 2.

During the period when the rectangular wave applied to the terminal is negative, the transistor 21
, 22, and 25 are all blocked.

As a result, the waveform shown in FIG. 5X appears at the output terminal 2.

During a period when the rectangular wave applied to the terminal M is negative, the rectangular wave applied to the terminal M is positive, and a signal is applied to the terminal K which is in opposite phase to the signal applied to the terminal J and has the same DC level.

During the positive period of the rectangular wave applied to the terminal M, the DC potential of the signal to the terminal is equal to the base potentials e and f of the transistors 23 and 24.
Only during the period when the voltage is higher, the transistor 31 becomes conductive, so that the transistor 37 becomes conductive and an output Y appears at the output terminal 2.

These output signals X and Y are combined at the output terminal 2, and an output signal having a waveform 2 shown in FIG. 5 appears at the output terminal 2.

Next, to explain the setting of the DC potentials e and f, the DC voltage e is the detection voltage obtained by using the phase difference between the flyback pulse and the horizontal oscillation output as the difference in pulse width.
1, 43, and an integrating circuit formed by resistor 42 and resistor 44
(the DC output voltage of the phase discriminator circuit 3 in FIG. 1), and the DC voltage f is a fixed bias that is set slightly lower than the value when the voltage e is the lowest.

Since the transistors 23 and 24 form an OR gate circuit, the emitter potential of the transistors 23 and 24 is dominated by the higher potential of the base potentials indicated by voltages e and f,
During the period in which the potential at point e rises from zero to the potential at point f in the initial stage after the switch is turned on, it is dominated by the potential at point f, and e
When the potential at point becomes higher than the fixed bias at point f, it is dominated by the potential at point e.

By applying a fixed bias to the terminal f in this way, a potential slightly lower than the normal potential at the terminal e instantly appears at the emitters of the transistors 23 and 24 even when the switch is turned on. The phase of the back pulse becomes almost equal to the phase of the flyback pulse generated during normal operation, and the AFC operation is performed quickly.

During normal operation, if the potential at terminal e fluctuates and rises from e' to e'' in FIG. 5, for example, the output signal waveform Z
changes from the waveform shown by the solid line to the waveform shown by the dashed line,
Only the phase changes without changing the pulse width.

Incidentally, since the horizontal drive circuit is driven by the output of waveform 2 in FIG. 5, it is also possible to take out the low voltage source of the receiver, the power source for the video output circuit, etc. from the horizontal drive circuit.

FIG. 6 shows an example of a configuration for obtaining the signal waveform shown in FIG. 5 in an embodiment of the present invention, and FIG. 7 shows its input and output waveforms.

In FIG. 6, a signal having the waveform of FIG. 7 1N (this is a signal having the waveform of FIG. 5J) is applied to the input terminal 1N.

51 is an emitter follower type transistor, 52 is a constant current setting transistor, 53 is a phase inversion transistor, 5
4 is an emitter follower type transistor, 55 and 56 are protection resistors with equal resistance values, 57 is an emitter resistor of the transistor 54, and 58 is a diode-connected transistor.

Now, assume that the DC level of the input signal 1N is half the DC voltage of power supply B.

The resistance values of the resistors 55 and 56 are equal, and the transistor 52
Since the base current of the transistor 53 is equal to the base current of the transistor 53, the collector current of the transistor 52 (emitter current of the transistor 51) and the collector current of the transistor 53 are equal, and the AC level of the signal applied from the input terminal IN is equal to that of the emitter follower type transistor 54. The signal is transmitted unchanged to the emitter output side of the device, and only the phase is inverted.

Furthermore, since the DC level of the input signal 1N is half that of the power supply voltage element B, the DC level of the output signal is also equal to this.

Note that the DC level of the input signal 1N does not necessarily have to be half of the power supply voltage B; instead, a DC power supply voltage that is more than twice the DC level of the input signal IN is used, and only the DC component is connected between the transistors 53 and 54. An attenuation circuit may be inserted to match the DC levels of the input signal and output signal.

As is clear from the above description, according to the present invention, a stable auxiliary voltage can be obtained from the horizontal drive circuit when driving the horizontal drive circuit through the AFC circuit having two control loops. , the efficiency of the drive circuit can be improved.

Further, by adding a simple configuration to a television receiver using an AFC circuit having two control loops, an auxiliary power source can be obtained.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing an AFC circuit with two control loops, Figure 2 is a specific circuit diagram of the phase shift circuit in Figure 1, Figure 3 is its operating waveform diagram, and Figure 4 shows the use of the present invention. FIG. 5 is a circuit diagram showing a horizontal AFC circuit, FIG. 5 is an operating waveform diagram thereof, FIG. 6 is a circuit diagram showing an embodiment of the present invention, and FIG. 1 is an operating waveform diagram thereof. 1.3... Phase discrimination circuit, 2... Horizontal oscillation circuit, 4... Phase shift circuit, 5... Horizontal drive and horizontal output circuit.

Claims (1)

[Claims] 1 A first means for controlling the horizontal oscillation frequency by a horizontal synchronizing signal of a television signal, and controlling the phase of the horizontal deflection output pulse of a drive signal from the horizontal oscillation output that has passed through the first means to the horizontal deflection output stage. a second means for performing phase control based on a change in the cut-off timing; and a third means for controlling the conduction period of the drive signal to always be constant by following the change in the cut-off time; The means is configured to use at least two transistors so that the current flowing through these two transistors is the same, and has a DC level that has passed through the first means, repeating at a period equal to the horizontal synchronization signal period of the television signal. A horizontal AFC circuit characterized in that a second triangular wave signal having a DC level equal to that of the triangular wave signal and having an inverted phase is obtained from the triangular wave signal.