Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
JPS5839345A - Function selection system - Google Patents
[go: Go Back, main page]

JPS5839345A - Function selection system - Google Patents

Function selection system

Info

Publication number
JPS5839345A
JPS5839345A JP56136670A JP13667081A JPS5839345A JP S5839345 A JPS5839345 A JP S5839345A JP 56136670 A JP56136670 A JP 56136670A JP 13667081 A JP13667081 A JP 13667081A JP S5839345 A JPS5839345 A JP S5839345A
Authority
JP
Japan
Prior art keywords
function
card
code
address
slot
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56136670A
Other languages
Japanese (ja)
Other versions
JPS6218056B2 (en
Inventor
Jun Shimada
潤 嶋田
Masataka Nakada
中田 正敬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56136670A priority Critical patent/JPS5839345A/en
Publication of JPS5839345A publication Critical patent/JPS5839345A/en
Publication of JPS6218056B2 publication Critical patent/JPS6218056B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22Microcontrol or microprogram arrangements
    • G06F9/26Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262Arrangements for next microinstruction selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To realize necessary functions in sequence by inputting the discrimination number of a card plug-in slot, and then outputting a function code for indicating a specific function and reading the control instruction code of the function that a processor having received the code realizes from the characteristic address of the slot. CONSTITUTION:In memory cards 1-1'-1-10', a group of instruction codes for controlling ten different functions is stored, and card plug-in slots 2-11-2-14 for the respective cards 1-1'-1-10' are connected to a central controller 4 through a common bus 3. When the processor 4 requires functions IF-4 and IF-6, the cards 1-4' and 1-6' are inserted into the slots 2-11 and 2-12. Each memory card 1-X' is provided with a code generator 5, address deciding devices 6 and 7, and a nonvolatile memory 9. For this purpose, the discrimination number of one of the slots 2-11-2-14 is inputted to generate the function discrimination code for specifying the function by the card 1-X, and the instruction code for controlling the function that the processor 4 performs is read to the card plug-in slot 2-V.

Description

【発明の詳細な説明】 本発明は機能選択方式、特に各々特定の機能を制御する
命令コードを具備する複数の不揮aSメモリカードと、
それヤれ固有の識別番号を有し、中央処理装置が挿入さ
れた任意の前記不揮発性メモリカード内の命令コードを
それぞれ固有の番地領域で続出し可能とする複数のカー
ド収容スロットとを有する蓄積プ胃グラム制御方式デー
タMl!装置における機能選択方式に関す6    −
一1図はこの種の蓄積グはグラムデータ処理装置におけ
る従来ある機能選択方式の一例を示す図であゐ・l/4
1図におiて、10枚のメモリカード1−1乃至1−1
0 K#2s @該データ処理装置の一機能宛不揮発性
メモリ領域に格納されている。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a function selection scheme, particularly a plurality of non-volatile aS memory cards each having instruction codes for controlling a particular function;
A storage having a plurality of card receiving slots, each of which has a unique identification number, and allows instruction codes in any of the nonvolatile memory cards into which a central processing unit is inserted to be successively read out in each unique address area. Gasogram control method data Ml! 6 - Regarding function selection method in equipment
Figure 11 is a diagram showing an example of a conventional function selection method in a storage program data processing device of this type.
In Figure 1, 10 memory cards 1-1 to 1-1 are shown in i.
0 K#2s @ Stored in the nonvolatile memory area for one function of the data processing device.

中央処理装置4ti、共通バス3に接続されて−る一個
のカード収容スロット2に前記メモリカード1−1乃至
1−10内の所要のメモリカード1−X(Xは1乃jl
IOの何れかを示す)をカード収容ス關ット2に挿入す
ることにより、常に同一の番地領域でメモリカード1−
X内の命令コード群IP−Xを抽出し、対応する機能F
−Xt−実現する仁とが出来る。然しか\る従来ある機
能選択方式において杜、同時に一機能しか実現出来ず、
異なる機能を必要とする度にメモリカード1−Xを挿し
替える必要があや、運用上不便である。
The central processing unit 4ti is connected to the common bus 3, and a required memory card 1-X (X is 1 to
By inserting the memory card (indicating either IO) into the card storage slot 2, the memory card 1-
Extract the instruction code group IP-X in X and extract the corresponding function F
-Xt- It is possible to realize the jin. However, in the conventional function selection method, only one function can be realized at the same time.
It is necessary to replace the memory card 1-X every time a different function is required, which is operationally inconvenient.

次に第2図は前述の次点を除去した従来ある機能選択方
式の他の一例を示す図である。第2図においては、前記
10枚のメモリカード1−1乃至1−10にそれぞれ専
用のカード収容ス0y)2−1乃至2−10が設けられ
ておシ、中央処理装置4#′i各カード収容ス0y)2
−1乃至2−10に固有の′4に地領域で、各カード収
容ス四F)2−1乃至2−10に挿入さ4れるメモリカ
ード1−1乃至1−1Oから命令;−ド群IP−1乃至
IF−10を抽出することが出来る・従って、令弟2図
に示されるデータ処理装置が機能F−4およびF−6の
みを必要とする場合KK、カード収容スロット2−4に
メそリカード1−4を、またカード収容スロット2−6
にメモリカード1−6を挿入すゐことによ)、中央処理
装置4はカード収容スジシト2−4および2−6に固有
の番地領域で命令コード群IF−4およびIF−6を随
時抽出し、所要の機能F−4およびF−6を実現するこ
とが出来る・更に所要機能に追加変更が生ずれば、その
都度対応するメモリカードを挿入し替えれば良い。然し
か\る機能選択方式においては、尚該データ処理装置の
所要機能の種類に拘らず、常に全機能F−l乃至F−1
0に対応するカード収容スジシト2−1乃至2−10を
予め設ける必要があり、それに伴ない誉地領械も総べて
用意する必要があシ、特に多種類の機能を実現可能なデ
ータ処理装置K)いては不経済となる。
Next, FIG. 2 is a diagram showing another example of the conventional function selection method in which the above-mentioned runner-up is removed. In FIG. 2, the ten memory cards 1-1 to 1-10 are each provided with a dedicated card storage slot 0y) 2-1 to 2-10, and each of the central processing units 4#'i Card storage space 0y)2
-1 to 2-10 in the area 4F) which is unique to each card storage space 2-1 to 2-10; IP-1 to IF-10 can be extracted. Therefore, if the data processing device shown in Figure 2 requires only functions F-4 and F-6, KK can be extracted in the card accommodation slot 2-4. Mesori card 1-4 and card storage slot 2-6
(by inserting the memory card 1-6 into the memory card 1-6), the central processing unit 4 extracts the instruction code groups IF-4 and IF-6 from the address areas specific to the card-accommodating strips 2-4 and 2-6 at any time. , the required functions F-4 and F-6 can be realized.Furthermore, if additional changes occur in the required functions, the corresponding memory card can be replaced each time. However, in the function selection method, all functions F-1 to F-1 are always selected regardless of the type of required functions of the data processing device.
It is necessary to prepare the card accommodation strips 2-1 to 2-10 corresponding to 0 in advance, and accordingly, it is also necessary to prepare all the honchi territory machines, especially for data processing that can realize a wide variety of functions. Equipment K) would be uneconomical.

本発明の一的は、前述の如き従来ある機能選択方式の欠
点を除去し、当該データ処理装置の経済性を損なうこと
無く、随時所要の機能を実現可能な機能選択方式の提供
にある。
One object of the present invention is to provide a function selection method that eliminates the drawbacks of the conventional function selection methods as described above and can realize required functions at any time without impairing the economic efficiency of the data processing apparatus.

この目的は、各々特定の機能を制御する命令コードを具
備する複数の不揮発性メモリカードと、それぞれ固有の
識別番号を有し、中央処理装置が挿入された任意の前記
不揮発性メモリカード内の命令コードをそれぞれ固有の
IIP地領域で読出可能とする複数のカード収容スジシ
トとを有する蓄積プ四ダラム制御方式データ処理装置に
おいて、前記カード収容スロットの識別番号を入力する
仁とにより、前記特定の機能を表示する機能識別符号を
出力する手段を設け、該機能識別符号を受領し九前記中
央処理装置が実現する機能を制御する命令フードを、前
記カード収容スロットに固有の番地で読出すヒとによ〕
達成される拳以下、本発明の一実施例を第3図乃至第6
図によ〉説明する。第3図は本発明の一実施例によ石機
能選択方式を示す図であp1第4図は第**におけるメ
モリカードおよびカード収容スロットの構成例を示す図
であシ、篤5図はメモリカードの番地空間への配置例を
示す図であ夛、第6図線第3図における中央処理装置の
作成する機能管理表の一例を示す図である。&お、全図
を通じて同一符号は同一対象を示す。第11iKお−て
、メモリカード1−1′乃至1−IQ’は、前述のメモ
リカード1−1乃至1−10同様、10種類の機能F−
l乃至F−10を制御するための命令コード群IP’−
1乃至IF−10を格納している。一方当該データ処理
装置は、同時に必要とする機能種類の最大数に対応し、
4個のカード収容スロッ)2−11乃至2−14が設け
られている。各カード収容スロット2−11乃至2−1
4にはそれぞれ固有の識別番号S−1乃至S−4が付与
されており、また中央処理装置4が各カード収容スロツ
)2−11ド収容スpツ)2−11乃至2−14に固有
の番地領域が設けられている。当該データ処理装置に所
要の機能F−Xに対応するメモリカード1−)′を、最
大4種類迄任意のカード収容スロット2−11乃至2−
14に挿入することが出来る。第3図に示されるデータ
処理装置は機能F−4およびF−6を必要とし、対応す
るメモリカード1−4′および1−6′をカード収容ス
ロット2−11Thよび2−12に挿入する。第4図に
おいて、カード収容スーツ)2−V(Vは1乃至4の何
れかを示す)に挿入されるメモリカード1−X/には命
令ラード群IF”−Xを番地000乃至FFF(ta道
表示、以下同家格納する不揮発性メモリ8が設けられて
いる。更に符号発生器5には当蚊メモリカード1−X/
に対応する機能F−Xを表示する機能識別符号f−xが
蓄積されている。今メモリカードIXtをカード収容ス
ロット2−Vに挿入すると、番号発生器9から該カード
収容ス四ツ)2−Vに固有の識別番号S−■がメモリカ
ード1−X’の番地決定器6および7に供給される0番
地決定器6は共通バス3内のアドレスバス3−1から受
(1する番地を前記識別番号S−■と比較し、両者が一
致すれば符号発生器5に蓄積される機能識別符号f −
x ’ii−共通バス3内のデータバス3−2に送出す
る。東に査地決定柵7はアドレスバス3−1から受信す
る番地を、前記識別番号8−VK基づく所定の健換を行
い、番地000乃MFFF−lIA得られれば不揮籟メ
モリ8の対応替地に格納されている命令コード1F−x
を抽出し、データバス3−2に送出する。第3図におけ
る各カード収容スpツ)2−11乃至2−14に対する
識別番号S−1乃至S−4をそれぞれ000乃至000
3とし、また各カード収容X四ツ)2−11乃至2−1
4に固有の番地領域をそれぞれAOOO乃至AFFF。
The purpose is to provide a plurality of non-volatile memory cards, each having an instruction code to control a specific function, and instructions within any said non-volatile memory card, each having a unique identification number, into which a central processing unit is inserted. In a data processing device with a plurality of card accommodating slots, each of which allows a code to be read in a unique IIP area, the specific function can be specified by inputting the identification number of the card accommodating slot. means for outputting a function identification code for displaying the function identification code, and a unit for receiving the function identification code and reading out an instruction hood for controlling the functions realized by the central processing unit at an address unique to the card receiving slot. Yo〕
One embodiment of the present invention is shown in FIGS. 3 to 6 below.
Explain with the diagram. Fig. 3 is a diagram showing a function selection method according to an embodiment of the present invention, P1 Fig. 4 is a diagram showing an example of the configuration of the memory card and card accommodation slot in Fig. 6 is a diagram showing an example of arrangement of memory cards in address spaces; FIG. 6 is a diagram showing an example of a function management table created by the central processing unit in FIG. 3; FIG. &Oh, the same reference numerals indicate the same objects throughout the figures. Similarly to the memory cards 1-1 to 1-10 described above, the memory cards 1-1' to 1-IQ' have 10 types of functions F-
Instruction code group IP'- for controlling l to F-10
1 to IF-10 are stored. On the other hand, the data processing device corresponds to the maximum number of functional types required at the same time,
Four card accommodating slots) 2-11 to 2-14 are provided. Each card accommodation slot 2-11 to 2-1
4 are each assigned a unique identification number S-1 to S-4, and the central processing unit 4 is assigned a unique identification number S-1 to S-4 to each card accommodating slot) 2-11 card accommodating spot) 2-11 to 2-14. Address areas are provided. A memory card 1-)' corresponding to the function F-X required for the data processing device is inserted into any of the card storage slots 2-11 to 2- for up to four types.
14 can be inserted. The data processing device shown in FIG. 3 requires functions F-4 and F-6, and corresponding memory cards 1-4' and 1-6' are inserted into card receiving slots 2-11Th and 2-12. In FIG. 4, a memory card 1-X/ inserted into a card storage suit) 2-V (V indicates one of 1 to 4) has an instruction group IF"-X stored at addresses 000 to FFF (ta). A non-volatile memory 8 is provided to store road information.Furthermore, the code generator 5 has a mosquito memory card 1-X/
A function identification code f-x indicating the function F-X corresponding to is stored. Now, when the memory card IXt is inserted into the card accommodation slot 2-V, the identification number S-■ unique to the card accommodation slot 2-V is sent from the number generator 9 to the address determiner 6 of the memory card 1-X'. The 0 address determiner 6 supplied to the address bus 3-1 in the common bus 3 compares the address to be received (1) with the identification number S-■, and if the two match, it is stored in the code generator 5. function identification code f −
x'ii-Sent to data bus 3-2 in common bus 3. The site determination fence 7 to the east performs a predetermined conversion of the address received from the address bus 3-1 based on the identification number 8-VK, and if the address 000 to MFFF-lIA is obtained, it changes the correspondence in the non-volatile memory 8. Instruction code 1F-x stored in the ground
is extracted and sent to the data bus 3-2. Identification numbers S-1 to S-4 for each card accommodation spout 2-11 to 2-14 in FIG. 3 are set to 000 to 000, respectively.
3, and each card accommodation x 4) 2-11 to 2-1
4, the unique address areas are AOOO to AFFF, respectively.

Booo乃至BFli’F%cooo乃至CFFFおよ
びDOOO乃至DFFFとすれば、中央処理装置4はア
ドレスバス3−1に識別番号0000を送出することに
よシ、カード収容スロット2−11に挿入されているメ
モリカード1−4/から送出される機能識別符号f−4
をデータバス3−2を経由して受信する。同様に、中央
処理装置4は識別番号、0001を送出することにより
機能識別符号f−6を受信するが、識別番号0002お
よび0003をで、機能−別符号#、唆信されfizs
以上によプ、中央処理装置4は所要機能?−4およびF
−1を制御する命令コード群IP−4およびl−6が、
カード収容ス四ット2−11および2−12に固有の番
地領域Aooo乃至AFF’FおよびBooo乃至B 
F F Fに格納されていると見イ灰しく第5因)、第
6図に示される如き機能管理$llを作成する・以後中
央処理装置4は機能F−4を実現する場合には穢能7#
理表」lから機能識別番ぢf−4を指標として査地領域
AOOO乃至AFf=″F金11i1a’L、該査地領
域AOOO乃至AFFF内g)所定番地をアドレスバス
3−1に送出して、メモリカード1−4′内の決定部7
によル番地領域000乃至FFF内の対応番地に変換し
て不揮発性メモリ8に入力し、命令コード群IF−4を
順次抽出して災行する・同様に、機能F−6を爽抗する
場合に本、中央処理装置4杖機能管理表11から番地領
域Eooo乃至BFFF’を抽出し、該番地屓域B00
0乃至BF’FF’によルメモリカードl−6′から命
令コードBHp−6Vr朧次桶出して実行するの 以上の説明から明らかな如く、不冥施例によれば、中央
処理装置4は一就アドレスバス3−1に各カード収容ス
ロット2−11乃至2〜14の識別番−4ijoooo
乃至oooaを層成送出して得られる機能識別符号f−
4およびf−6により機能管m表11を参照することに
よル所要の機能F−4またはF−6を実現することが出
来る。
Boooo to BFli'F%cooo to CFFF and DOOO to DFFF, the central processing unit 4 sends the identification number 0000 to the address bus 3-1 to confirm that the card is inserted into the card accommodation slot 2-11. Function identification code f-4 sent from memory card 1-4/
is received via the data bus 3-2. Similarly, the central processing unit 4 receives the function identification code f-6 by sending the identification number 0001, but by sending the identification numbers 0002 and 0003, the central processing unit 4 receives the function-another code
Based on the above, what functions does the central processing unit 4 require? -4 and F
The instruction code groups IP-4 and l-6 that control -1 are
Address areas Aooo to AFF'F and Boooo to B unique to card storage slots 2-11 and 2-12
F F Noh 7#
g) Send the predetermined location to the address bus 3-1 using the function identification number f-4 as an index from the processing table "1". The determining section 7 in the memory card 1-4'
Convert it to the corresponding address in the address area 000 to FFF, input it to the nonvolatile memory 8, and sequentially extract the instruction code group IF-4 to perform the disaster.Similarly, the function F-6 is activated. In this case, the address area Eooo to BFFF' is extracted from the central processing unit 4 function management table 11, and the address area B00 is extracted.
0 to BF'FF' to extract the instruction code BHp-6Vr from the memory card l-6' and execute it. Identification number -4ijoooo of each card accommodation slot 2-11 to 2-14 on the first address bus 3-1
Function identification code f- obtained by layered transmission of oooa to oooa
4 and f-6, the desired function F-4 or F-6 can be realized by referring to the function tube m table 11.

たお、第3図乃至第6図はあく迄本発明の一実施例に過
ぎず例えげメモリカード1−4′および1−6′社カー
ド収容スロット2−11および2−12に挿入するもの
に限定されることは無く、他の任意のカード収容スシッ
ト2−11乃至2−14に挿入する場合にも本発明の効
果は変ら力い。またカード収容ス田ット2−11乃至2
−14にはメモリカード1−4′および1−6/を挿入
するものに限定される仁とは無く、メモリカード1−1
/乃至1−10’の内から任意の4枚以下のメモリカー
ドを選び、任意の起倒で挿入する場合にも本発明の効果
は変らない。またカード収容スロット2−11乃至2−
14に付与される識別番号S−vおよび番号領域は、o
ooo乃至0003およびAOOO乃至AFFF、BQ
OO乃至BP’FF、C0QO乃至CFFFおよびDo
oo乃至DFFWに限定されゐことは無く、他に幾多の
変形が考慮されるが、何れの場合にも本発明の効果は変
らない。オた各メモリカード内の不揮発性メモリ8の番
地領竣は、000乃至FFFに限定されることは無く、
他に幾多の変形が考慮されるが、何れの場合にも本発明
の効果は変らない。また番地決定器6は謙別香号S−■
と一致する番地を受信したことを検出して機能識別番号
f −xを送出するものに限定されることはなく、薫別
番号S−■と所定の論理関係にある番地を受信した場合
に機能識別番号f −xを送出することも考慮されるが
、何れの場合に%本発明の効果は変らない、更に本発明
の対象とする蓄積プログラム制御方式データ麩理装置の
具備するメモリカード数およびカード収容ス胃ット数社
図示されるものに限定されぬことは言う迄もない。
It should be noted that FIGS. 3 to 6 are only one embodiment of the present invention; for example, the memory cards 1-4' and 1-6' are inserted into the card storage slots 2-11 and 2-12. However, the present invention is not limited to this, and the effects of the present invention remain the same even when inserted into any other card accommodating slots 2-11 to 2-14. In addition, card accommodation slots 2-11 to 2
-14 is not limited to inserting memory cards 1-4' and 1-6/;
The effect of the present invention does not change even when four or less memory cards are selected from among the numbers 1-10' and inserted in an arbitrary manner. In addition, card accommodation slots 2-11 to 2-
The identification number S-v and number area assigned to 14 are o
ooo~0003 and AOOO~AFFF, BQ
OO to BP'FF, C0QO to CFFF and Do
The present invention is not limited to 0 to DFFW, and many other modifications may be considered, but the effects of the present invention remain the same in any case. Additionally, the address range of the non-volatile memory 8 in each memory card is not limited to 000 to FFF,
Many other modifications may be considered, but the effects of the present invention will not change in any case. Also, the address determiner 6 is Kenbetsu Kogo S-■
The present invention is not limited to the one that sends the function identification number f-x when it detects that an address that matches the ``S-■'' is received, but the function identification number is sent when an address that has a predetermined logical relationship with the classification number S-■ is received. It is also considered to send the number f − It goes without saying that the storage capacity is not limited to the number of companies shown in the figure.

以上、本発明によれば、蓄積プログラム制御方式データ
処理装置の経済性を損なうこと無く、随時所要の機能を
実現する機能選択方式が提供出来る。
As described above, according to the present invention, it is possible to provide a function selection method that realizes required functions at any time without impairing the economic efficiency of the storage program control type data processing apparatus.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来ある機能選択方式の一例を示す図、第2図
は従来ある機能選択方式の他の一例Jijr4図、第3
図は本発明の一集施例による機能選択方式を示す図、第
4図は第3図におけるメモリカード収容ス四ットの構成
例を示す図、第5図はメそリカードの番地空間への配置
例を示す図、第6図祉機能管理表の一例を示す図である
。 図において、1−1乃至1−10,1−1’乃至1−1
0’、1−Xおよび1−X’はメモリカード、2−1乃
至2−10.2−11乃至2−14.2−■および2は
カード収容スーット、3は共通バス3−1aアドレスバ
ス、3−2はデータバス、4は中央処理装置、5は符号
発生器、6および7は番地決定器、8は不揮発性メモリ
、9は番号発生能識別符号、IF−1乃至IP−10お
よびIF−Xは命令コード群、S−1乃至5−ioおよ
びS−Vは識別番号、を示す。 第  T (2) 箪  zm 第  3  図 第  仔  図 第 5 図 %  Cσ
FIG. 1 is a diagram showing an example of a conventional function selection method, FIG. 2 is a diagram showing another example of a conventional function selection method.
The figure shows a function selection method according to a set of embodiments of the present invention, FIG. 4 shows an example of the structure of the memory card accommodation slot in FIG. 3, and FIG. 5 shows the address space of the memory card. FIG. 6 is a diagram showing an example of a welfare function management table. In the figure, 1-1 to 1-10, 1-1' to 1-1
0', 1-X and 1-X' are memory cards, 2-1 to 2-10. 2-11 to 2-14.2-■ and 2 are card accommodation suits, and 3 is a common bus 3-1a address bus. , 3-2 is a data bus, 4 is a central processing unit, 5 is a code generator, 6 and 7 are address determiners, 8 is a non-volatile memory, 9 is a number generation capability identification code, IF-1 to IP-10 and IF-X represents an instruction code group, and S-1 to 5-io and SV represent identification numbers. Figure T (2) Figure 3 Figure 5 % Cσ

Claims (1)

【特許請求の範囲】[Claims] の鐵別責号を有し、中央処理装置が挿入され九任意の前
記不揮発性メモリカード内の命令コードをそれぞれ固有
の番地領域で読出し可能とする複数のカード収容スロッ
トとを有する蓄積プ胃グラム制御方式データ処理装置に
おいて、前記不揮発性メモリカードに、挿入する前記カ
ード収容スロットの識別番号を入力することにより、前
記特定の機能を表示する機能識別符号を出力する手段管
設け、核機能織別符号を受領した前記中央#l&理装置
が実現する機能を制御する命令コードを、前記カード収
容スロットに固有の番地で続出すことを特徴とする機能
選択方式〇
a storage program having a central processing unit inserted therein and a plurality of card accommodating slots in which instruction codes in any of the nonvolatile memory cards can be read out at respective unique address areas; In the control method data processing device, a means tube is provided for outputting a function identification code indicating the specific function by inputting an identification number of the card accommodating slot to be inserted into the nonvolatile memory card, and a core function classification. A function selection method characterized in that an instruction code for controlling a function realized by the central #l&control device that has received the code is successively outputted to the card accommodating slot at a unique address.
JP56136670A 1981-08-31 1981-08-31 Function selection system Granted JPS5839345A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56136670A JPS5839345A (en) 1981-08-31 1981-08-31 Function selection system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56136670A JPS5839345A (en) 1981-08-31 1981-08-31 Function selection system

Publications (2)

Publication Number Publication Date
JPS5839345A true JPS5839345A (en) 1983-03-08
JPS6218056B2 JPS6218056B2 (en) 1987-04-21

Family

ID=15180733

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56136670A Granted JPS5839345A (en) 1981-08-31 1981-08-31 Function selection system

Country Status (1)

Country Link
JP (1) JPS5839345A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62239790A (en) * 1986-04-11 1987-10-20 Matsushita Electric Ind Co Ltd Key telephone system
JPS62275376A (en) * 1986-05-23 1987-11-30 Canon Inc Electronics

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5473533A (en) * 1977-11-24 1979-06-12 Casio Comput Co Ltd Extending system for system program

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5473533A (en) * 1977-11-24 1979-06-12 Casio Comput Co Ltd Extending system for system program

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62239790A (en) * 1986-04-11 1987-10-20 Matsushita Electric Ind Co Ltd Key telephone system
JPS62275376A (en) * 1986-05-23 1987-11-30 Canon Inc Electronics

Also Published As

Publication number Publication date
JPS6218056B2 (en) 1987-04-21

Similar Documents

Publication Publication Date Title
JP3177015B2 (en) Control method of semiconductor memory device
DE69838387D1 (en) METHOD AND DEVICE IN A PACKET GUIDANCE SWITCH TO CONTROL ACCESS TO A COMMON MEMORY ON DIFFERENT DATA RATES
WO1994011812B1 (en) Method for loading device drivers
CN109840680A (en) Service request processing method, device, computer equipment and storage medium
EP0471532A2 (en) Method for determining the size of a memory
CN112738290A (en) NAT (network Address translation) conversion method, device and equipment
JPS5839345A (en) Function selection system
US6134640A (en) Method for transforming flash memory storage format based on average data length
JPS6353588B2 (en)
JPS6239876B2 (en)
KR101488506B1 (en) Method for creating and compressing card control list data
JP3005379B2 (en) Communication system between programmable controllers
CN115221075B (en) Data storage devices, data storage methods, apparatuses, chips, circuit boards and equipment
CN117992717B (en) Cholesky decomposition method taking privacy protection into consideration, intelligent household electrical appliance and server terminal
JPS5842396A (en) Selecting system for representative
JPH0325645A (en) Swapping system for virtual space
EP0248557A2 (en) Memory space clearing control method and device
Jennergren Linear programming on a micro—The case of the Apple II
Shura-Bura et al. On the efficient organization of the dynamic use of memory
JP2731652B2 (en) Channel number setting method of information processing system
JP2699868B2 (en) Line selection device for bidirectional operation lines
SU750567A1 (en) Buffer storage
JPS5854444A (en) Common control system for data base working area
JPH0435963Y2 (en)
JPS6027293A (en) Memory check system