JPS5840863B2 - Demodulation circuit using carrier multilevel modulation method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a demodulation circuit using a carrier multi-level superposition modulation method.

One of the modulation methods is multilevel superimposition modulation, in which a four-phase modulator signal, called a first path, is added to a four-phase modulator signal, called a second path, with, for example, half the amplitude of the first path, and the signals are simultaneously transmitted. A method has already been proposed.

A modulation and demodulation device using this modulation method has the configuration shown in FIG. 1, for example.

That is, the input signal ■N1. of the first path P1. ■N2 to the four-phase modulator MOD1, and the input signal INI/l of the second path P2
I N2t are respectively applied to the four-phase modulator MOD2 to perform four-phase phase modulation on the carrier wave from the carrier wave generator CRG.

The 4-phase modulator signal output from the 4-phase modulator MOD1 and the signal obtained by attenuating the amplitude of the 4-phase modulator signal output from the 4-phase modulator MOD2 to half by an attenuator AN are connected to a sum circuit AD. It is sent together.

The vector of this transmission modulation signal is as shown in FIG. 2, and has 16 values indicated by a 0 mark.

Note that the numbers in [ ] are the combinations of input signals IN and N2 of the first path P1, and the numbers in 0 are the input signals N11 and N2 of the second path P2. ■N2/
This shows the combination of

On the receiving side, the modulated signal is applied to a four-phase demodulator DEM1, a phase comparator PD1, and a difference circuit SB, respectively, and the four-phase demodulator DEM1 outputs the output signals 0UT1, 0UT1, and
0UT2 is demodulated.

A carrier wave is regenerated by a voltage controlled oscillator VCO, a low frequency waveform generator LPF, and a phase comparator PD, and this regenerated carrier wave is sent to a four-phase demodulator DEM1. Each of the signals is added to DEM2 as a carrier wave for demodulation.

Also, the demodulated output signal of the first path P1 becomes a 4-phase modulator signal again in the 4-phase modulator MOD, and the 4-phase modulator signal is added to the phase comparator PD and the difference circuit SB. By subtracting the 4-phase modulator signal output from the 4-phase modulator MOD from the received modulation signal, the 4-phase modulator signal of the second path P2 is obtained, and the 4-phase modulator signal of the second path P2 is obtained. The instrument number is 4
By demodulating in the phase demodulator DEM2, demodulated output signals 0UT1/ and 0UT2/ of the second path P2 are obtained.

Figure 3 shows the demodulation eye pattern of the first path, where the amplitude ratio of the first path and the second path is 6 dB, and the
The product of dB bandwidth B and pulse repetition period T is BT=1.
This is for the case of 0.

The above-mentioned multilevel superimposition modulation method is described in IEICE Communication Method Study Group material, document number C374-158 "A method of multiphase multilevel carrier digital communication" (January 29, 1975).
For example, even in 16-value modulation, there is a point that can be easily realized by applying conventional 4-phase PSK modulation/demodulation technology.

However, if an error occurs in the demodulated data of the first path, the re-modulated signal by the four-phase modulator MOD of the first path will also be erroneous, resulting in the drawback that the error propagates to the second path.

The highest probability of an error occurring in the demodulated data of the first pass is at the demodulated eye pattern of the first pass in Fig. 3.
These are points B and C among sampling points A to D.

In other words, since the level difference between point B and point C is small, point B may be misjudged as point C or point C as point B with respect to the threshold during demodulation of the first pass, that is, the level of relative amplitude O in FIG. There may be cases where they are separated.

However, the codes of the second pass associated with each level of A, B, C, and D are as follows.

In other words, in the vector diagram of FIG. 2, when the reference carrier phase is set on the Y axis, a set of codes, for example, (0
, 1), (1, 1), etc., the former is projected onto the Y axis and correlated.

In other words, if the second pass code associated with A is on the Y axis,
O”.

Similarly, B, C, and D are associated with 1 and 0.1, respectively.

Similarly, in the case of the X axis, 0, 1, 0, 1 is A.

Corresponds to B, C, and D.

Therefore, if B is mistaken for C1 or C is mistaken for B, the second pass code will always be incorrect because B1 and C are associated with different codes.

This means that in the vector diagram in Figure 2, the vector closest to the origin is
This is also clear from the fact that all four signal points are associated with different second path signals.

Therefore, as shown in FIG. 4, in the multilevel superimposed modulation signal vector, the first path P1 of the
It has been proposed to perform code conversion so that the vector position of the modulated signal of the second path P2 becomes symmetrical with respect to the demodulation threshold level of .

According to this, even if a misjudgment occurs between point B and point C of the demodulation eye pattern of the first path P□, the modulation signal of the second path P2 is symmetrical with respect to the demodulation threshold level.
It will not be affected by that error.

SUMMARY OF THE INVENTION An object of the present invention is to provide a demodulation circuit with a simple configuration in the improved multilevel superposition modulation method as described above.

Examples will be described in detail below. FIG. 5 is a block diagram of an embodiment of the present invention. On the transmitting side, the first
The input signal IN1゜■N2 of the path P1 is directly applied to the multilevel modulator MMOD, and the input signal IN1 of the second path P2 is
/, lN24J first path P1 input signal IN1, I
It is applied together with N2 to exclusive OR circuits EXR1 and EXR2 for code conversion, and the converted output is applied to multilevel modulator MMOD.

Therefore, multi-value modulation is performed in the multi-value modulator MMOD, and the multi-value modulation signal becomes a vector shown in FIG.

On the receiving side, the multilevel modulated signal is sent to demodulators DEM1. D
EM2, the carrier wave recovery circuit Cf' and the bit rate clock generator BTH, and the carrier wave recovered by the carrier wave recovery circuit CR is sent to the demodulator DEM□ via the demodulator DEM2 and the π/2 phase shifter PS. In addition to this, an output is obtained by synchronous detection of in-phase and quadrature components with the carrier wave.

This demodulator DEM1. The output of DEM2 is a predetermined regenerator to which a bit rate clock is applied D1. (2) In D2, identification of °1'"e+Ott is performed.

That is, A-D of the demodulated eye pattern of the first pass P1 in FIG.
A point is sampled by a clock, and with respect to the identification threshold level, for example, if it is a point A or B, it is "O", C, or D.
If it is a point, it is determined as '1'.

And identification regenerator ■D1. ■The output of D2 is the first path P1
The demodulated output signals 0UT1 and 0UT2 are obtained.

Also, the demodulator DEM1. In the output of DEM2, that is, the demodulated eye pattern of the first path P1 shown in FIG.
2, points A and D and points B and C have the same content.

This can be seen from the fact that the vector position of the second path P2 is symmetrical with respect to the X-axis and the y-axis in FIG. 4.

Therefore, in the absolute value circuits ABS, . . . ABS2, the demodulators DEM.

After obtaining the absolute value of the output of the DEM2, that is, the absolute value with reference to the demodulation threshold level of the first path P1, by full-wave rectification, etc., the discrimination regenerator ■D3. (2) Demodulated output signals 0UT7/, , QUT2 of the second path P2 are obtained by D4.

The aforementioned absolute value circuit ABS1. Due to ABS2, the demodulation eye pattern of the first pass P□ in Fig. 3 is folded at the level of relative amplitude O, and the demodulation threshold level of the second pass P2 is set between the sampling points A and B. and the identification regenerator ■D3. (2) Identification is made based on the clock timing in D4.

As explained above, the present invention enables easy demodulation of the second pass by folding back the demodulation eye pattern of the first pass using the demodulation threshold level of the first pass as a reference. By using a multilevel superimposed modulation signal by code conversion as shown in the vector explanatory diagram in Figure 4, it is possible to prevent errors in the demodulated data of the first path from being absorbed into the second path, and also to prevent vibration absorption in the second path, similar to the four-phase phase demodulation circuit. The first pass demodulation circuit performs the first pass demodulation, and the second pass demodulated data can be obtained from the absolute value of the output of the first pass demodulator.

Therefore, there is no need to perform remodulation, subtraction processing, etc. of the demodulated data of the first pass as in the conventional example, and there is an advantage that the groove bottom can be simplified.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a transmitting side modulation circuit and a receiving side demodulating circuit of a conventional multi-level superposition modulation system, Fig. 2 is a vector illustration of a multi-level superposition modulation signal, and Fig. 3 is a demodulation eye of the first path. FIG. 4 is a vector explanatory diagram of a multilevel superimposed modulation signal which is subjected to code conversion and superimposition modulation to prevent error absorption. FIG. 5 is a block diagram of an embodiment of the present invention. Pl and P2 are first and second paths, MMOD is a multilevel modulator, EXRl and EXR2 are exclusive OR circuits, and DEMl. DEM2 is a demodulator, PS is a phase shifter, CR is a carrier recovery circuit, BTR is a bit rate clock generator, ABSl
, ABS2 is an absolute value circuit, and LD1 to LD4 are identification regenerators.

Claims (1)

[Claims] 1 A vector of a multi-level superimposed modulation signal obtained by superimposing the phase modulation signal of the first path and the phase modulation signal of the second path is
In the demodulation circuit of the method of obtaining the multilevel superimposed modulation signal by converting the code so that the content of the phase modulation signal of the second path becomes symmetrical with respect to the demodulation threshold level of the first path, a demodulator, an identification regenerator that adds the output of the demodulator to obtain a demodulated output signal of the first pass, and an absolute value circuit that obtains the absolute value of the output of the demodulator with reference to the demodulation threshold level of the first pass; 1. A demodulation circuit using a carrier multi-value superimposition modulation system, comprising an identification regenerator that adds the output of the absolute value circuit to obtain a demodulated output signal of a second path.