JPS5844250B2 - Channel diagnostic control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides shallow mode diagnosis when performing diagnosis including data transmission and reception with a central processing unit in a channel diagnosis control system, particularly in a channel device that performs microprogram processing. By providing a first diagnostic mode and a second diagnostic mode that performs deep mode diagnosis, the above-mentioned central processing Channel diagnostic control method capable of reducing device load In a channel device whose processing is performed by a microprogram, self-diagnosis is performed by firmware installed in the channel device.

However, support from the central processing unit is required for diagnosis of the bus interface section in the channel device, diagnosis of interrupt processing for the central processing unit, and the like.

Diagnoses that require support from the central processing unit mentioned above have conventionally been used for diagnosis when restarting a channel device after a serious error has occurred, or when the status of a channel device is completely unknown. It is designed to perform a sufficiently deep mode diagnosis.

That is, for example, there are five types of interrupts from the channel device to the central processing unit, and in the above-mentioned diagnosis, all of the five types of interrupts are checked one by one.

When such a deep mode diagnosis is performed, the central processing unit is inevitably required to provide support for the diagnosis, which increases the load on the central processing unit.

The present invention aims to solve the above points,
At start time when the channel device is normally considered to be in a normal state, for example, there is a route for CPU interrupts from the channel device to the central processing unit, and a route for channel interrupts from the central processing unit to the channel device. The aim is to reduce the load on the central processing unit by focusing on the fact that it is sufficient to confirm that the system is normal.

Therefore, the channel diagnosis control method of the present invention includes a central processing unit, a main memory, and a channel device, and while the channel device advances processing using a microprogram, data is set at least in the central processing unit. In a data processing system that sends and receives data via a group of registers, at least a means for issuing a CPU interrupt to a central processing unit using the group of registers, and a means for issuing a CPU interrupt to a central processing unit using the group of registers; a first diagnostic mode channel interrupt corresponding to shallow mode diagnosis from the central processing unit;
0) a diagnostic mode, and a second diagnosis in which the channel device issues a CPU interrupt to the central processing unit and a second diagnostic mode/channel interrupt corresponding to deep mode diagnosis from the central processing unit; and means for determining that the diagnosis has been completed, wherein the central processing unit determines whether the The present invention is characterized in that the diagnostic processing is started by selecting the data set register for applying the channel interrupt to the channel device, and the diagnostic processing is ended by determining the termination by the determining means.

This will be explained below with reference to the drawings.

FIG. 1 shows the configuration of an embodiment of a data processing system including a channel device of the present invention, and FIG. 2 is an explanatory diagram illustrating the channel device of the present invention and its O diagnosis operation.

In FIG. 1, 1 is a central processing unit, 2 is a main memory,
3 is a bus, 4 is a channel device, 5-0°5-1. ...
..., 5-m are sub-channel devices, 6 is a microprocessor, 7 is a control memory in which a microprogram is stored, and 8 is a main storage, which is used, for example, as a buffer register. what is done,
Reference numeral 9 denotes a bus interface unit that intervenes when transmitting and receiving data with the central processing unit 1, etc.;
represents a sub-channel control section.

Under normal operating conditions, the channel device 4 accesses a predetermined area on the main storage device 2 based on instructions from the central processing unit 1.

Based on the contents of the area, the channel device 4 then
It controls data transfer between the main storage device 2 and an input/output device (not shown) connected to the subchannel device 5-0, for example.

During this time, the processing of the channel device 4 is performed by the control memory 7.
It is executed by a microprogram stored on the top.

The main storage 8 is used for temporary data storage during data transfer.

In addition, the bus interface section 9 acts as an intermediary when transmitting and receiving control signals and transmitting and receiving data to and from the central processing unit 1, the main memory device 2, and the like.

Furthermore, the subchannel control section 10 mediates transmission and reception between the subchannel device 5 and the subchannel device 5.

As mentioned above, the channel device is designed to perform self-diagnosis, and the diagnostic program for the diagnosis is stored in the control memory 7, and the microprocessor 6 executes the self-diagnosis based on the diagnostic program. Perform processing for diagnosis.

However, when diagnosing the bus interface unit 9 and diagnosing interrupt processing for the central processing unit, the channel device 4 alone is not sufficient and support from the central processing unit 1 is required.

When starting the channel device 4 when the channel device 4 is normally operating normally, for example, the CPU interrupt route from the channel device 4 to the central processing unit 1, or conversely, the channel from the central processing unit 1 to the channel device 4. All you have to do is check the interrupt route.

However, when restarting the channel device 4 after a serious error has occurred, it is necessary to perform sufficient checks.

In consideration of the above points, the present invention provides a first diagnosis mode in which a relatively simple diagnosis, that is, a shallow mode diagnosis, and a second diagnosis mode, in which a thorough check is performed, that is, a deep mode diagnosis.
The system has multiple diagnostic modes, including a diagnostic mode.

The plurality of diagnosis modes described above are selected by setting an instruction as to which diagnosis should be performed, for example, in a register on the central processing unit 1.

FIG. 2 illustrates the channel device of the present invention and its diagnostic operation.

In the figure, 4 is a channel device, 20 is a reception control register, 21 is an interrupt register for CPU interrupts, 22 is a transmission control register, 23 is an interrupt register for channel interrupts, 24, 2
5.26... are transmitting and receiving registers, 27 is a status register, 28 is a data pattern writing section, 29 is a determining section, 30 is a reading section, 31 is a processing section, 32
3 is a writing section, 33 is a determination section, 34 is a data check section, and 35 is a write address designation section.

When the channel device 4 communicates with the central processing unit 1 during normal operation, for example, the data pattern writing unit 28 of the channel device 4 sets bit information on the interrupt register 21 and sets data in the reception control register 20, and A CPU interrupt is made to the processing device 1.

Further, the central processing unit 1 is configured to issue a channel interrupt to the channel device 4.

For this reason, in the case of the above-mentioned shallow mode diagnosis, that is, the first diagnosis mode, for example, the CPU interrupt and the channel interrupt can be checked by performing the following simple diagnosis.

That is, (1) the data pattern writing section 28 of the channel device 4 sets a predetermined bit in the interrupt register 21 and then sets data of a predetermined pattern in the reception control register 20;

(2) The determination unit 29 of the central processing unit (CPU) 1 should read the reception control register 20 based on the contents of the interrupt register 21 while a CPU interrupt is applied based on the above process (1). determine something.

Accordingly, the reading section 30 receives the contents of the reception control register 20 and performs predetermined processing in the processing section 31, and the writing section 32 sends the processing result to the channel device 4.
Have it sent back to you.

(3) The writing unit 32 of the central processing unit 1 knows that it is in the first diagnostic mode at this time, and in the first diagnostic mode, the writing unit 32 of the central processing unit 1 writes the transmission control register 22. Specify and send the above processing result to control register 2
Set it to 2 to perform a channel interrupt.

Needless to say, a predetermined bit is set in the channel interrupt interrupt register 23 in the channel device 4 at this time.

(4) At this time, in the channel device 4, even though the above processing result is set in the above transmission control register 22, a channel interrupt is applied, and the interrupt register 22 is set to the above processing result.
The determining unit 33 determines the contents of the register 3 and notifies the data checking unit 34 that it is the register 22 mentioned above.

The data check unit 34 checks whether this content is the content expected in advance.

After setting data in the reception control register 20 for diagnosis, the discriminating unit 33 of the channel device 4 sets the processing result from the central processing unit 1 to the transmission control register 20 as described above.
Since it is set to 2, it is determined that the mode is the first diagnosis mode, and the diagnosis process is ended.

Diagnosis is performed in the first diagnostic mode as described above, but
As mentioned above, when restarting after a serious error occurs in the channel device 4, the second diagnostic mode is instructed to the central processing unit 1.

When the channel device 4 executes diagnostic processing under such a state, it is performed as follows.

That is, (5) the above processes (1) and (2) are executed as they are.

(6) The central processing unit 1 transfers the above processing results to the channel device 4.
Since the second diagnostic mode is instructed to the writing section 32, the central processing unit 1 specifies the transmission/reception register 24, sets the processing result in the register 24, and performs a channel interrupt.

(7) The determining unit 33 of the channel device 4 determines that the mode is the second diagnostic mode based on the above processing result being set in the register 24.

(8) Write address designation section 35 of channel device 4 below
notifies the data pattern writing unit 28 to designate the transmission/reception register 25, the data pattern writing unit 28 sets predetermined data in the transmission/reception register 25, and the central processing unit 1 sets the processing result in the register 26.

That is, the diagnostic data is sequentially transmitted and received between the channel device 4 and the central processing unit 1, and finally the illustrated transmission control register 2
Data is set to 2.

That is, during this time, a deep mode diagnosis is performed, and for example, all five types of interrupts defined as CPU interrupts from the channel device 4 to the central processing unit 1 are diagnosed.

At this time, it may be considered that processing such as transferring the contents of the status register 27 to the central processing unit 1 is included.

(9) Similar to the above process (8), when the process result is set in the transmission control register 22, the discriminator 33 of the channel device 4 ends the diagnostic process.

As explained above, according to the present invention, except in cases where a serious error occurs in the channel device 4, only a shallow mode diagnosis is performed at the time of normal start, and, for example, the CPU interrupt route and the channel interrupt route are You only need to check the normality of the .

Therefore, the processing load on the central processing unit 1 does not increase undesirably.

However, it goes without saying that if a deep mode diagnosis is required, the diagnosis should be made sufficiently.

Furthermore, in the case of the present invention, there is no need for the channel device to know in advance whether the mode is the first diagnosis mode or the second diagnosis mode; You can conclude that the diagnosis is complete.

In order to determine which mode of diagnosis should be performed, it is sufficient to simply indicate which mode of diagnosis to, for example, a predetermined register on the central processing unit 1.

[Brief explanation of drawings]

FIG. 1 shows the configuration of an embodiment of a data processing system including a channel device of the present invention, and FIG. 2 is an explanatory diagram illustrating the channel device of the present invention and its diagnostic operation. In the figure, 1 is the central processing unit, 2 is the main memory, 3 is the bus,
4 is a channel device, 5-ro to 5-m are sub-channel devices, 6 is a microprocessor, 7 is a control memory, 8 is a main storage, 9 is a bus interface section, and 10 is a sub-channel control. 20 represents a reception control register, and 22 represents a transmission control register.

Claims (1)

[Claims] 1 It is equipped with a central processing unit, a main memory device, and a channel device, and the channel device advances processing using a microprogram and at least sends and receives data to and from the central processing device through a group of registers in which data is set. In a data processing system, at least a means for issuing a CPU interrupt to the central processing unit using the register group, and a diagnostic process including the register group, in which the channel device interrupts the central processing unit.
A first diagnostic mode in which the channel device issues a U interrupt and a first diagnostic mode/channel interrupt corresponding to shallow mode diagnosis from the central processing unit; and a first diagnostic mode in which the channel device issues a CPU interrupt to the central processing unit and the means for specifying one of a second diagnosis mode corresponding to deep mode diagnosis and a second diagnosis for performing channel interrupt from the central processing unit; and means for determining that the diagnosis has been completed; a central processing unit selects a data set register for applying the channel interrupt to the channel device based on either the first diagnostic mode or the second diagnostic mode, and starts diagnostic processing; A channel diagnostic control method characterized in that the determining means determines whether the diagnostic process is complete or not and ends the diagnostic process.