JPS5845718B2 - EL Hiyoji Souchi - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a display device, such as a thin film electroluminescence (hereinafter referred to as EL), which has a history characteristic between brightness and applied voltage.

First, the characteristics of thin film EL will be explained.

As shown in FIG. 1, transparent electrodes 2 are arranged in parallel on a glass substrate 1.

On top of this, a dielectric material 3 such as Y2O3, a fluorescent layer 4 such as Mn-doped ZnS, and the same dielectric material 3' as above are sequentially laminated by vapor deposition or the like to form a three-layer structure. An electrode 5 that is orthogonal to the transparent electrode 2 is arranged in parallel.

If the structure is made such that one of the first electrode groups 2 and
When a suitable AC voltage is applied to one of the second electrode group 5, only a small area sandwiched between the two electrodes will emit light, which corresponds to one pixel on the screen. .

FIG. 2 shows, as an example, the relationship between a voltage waveform a applied to a picture element and a light emission waveform a.

In addition, in the EL with the structure shown in Figure 1, the brightness, lifespan,
In terms of stability, it has superior characteristics compared to conventional dispersion type EL elements, but individual picture elements newly exhibit a hysteresis phenomenon between brightness and applied voltage as shown in FIG.

That is, when the amplitude of the positive and negative pulse train is slowly increased, the EL starts emitting light at the light emission threshold voltage vth.

When the voltage is further increased from this point, the brightness increases along the curve a in FIG. 3 and reaches Bm at an amplitude of Vm.

When the voltage is lowered from this point, the luminance decreases while taking a luminance value greater than a for the same voltage, as shown in FIG.

Therefore, the voltage Vs with the large amplitude of the luminance difference shown in FIG. 3ab is selected as the light emission sustaining voltage.

First, it is assumed that a pulse train of amplitude Vs is applied as shown in FIG. 4, and the brightness is at the brightness level Bsa on the curve a in FIG.

Then, at a certain point, the amplitude V is greater than <Vs, as shown in Figure 4 ◎.
After applying a write pulse of width tw at w and then applying a sustain pulse train of the same amplitude Vs as above, the brightness level settles to a level greater than Bsa.

Depending on the amplitude Vw and width tw of the write pulse, the brightness level after writing is Bsa in Figure 3a and Bs in Figure 3b.
For example, between a and FIG. 3, Bw1 y Bw2+...
・Can be taken arbitrarily, such as.

In other words, it is possible to write in halftones.

To erase EL after this writing, one erase pulse with amplitude VE and width tH smaller than amplitude Vs is applied as shown in FIG.
Add one or more.

Furthermore, the sustain pulse train is then applied again as shown in FIG.

As will be described in detail later, the amplitude VE and width tE of the erase pulse
As shown in Figure 3, Bsa and Bsa
The brightness level BE1. BE2. ...Ninal.

By the way, the dependence of the amplitude VE of the erasing pulse on the erasing effect is as shown in FIG.

In other words, assuming that the brightness level after writing is Bw, as the amplitude VE of the erase pulse is made smaller than the amplitude Vs of the sustain pulse, the erase effect becomes larger (the brightness level after adding the erase pulse becomes smaller). However, as the amplitude VE is further reduced, the erasing effect becomes smaller after a certain point (the luminance level after the erasing pulse is applied becomes stronger).

That is, as shown in FIG. 5, there is an optimum erase voltage VEopt.

The figure also shows that the larger the number n of erasing pulses, the greater the erasing effect.

The details mentioned above are from a patent application filed by the same applicant in 1972.
Refer to No. 75663 and Japanese Patent Application Laid-open No. 51-4988.

By the way, the dependence of the erase pulse width tE on the erase effect is as follows, assuming that tBl>tB2> tE3, the respective optimum erase voltages Vopt1 < Vopt2 < V as shown in FIG.
It has been newly discovered that it will be opt3.

The present invention has been made by utilizing this discovery in driving an EL element, in which the pulse width of the erase pulse is modulated by the input signal, and the erase pulse with the modulated pulse width is used to generate intermediate signals according to the input signal. It is characterized by erasing the tone.

, will be explained in more detail below using preferred examples.

A preferred embodiment of the present invention is a negative image display device in which the entire screen is initially written (i.e., the entire surface is illuminated) and is successively interrupted by an erase pulse with a pulse width depending on the input signal. Erases the key.

FIG. 7 shows an example of a circuit that modulates the pulse width with an information input signal.

The information input signal 11 is transmitted to the A/D converter 13 via the sample and hold circuit 12, where it is converted into a digital quantity and input to the counter 14.

The counter 14 is a subtraction counter, and is decremented by 1 each time a clock is input from the clock generator 15.
'', it is output and the flip-flop 16 is reset.

The flip-flop is previously set by a preset signal according to the rising cycle of a fixed erase pulse.

The start of subtraction is also instructed by this preset signal.

Now, depending on the magnitude of the information input signal, "5" is displayed on the counter 14.
That is, when 101'' is input in binary notation, the output signal 17 of the flip-flop 16 becomes a pulse with a width of approximately five clock cycles, as shown in FIG.

FIG. 9 shows a characteristic diagram of erase voltage versus erase dust of the EL panel of this example.

In the figure, the background brightness Bsa is the brightness when no writing is done and only the sustain drive wave is applied, and the write brightness Bsb is the brightness when writing is initially performed on the entire screen.

At this time, B s b/B s a was 8.2 dB.

Erasing luminance BE is the luminance after erasing with one erasing pulse.

In this figure, BE/Bsa measured in decibels is considered erased dust.

When the erased dust is 0, dB, BB=Bsa, indicating that it has been completely erased to the original state, and the erased dust is O ~ 8.2 b
The time between B indicates a state in which the image is erased to an intermediate tone.

In the figure, 21, 22, and 23 each have a pulse width tE of 20μ.
sec.

It represents erased dust when 40μCeCl was used for 30μsec.

When the erase voltage is constant (for example, 161 V), the erase dust becomes larger when the pulse width is large.

In this way, by applying an erasing pulse with an amplitude of 161 cm using the pulse width of the flip-flop output 17, the halftone erasing as described above was achieved.

Now, if the erase voltage is set to 1 sov, a gradation opposite to that described above is obtained.

As described above, according to the present invention, it is possible to erase multiple gradations simply by using a fixed erasing power supply, and the circuit is simple.
An extremely useful drive circuit was obtained with less wasted power.

[Brief explanation of drawings]

Fig. 1 shows an example of an EL display element, a is a partially cutaway perspective view, b is a side sectional view, Fig. 2 is a time chart showing the operation of this EL display element, and Fig. 3 is this EL display. A characteristic diagram showing the operation of the element, FIG. 4 is a time chart of an example of a driving wave, FIGS. 5 and 6 are characteristic diagrams showing the relationship between erasing voltage and brightness, and FIG. 7 is an example of the present invention. FIG. 8 is a time chart showing the operation of this circuit diagram, and FIG. 9 is a characteristic diagram showing the relationship between erase voltage and erase dust in this embodiment. 21.22,23...Pulse width is 20.40.
Characteristic line showing erase dust at 80 μsec, ■00.・
・. Sustain pulse, ◎...Write pulse, o...
・Erasing pulse 0

Claims (1)

[Scope of Claims] 1. In a negative display device in which the entire screen is initially written and displayed by erasing halftones, an EL display element having a hysteresis characteristic between luminance and applied voltage; means for applying a sustain drive signal, a write signal with a larger amplitude than the sustain drive signal, and an erase signal with a smaller amplitude than the sustain drive signal, and after putting the entire EL display element into a write state with the write signal, information input An EL display device comprising means for pulse-width modulating the above-mentioned erasure signal having a constant amplitude in accordance with the signal and controlling the degree of erasure including half-tone erasure of an EL display element having the above-mentioned hysteresis characteristics.