JPS5847715B2 - Driving device for thin film electroluminescent panels - Google Patents

Description

[Detailed Description of the Invention] <Summary> The present invention relates to a thin film electroluminescent panel (hereinafter referred to as E
When driving a matrix type display element that has hysteresis characteristics between luminance and applied voltage, such as LP), it is possible to achieve high-quality images by reducing power consumption and packaging density, and increasing the erasing effect during erasing. The purpose is to provide a method that can realize display at low cost.

<Prior Art> Before specifically showing the driving method, the characteristics of the above-mentioned thin film ELP will be explained.

First, regarding ELP, as shown in FIG. 1, striped transparent electrodes 2 are arranged in parallel on a glass substrate 1.

On top of this is a dielectric material layer 3, such as Y203, and a fluorescent layer 4, such as ZnS doped with Mn. Further, the same dielectric material 3' as described above is formed into a three-layer structure using a thin film technique such as vapor deposition sputtering, and a striped electrode 5 perpendicular to the transparent electrode 2 is arranged in parallel thereon.

If the structure is made such that one of the first electrode groups 2 and
When a suitable AC voltage is applied to one of the second electrode group 5, only a small area sandwiched between the two electrodes will emit light, which corresponds to one pixel on the screen. .

EL with the structure shown in Figure 1 has superior characteristics in terms of brightness, lifespan, and stability compared to conventional distributed EL elements, but individual picture elements require new brightness and applied power. During the voltage, a hysteresis phenomenon as shown in FIG. 3b is shown.

To explain this characteristic according to Fig. 3, when a pulse of voltage amplitude v1 is first applied as shown in Fig. 3a, the luminance will change to b,
As shown in c, V1 is at the level of B1.
1≧vth, where vth is the light emission threshold voltage.

When an appropriate write voltage 2 is applied to this, the brightness rises all at once to B3, and the voltage value is then changed back to the maintaining voltage V.
Even if I return it to 1, the brightness settles to B2 which is higher than B1《.

When the erase voltage V3 is applied to this, the brightness level decreases rapidly, and when it is returned to the sustaining voltage V1 again, the brightness settles to B1.

These temporal relationships are indicated by symbols 11 and 11 in Figure 3a.
13, . . . , t2 are shown by corresponding to the positions of the same symbols in C of the figure.

This hysteresis phenomenon can take any small loop depending on the amplitude and pulse width (not shown) of the write voltage, as shown by the thin line in FIG. 3b.

That is, halftone display is also possible. A major feature of the ELP, which is not found in other display elements, is that once a write voltage is applied, each picture element continues to emit light without losing the gradation given to it by the sustain pulse.

The above voltages vary greatly depending on the composition, film thickness, and applied waveform, but in a prototype example, vth200V, V1-2
10V, v2=210-280V, and V3=190V.

When displaying characters or images using a display element having hysteresis characteristics as described above, electrodes are arranged in a matrix such that the front and back surfaces are perpendicular to each other as shown in FIG.

When selecting only the desired picture element from among the elements constituting the display channel arranged in this way, each electrode is common to the picture elements in each horizontal or vertical row and column.
When applying a voltage to each electrode, some ingenuity is required.

As shown in Figure 4, among the picture elements arranged by the electrodes in n rows and m columns, the picture element (i, j) that intersects with the electrode Xi in the i-th column and the electrode Yj in the j-th row is Electrode
i, Yj and the voltage waveform Vx applied to the picture element (i, j)
The time charts of i, Vyj, and V(i, j) are shown in Fig. 5 a, b, and c.

FIG. 5d shows the light emission waveform of the picture element (i, j) corresponding to the above applied voltage when ELP is used.

In Figure 5, ■ is a write pulse, @ is a sustain pulse, and O
is the erase pulse.

Further, @ is a write signal pulse applied to the column electrode, and ■ is a row selection pulse.

The line sequential scanning method, which is commonly used in such matrix type displays, is a method in which the erase pulse and the row selection pulse are sequentially selected row by row to cause each row to sequentially emit light.

In the conventional system, one or more drive transistors for sustain pulses are provided for each electrode separately from (or partially in common with) drive transistors for write and erase selection pulses.

Therefore, as the panel becomes larger and the number of electrodes increases,
The number of drive transistors increases proportionally.

Furthermore, although the panel can be regarded as a capacitive element in terms of its equivalent circuit, the power consumed by the peripheral circuits of the transistors due to the relatively high-frequency sustaining pulses when charging and discharging this element also increases as the size of the panel increases. .

When an ELR with a memory is normally used as a display device, a sustain pulse is applied after writing and erasing are completed, and it can be considered that the sustain pulse is applied for substantially most of the period.

Therefore, it can be seen that most of the power consumption is used in the maintenance Hals supply system.

Focusing on the fact that AC-type ELP considers each picture element between both electrodes as a capacitive element as mentioned above, it utilizes the resonance phenomenon in conjunction with inductance when supplying sustain pulses.
In order to reduce power consumption and simplify the circuit, in particular, before charging the capacitive display element by flowing current into it, a closed circuit is formed between the power supply and the inductance element to increase the current flowing through the inductance element. The method of charging and driving the above-mentioned capacitive display element with the increased current is disclosed in Japanese Patent Application No. 136830-1970, which the present inventors previously filed.
(Refer to Japanese Unexamined Patent Publication No. 52-60529) in Figures 6 and 7.
This will be explained using figures.

As shown in Figure 6a, the prior application method uses a horizontal sustain pulse (
or vertically) is supplied to the electrode in bulk.

In FIG. 6a, 6 is a drive circuit that provides a write signal; 7
is a matrix type display panel.

8,......, 11 is a diode, 12 is an inductance, 13, 14 is a power supply, 15,...
. . . , 18 is a transistor.

FIG. 6b is a simplified equivalent circuit of FIG. 6a.

That is, as mentioned above, since the display panel 7 is a capacitive element, it is connected to a capacitor 7' and a transistor 15, etc.
......, 18 is switch 15',...
..., 18'.

In addition, the transistors 15, . . . , 18 are provided with timing pulses T1, .
An appropriate input signal is applied to the base of each transistor so that T4 is conductive during the high level period and cut off during the low level period.

In the figure, the resistor 19 equivalently represents the series resistance such as the electrode resistance of the ELP (mainly due to the transparent electrode side) and the on-resistance of the switching element.

In the following explanation, the inductance 1 in FIG.
The current IL flowing through the capacitor 2 and the voltage ec applied to the capacitor 7' are positive in the direction of the arrow in the figure.

The operation will be explained below with reference to the time chart shown in FIG.

During the period from 1=11 to t2, transistors 15 and 16 are conductive and transistors 17 and 18 are cut off.

That is, when the switches 15 and 16 in FIG. 6B are closed, the current IL flowing through the inductance 12 increases in the positive direction, and magnetic energy is accumulated in the inductance 12.

At t-t2, transistor 16 is conductive, and when S transistor 15 is cut off, 16' → 21 → 13 → 9 → 12 → 1
9→7'→16' forms a closed circuit and begins to resonate.

Therefore, as shown in FIG. 7e, the current IL begins to decrease and the voltage ec between the terminals of the capacitor 7' increases.

Further, at t-t3, the current IL becomes zero and ec reaches its maximum value.

After t=t3, the transistor 16 is cut off and the transistor 17 is turned on, and from 1=13 to t4, the current IL flows in the opposite direction and the voltage ec decreases.

When ec becomes zero when 1=14, the transistor 18 is further turned on.

The current IL is 1=1, and a current in the opposite direction to that from t3 is applied to accumulate magnetic energy.

When 1 = 15, transistor 17 is turned on, and transistor 18 is turned off, as in the previous case, 17' + 7' →
19→12→10→14→22→17' form a closed circuit, the current IL starts to rise, and a negative pulse is generated at both ends of the capacitor.

When 1 = 16, the current IL becomes zero and a negative peak value is obtained.

When 1 = 16, transistor 7 is now cut off and transistor 16 is made conductive.

Thereafter, the current IL turns positive again, and the negative voltage ec also decreases, reaching zero at t=t7.

After this, repeat the same process as after 1=11.

In this way, a bipolar sustaining pulse train as shown in FIG. 7f is obtained.

The method of the prior invention described above is based on the voltage E of the power supplies 13 and 14.
. By introducing
This is to obtain a high voltage ecp.

Therefore, according to this method, a large voltage pulse amplitude can be applied to both ends of the capacitor with a low power supply voltage E, 1E.

Obtained pulse voltage maximum value eep and output pulse width τ
1 is the maximum current value ILp and the inductance L1
The relationship is established when the capacitance of the capacitor 7' is C.

Therefore, by appropriately selecting the inductance L or by externally connecting a capacitor in parallel with the panel (not shown), a desired peak value and pulse width can be obtained.

Although it depends on the values of C and L, a pulse of lecpl=250V can be easily obtained with a power supply voltage of 10V each as shown in FIG.

In addition, since LC resonance is used to effectively utilize electric power through the interaction between capacitor charge/discharge energy and magnetic energy, the power consumption required for driving is significantly reduced compared to conventional methods, and the circuit structure is also improved. It gets easier.

? One Embodiment of the Present Invention> The present invention is based on the basic operation of the earlier invention and is a system for providing necessary erasing pulses and selection pulses in a normal matrix type display device along with sustain pulses.

Generally, an image signal once written in an image display device needs to be completely erased by an erase signal.

If this is incomplete, it will interact with the next write signal and subsequent image signals will not be able to faithfully reproduce the original signal.

If the erase pulse O in the waveform applied to each picture element is not bipolar as shown in Fig. 5C, but is unipolar as shown in Fig. 8 O', it is bipolar. Compared to this, the erasing effect is small.

This relationship is shown in FIG.

Curve ■ is for bipolar cases, and curve ■ is for unipolar cases.

That is, it can be seen that when the same erasing voltage amplitude is applied, curve (2) erases better.

Based on the above understanding, the present invention provides a circuit that provides erase pulses of both positive and negative polarities and the above-mentioned LC resonance type sustain pulse from the scanning electrode side. It is shown in FIG.

In this figure, the input of each switching transistor can be directly driven from a logic IC level (5V in most cases) without using a pulse transformer or the like.

In FIG. 10, the Q portion is the same as the sustain pulse supply circuit system explained in FIGS. 6 and 7, and each element is given the same number.

However, in the present invention, two inductances 1 2a and 1 2b are used to provide bipolar erase pulses and the like.

In addition, part 2 in FIG. 10 shows a circuit corresponding to each one of the scanning electrodes.

That is, 24, 25, 35, 36 are diodes, 26, 29
, 31 are PNP transistors, 27, 28, 30, 3
2 is an NPN transistor, and 33 and 34 are resistors.

Further, 37 is an output terminal, which is connected to the scanning electrode Yj shown in FIG.

FIG. 11 shows the timing for operating each transistor in FIG. 10.

In FIG. 11, T1, T2, T3, and T4 are the transistors in FIG. 10, and 15, 16, 17, and 18 are turned on, respectively.
- Indicates the timing to turn off.

Also, t in FIG. 11 is the transistor 26, 27 in FIG.
, t2 is transistor 32, t3 is transistor 2
8 and 29, and t4 indicates the timing at which the transistors 30 and 31 are turned on and off, respectively.

In FIG. 11, each transistor is turned on at high level T1 to T4 and t1 to t4, and turned off at low level.

Each transistor is turned on and off using such a timing signal.
When the FF is turned on, the output terminal 37 in FIG. 10 has V in FIG.
An applied waveform as shown in yj is obtained.

Since the sustaining pulse is applied by operating the circuit (2) as described above, only the waveform is shown in FIG. 11 and the explanation thereof will be omitted.

Next, the case of erasure will be explained.

In FIG. 11, at time a1 when the signal t1 becomes...A, the transistors 27 and 26 in FIG. Since it is low, transistors 15 and 16 are on and transistors 17 and 18 are off.

Therefore, point A in Figure 10 is at O (GND) level, and point B is at GND level.
Since it is in a state where it is cut off from ND, even if the transistor 26 is turned on, the diode 25 becomes reverse biased, and since it is cut off, the output terminal 37 becomes the voltage +VE.

In other words, at this time, part ■ has no effect on part ■.

Furthermore, at time a3 when the signal t3 becomes NO, the transistors 29 and 28 are turned on, but during this period T1, T
Since transistor 2 is low and T3 and T4 are high, transistor 15,
16 is OFF, and 17 and 18 are ON.

Therefore, point B is at 0 (GND) level and point A is cut off from GND, so transistor 28 is turned on.
Even if the output terminal 37 reaches a voltage of -VE, the diode 24 becomes reverse biased and is cut off.

In this case as well, part e does not affect part [F].

As described above, a bipolar cancellation wave of <+VE, VE is obtained.

Consumable pulses are generated only for scan electrodes that require erasure.

Note that, as shown at vyj in FIG.
Although the sustain pulse Psl is inserted between 1 and Pe2, a sufficient erasing effect can be obtained even in this case, and there is no problem caused by the sustain pulse.

In FIG. 10, circuit elements 30, 31, 32, 35
, 36 and transistors 26, 27, 28
, 29 are turned on and off, respectively, t,
Even if j t3 is the same as shown in FIG. 11, the effects of the present invention can be obtained.

In this case, the applied waveform obtained at the output terminal 37 in FIG. 10 is as shown in FIG. 11 Vyj'.

Even in this case, a sufficient erasing effect can be obtained and the number of circuit elements can be reduced, which is preferable from a practical standpoint.

Furthermore, the present invention does not add a new power supply voltage -Vp and circuit elements to apply the selection pulse -Vp shown in FIG. Circuit elements 28, 29, 30, 31 shown in
, 35 are shared.

That is, the timing tw of the selection pulse is the same as when applying the -VE pulse, so that the transistors 28 and 29 are selected during the selection period O.
If it is set to N, -Vp becomes -VE.

The write voltage applied to both end electrodes of each picture element is shown in FIG.
As shown in , if Vp + Vw is required, the signal (horizontal)
The write voltage applied to the electrode Xi varies from Vw to Vw+(Vp-V
You can do E).

Figure 12 is a circuit diagram for applying a write voltage to the signal electrodes.
Figure 3 shows the timing diagram.

That is, in FIG. 12, 38, 39, and 40 are transistors, 41 is a diode, and 42, 43 are resistors.

44 and 45 are input terminals from the logic circuit, to which input signals twtw in FIG. 13 are respectively applied.

During the high period of the timing signal tw, the transistors 38, 3
9 becomes QN, and during the high period of tw, transistor 40
turns on.

Reference numeral 46 in FIG. 12 is an output terminal, which is connected to the signal (horizontal) electrode Xi in FIG.

From this output terminal 46, as shown in FIG.
i is output.

In this way, by sharing the negative erase pulse circuit and the selection pulse circuit, the number of power supplies and circuit elements can be reduced.

As described above, according to the present invention, high-voltage, high-frequency sustain pulses can be supplied all at once with a low power supply voltage and with a simple configuration, and a bipolar erase voltage with a large erase effect can be provided.

Furthermore, since the negative erase pulse supply circuit and the selection pulse supply circuit are shared, the number of power supplies and circuit components can be reduced.

The present invention is a method particularly suitable for displaying moving images.

[Brief explanation of drawings]

Figure 1 shows the composition of the IJTx type EL panel.
2 is a partially cutaway perspective view, b is a side view, FIGS. 2 and 3 are diagrams explaining the operating characteristics of the panel, FIG. 2 a is a voltage waveform diagram, b is a light emission waveform diagram, and FIG. a is a voltage waveform diagram, b is a characteristic curve diagram of voltage versus brightness, C is a time chart of brightness,
FIG. 4 is a diagram showing a simplified matrix type panel, FIG. 5 is a time chart explaining the driving of the matrix type display device, and FIG. 6 a is a circuit diagram of an embodiment of the invention of the earlier application, and FIG. A simplified equivalent circuit diagram, FIG. 7 is a time chart explaining the operation of this embodiment, FIG. 8 is a time chart explaining the waveforms of the write pulse, sustain pulse, and erase pulse, and FIG. 9 is the erasing effect. FIG. 10 is a circuit diagram of one embodiment of the drive circuit according to the present invention, and FIG.
0 is a time chart for explaining the operation of the circuit shown in FIG. 12, FIG. 12 is a circuit diagram for providing a write voltage of an embodiment of the drive circuit according to the present invention, and FIG. 13 is a time chart for the circuit shown in FIG. 12. . 2 and 5 are electrodes, 3 and 3 are dielectric layers, 4 is a fluorescent layer, and X1 to
Xm is a selection side electrode, Y1 to Yn are scanning side electrodes, 1 is a sustain pulse supply circuit, and 3 is an erase pulse circuit.

Claims (1)

[Scope of Claims] 1. In a thin film electroluminescent panel having a hysteresis characteristic between applied voltage and luminance, one of the electrodes arranged in a matrix shape in directions perpendicular to each other is used as a scanning side electrode, a circuit that applies a bipolar sustaining voltage pulse to all scanning electrodes at once from the scanning side electrode, the other being a selection side electrode, based on a resonance phenomenon in which inductance and the panel are regarded as capacitive elements; a circuit connected to each of the electrodes and applying a bipolar erase voltage pulse to a selected scanning electrode during a period in which the bipolar sustain voltage pulse is O voltage; drive unit. 2. In a thin film electroluminescent panel having a hysteresis characteristic between applied voltage and luminance, one of the electrodes formed in a matrix in directions orthogonal to each other is used as a scanning side electrode, and the other is used as a selection side electrode, A circuit that applies a bipolar sustaining voltage pulse to all scanning electrodes at once based on a resonance phenomenon in which the inductance and the panel are regarded as capacitive elements from the scanning side electrode, and a circuit connected to each scanning side electrode and selected. A circuit that applies an erase voltage pulse to the selected scanning electrode is connected to each of the selection side electrodes, and generates a write voltage pulse that is the difference between the write voltage and the voltage obtained from the erase pulse application circuit at the time of writing. A drive device for a thin film electroluminescent panel, comprising a circuit;