JPS5847855B2 - Manufacturing method of semiconductor device - Google Patents
Manufacturing method of semiconductor deviceInfo
- Publication number
- JPS5847855B2 JPS5847855B2 JP53082190A JP8219078A JPS5847855B2 JP S5847855 B2 JPS5847855 B2 JP S5847855B2 JP 53082190 A JP53082190 A JP 53082190A JP 8219078 A JP8219078 A JP 8219078A JP S5847855 B2 JPS5847855 B2 JP S5847855B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- thin plate
- semiconductor wafer
- force
- adhesive thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title claims description 50
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 239000000853 adhesive Substances 0.000 claims description 20
- 230000001070 adhesive effect Effects 0.000 claims description 20
- 238000005520 cutting process Methods 0.000 claims description 8
- 238000003754 machining Methods 0.000 claims description 6
- 238000000034 method Methods 0.000 description 17
- 238000005336 cracking Methods 0.000 description 4
- 238000003825 pressing Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 125000000391 vinyl group Chemical group [H]C([*])=C([H])[H] 0.000 description 2
- 229920002554 vinyl polymer Polymers 0.000 description 2
- 229910017398 Au—Ni Inorganic materials 0.000 description 1
- 229910015367 Au—Sb Inorganic materials 0.000 description 1
- 230000001154 acute effect Effects 0.000 description 1
- 210000003484 anatomy Anatomy 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000006748 scratching Methods 0.000 description 1
- 230000002393 scratching effect Effects 0.000 description 1
Landscapes
- Dicing (AREA)
Description
【発明の詳細な説明】
本発明は半導体装置の製造力法、特に半導体ウエーハか
ら多数の半導体素子を得る力法の改良に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing semiconductor devices, and particularly to an improvement in a method for producing a large number of semiconductor elements from a semiconductor wafer.
一般に、トランジスタ、ダイオード、サイリスク等の半
導体装置は、一枚の半導体ウエーハに多数の半導体素子
を形成し、各半導体素子を切断分離して形成される。Generally, semiconductor devices such as transistors, diodes, and SIRISK are formed by forming a large number of semiconductor elements on one semiconductor wafer and cutting and separating each semiconductor element.
例えば、第1図に示すように、多数の半導体素子2,2
を形或した半導体ウエーハ1を、ビニールシ一ト等の接
着性薄板3に接着して、ダイヤモンドポイントにより各
半導体素子2,2間に引掻傷による刻目線4を刻設する
。For example, as shown in FIG.
The shaped semiconductor wafer 1 is adhered to an adhesive thin plate 3 such as a vinyl sheet, and score lines 4 are made by scratching between each semiconductor element 2 using a diamond point.
次いで、第2図に示すように、半導体ウエーハ1を下側
にしてゴム、スポンジ等の弾性板5上に載置し、接着性
薄板3の上から剛性ローラ6で押圧して、半導体ウエー
ハ1に撓屈力を作用させて、前記刻目線4から結晶力向
に沿って切断面7を形戒する。Next, as shown in FIG. 2, the semiconductor wafer 1 is placed on an elastic plate 5 made of rubber, sponge, etc., with the semiconductor wafer 1 facing downward, and the rigid roller 6 is pressed from above the adhesive thin plate 3 to release the semiconductor wafer 1. A bending force is applied to shape the cut surface 7 from the score line 4 along the crystal force direction.
一力向の切断か終ると、前記の方向と90’角度のずれ
た力向について同様に行なう。Once cutting in one force direction is completed, the same process is performed for a force direction shifted by an angle of 90' from the previous direction.
こののち、要すれば第3図に示すように、接着性薄板3
を引伸して、各半導体素子2,2間を離間せしめる。After this, if necessary, as shown in FIG.
is enlarged to separate the semiconductor elements 2, 2 from each other.
上記の力法によれば、ローラ6で押圧して半導体ウエー
ハ1をクラツキングするブレーキング工程が必要で煩雑
であるのみならず、このクラツキングにより切断面7が
斜め方向に生ずるので、各半導体素子2に鋭角部が形成
され、ブレーキング工程または後のマウント工程等にお
いて、前記鋭角部か破損しやすいという欠点かあった。According to the force method described above, not only is the braking process of cracking the semiconductor wafer 1 by pressing it with the roller 6 necessary and complicated, but also the cutting surface 7 is formed in an oblique direction due to this cracking, so that each semiconductor element 2 There is a drawback that an acute corner is formed on the rim, and the sharp corner is easily damaged during the braking process or the subsequent mounting process.
なお、上記力法の他に、レーザスクライバを用いたりダ
イシングソウを用いて比較的深い溝を形或する力法もあ
るが、クラツキング工程を必要とする点では前記従来力
法と軌を一にするものである。In addition to the above-mentioned force method, there is also a force method that uses a laser scriber or a dicing saw to form relatively deep grooves, but these methods are on the same level as the conventional force method in that they require a cracking process. be.
それゆえ、本発明の主たる目的は、クランキング工程を
必要としないで半導体ウエーハから多数の半導体素子を
形成する方法を提供することにある。Therefore, a primary object of the present invention is to provide a method for forming a large number of semiconductor devices from a semiconductor wafer without requiring a cranking process.
本発明を要約すると、多数の半導体素子を形威し接着性
薄板に貼付けた半導体ウエーハに、力p工残り代か5〜
30μの溝を形或し、しかるのちに接着性薄板を引張っ
て前記加工残り代部分を切断する工程を含むことを特徴
とする。To summarize the present invention, a semiconductor wafer in which a large number of semiconductor elements are shaped and attached to an adhesive thin plate is coated with a force p.
The method is characterized in that it includes a step of forming a groove of 30 μm, and then cutting the unprocessed portion by pulling the adhesive thin plate.
本発明の上述の目的およびその他の目的と特徴は、図面
を参照して行なう以下の詳細な説明から一層明らかとな
ろう。The above objects and other objects and features of the present invention will become more apparent from the following detailed description with reference to the drawings.
第4図および第5図は本発明方法の各工程の縦断面図を
示す。4 and 5 show longitudinal cross-sectional views of each step of the method of the invention.
まず、第4図に示すように、多数の半導体素子12.1
2を形成した半導体ウエーハ11を、ビニールシ一ト等
の接着性薄板13に貼付け、グイシングソウにより各半
導体素子12,12間にカロエ残り代tか5〜30μの
溝14を形成する。First, as shown in FIG. 4, a large number of semiconductor elements 12.1
The semiconductor wafer 11 on which 2 has been formed is attached to an adhesive thin plate 13 such as a vinyl sheet, and a groove 14 of 5 to 30 .mu.m is formed between each semiconductor element 12 using a gussing saw.
すなわち、この構14の深さは半導体ウエーハ11の厚
さTから前記カロエ残り代tを差弓いたもので、半導体
ウエーハ11の厚さによって異なるものである。That is, the depth of this structure 14 is the thickness T of the semiconductor wafer 11 minus the remaining amount t of the wafer, and varies depending on the thickness of the semiconductor wafer 11.
次に第5図に示すように、接着性薄板13を横力向に引
張る。Next, as shown in FIG. 5, the adhesive thin plate 13 is pulled in the direction of the lateral force.
この引張力によって前記溝14の底部の力日工残り代部
分か切断され、かつ接着性薄板13か引伸されて各半導
体素子12.12間か寸法Lだけ離間せしめられる。This tensile force cuts the remaining portion of the bottom of the groove 14 and stretches the adhesive thin plate 13 to space the semiconductor elements 12, 12 apart by a distance L.
すなわち、本発明によれば、第2図に示したようなロー
ラ6で半導体ウエーハを押圧してクランキングする工程
(直交する2力向に各一回ずつ計2回)か省略できるの
である。That is, according to the present invention, the step of pressing and cranking the semiconductor wafer with the roller 6 as shown in FIG. 2 (twice in total, once in each of two perpendicular force directions) can be omitted.
なお、前記溝14の幅は特に重要ではないが、その方0
工残り代tは特定の範囲内に設定する必要かある。Note that the width of the groove 14 is not particularly important;
Is it necessary to set the remaining machining allowance t within a specific range?
もし力D工残り代tか5μ未満であれば、ダイシング加
工中またはダイシング加工後の剥離時等に半導体素子1
2,12が切断されて取扱いか困難になる。If the remaining force D is less than 5μ, the semiconductor element 1 is removed during dicing or when peeled off after dicing.
2 and 12 are cut, making it difficult to handle.
また別の理由として裏而オーミツク金属(Au−Ni,
Ti一Au,Ti Au−Sb等)の切断には加工残
り代5μ以上の破断時の衝撃か必要であることか実験上
確認された。Another reason is that ohmic metals (Au-Ni,
It has been experimentally confirmed that for cutting Ti-Au, Ti-Au-Sb, etc., it is necessary to apply an impact at breakage with a residual machining allowance of 5μ or more.
一方、力p工残り代tか30μを超えると、後の接着性
薄板13の引張力によって加工残り代剖分か円滑に切断
できなくなる。On the other hand, if the force (p) exceeds 30 μ, the remaining amount (t) cannot be cut smoothly due to the tensile force of the adhesive thin plate 13.
従って、力口工残り代の寸法tは5〜30μの範囲内に
限定される。Therefore, the dimension t of the remaining force machining allowance is limited to within the range of 5 to 30 microns.
また、接着性薄板13を引張って半導体ウエーハ11の
カロ工残り代部分を切断すると同時に、その引張力によ
って接着性薄板13か伸張されて、各半導体素子12.
12間か適当間隔したけ離れるので、各半導体素子12
.12の周辺部か傷付くことかない。Furthermore, when the adhesive thin plate 13 is pulled to cut the remaining part of the semiconductor wafer 11, the adhesive thin plate 13 is stretched by the tensile force, and each semiconductor element 12.
Since each semiconductor element 12 is separated by an appropriate interval
.. There will be no damage to the surrounding area of 12.
さらに、各半導体素子12.12の下面の接着性薄板1
3が放射力向に伸張することによって、実質的に半導体
素子12と接着性薄板13との接着力が弱まり、かつ従
って後の接着性薄板13から各半導体素子12を剥離し
て放熱板に固着する際に、その剥離作業が極めて容易か
つ確実に行なえるという利点もある。Further, the adhesive thin plate 1 on the bottom surface of each semiconductor element 12.
3 extends in the direction of the radial force, the adhesive force between the semiconductor element 12 and the adhesive thin plate 13 is substantially weakened, and each semiconductor element 12 is therefore peeled off from the subsequent adhesive thin plate 13 and fixed to the heat sink. Another advantage is that the peeling operation can be performed extremely easily and reliably.
なお、上記接着性薄板13の伸張工程を、曲面状の定盤
上で実施することは、各半導体素子12の切断をより容
易かつ確実にする。Note that carrying out the process of stretching the adhesive thin plate 13 on a curved surface plate makes cutting of each semiconductor element 12 easier and more reliable.
このときの定盤の曲率半径は半導体素子12の寸法にも
よるか100wIl前後が適当である。The radius of curvature of the surface plate at this time is suitably about 100 wIl depending on the dimensions of the semiconductor element 12.
第6図は第4図に対応する他の例の縦断面図で、溝15
か■字状になっている点を除いては第4図と同様であり
、同一部分または対応剖分には同一参照符号を付したの
で、その説明を省略する。FIG. 6 is a longitudinal sectional view of another example corresponding to FIG.
It is the same as that in FIG. 4 except that it is shaped like a square, and the same parts or corresponding anatomy are given the same reference numerals, so their explanation will be omitted.
このような溝15を形戒する場合でも、その加工残り代
tを5〜30μの範囲内に設定することによって、前記
と同様の効果か得られるものである。Even when forming such a groove 15, the same effect as described above can be obtained by setting the remaining machining allowance t within the range of 5 to 30 μ.
またU字状の溝でも同様である。The same applies to U-shaped grooves.
本発明は以上のように、多数の半導体素子を形成した半
導体ウエーハを接着性薄板に貼付け、前記半導体ウエー
ハに力p工残り代か5〜30μの溝を形成し、しかるの
ちに前記接着性薄板を引張って前記加工残り代部分を切
断する工程を含むことを特徴とするものであるから、ロ
ーラにより押圧するクラツキング゛工程を省略すること
かでき、しかも各半導体素子の周辺部を損傷することか
ないという効果を奏する。As described above, in the present invention, a semiconductor wafer on which a large number of semiconductor elements have been formed is attached to an adhesive thin plate, a groove of 5 to 30 μm in thickness is formed on the semiconductor wafer, and then a groove is formed on the adhesive thin plate. Since this method includes the step of cutting the unprocessed portion by pulling the material, the cracking step of pressing with a roller can be omitted, and the peripheral portion of each semiconductor element will not be damaged. This effect is achieved.
第1図ないし第3図は従来の半導体装置の製造方法にお
ける各工程の半導体ウエーハの縦断面図、第4図および
第5図は本発明の半導体装置の製造力法を説明するため
の各工程における半導体ウエーハの縦断面図、第6図は
本発明の他の実施例における一工程の半導体ウエーハの
縦断面図である。
11・・・・・・半導体ウエーハ、12・・・・・・半
導体素子、13・・・・・・接着性薄板、14.15・
・・・・・溝。1 to 3 are vertical cross-sectional views of a semiconductor wafer at each step in a conventional semiconductor device manufacturing method, and FIGS. 4 and 5 are each step for explaining the semiconductor device manufacturing method of the present invention. FIG. 6 is a vertical cross-sectional view of a semiconductor wafer at one step in another embodiment of the present invention. 11...Semiconductor wafer, 12...Semiconductor element, 13...Adhesive thin plate, 14.15.
·····groove.
Claims (1)
性薄板に貼付け、前記半導体ウエーハに力p工残り代が
5〜30μの溝を形成し、しかるのちに前記接着性薄板
を引張って前記加工残り代都分を切断する工程を含むこ
とを特徴とする半導体装置の製造方法。1. A semiconductor wafer on which a large number of semiconductor elements have been formed is pasted on an adhesive thin plate, a groove with a force machining remaining amount of 5 to 30 μm is formed on the semiconductor wafer, and then the adhesive thin plate is pulled to remove the machining residual amount. 1. A method of manufacturing a semiconductor device, comprising a step of cutting a portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53082190A JPS5847855B2 (en) | 1978-07-05 | 1978-07-05 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53082190A JPS5847855B2 (en) | 1978-07-05 | 1978-07-05 | Manufacturing method of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS559438A JPS559438A (en) | 1980-01-23 |
| JPS5847855B2 true JPS5847855B2 (en) | 1983-10-25 |
Family
ID=13767509
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP53082190A Expired JPS5847855B2 (en) | 1978-07-05 | 1978-07-05 | Manufacturing method of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5847855B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58159349A (en) * | 1982-03-18 | 1983-09-21 | Nec Corp | Dividing of crystal substrate |
| JP6576735B2 (en) * | 2015-08-19 | 2019-09-18 | 株式会社ディスコ | Wafer division method |
| JP2020068322A (en) * | 2018-10-25 | 2020-04-30 | 株式会社ディスコ | Wafer processing method |
-
1978
- 1978-07-05 JP JP53082190A patent/JPS5847855B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS559438A (en) | 1980-01-23 |
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