JPS5847906B2 - solid-state image sensor - Google Patents
solid-state image sensorInfo
- Publication number
- JPS5847906B2 JPS5847906B2 JP51063614A JP6361476A JPS5847906B2 JP S5847906 B2 JPS5847906 B2 JP S5847906B2 JP 51063614 A JP51063614 A JP 51063614A JP 6361476 A JP6361476 A JP 6361476A JP S5847906 B2 JPS5847906 B2 JP S5847906B2
- Authority
- JP
- Japan
- Prior art keywords
- drain
- solid
- photodiode
- conductivity type
- image sensor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Description
【発明の詳細な説明】
本発明は半導体基板上に多数の光電変換素子およひ各素
子の光学情報を取り出す走査回路を集積化した固体撮像
素子に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state image sensor in which a large number of photoelectric conversion elements and a scanning circuit for extracting optical information from each element are integrated on a semiconductor substrate.
固体撮像素子は現行のテレビジョン放送で使用されてい
る撮像用電子管並みの解像力を備える必要があり、この
ため500X500個の九電変換素子およびそれに相当
した(X,y)座標選択用いスイッチまたスイッチを開
閉する500段ずつのX走査回路、y走査回路が必要と
なる。The solid-state image sensor must have a resolution comparable to that of the imaging electron tube used in current television broadcasting, and for this reason, 500 x 500 nine-density conversion elements and equivalent (X, y) coordinate selection switches or switches are required. 500 stages of X-scanning circuits and 500-stage y-scanning circuits are required.
したがって、通常は高集積化が比較的容易で、第1図に
構造を示したように光電変換素子とスイッチ素子が一体
化構造で製作できるMOS大規模集積回路技術を用いて
作られる。Therefore, it is usually manufactured using MOS large-scale integrated circuit technology, which is relatively easy to achieve high integration, and allows the photoelectric conversion element and the switching element to be manufactured in an integrated structure, as shown in FIG.
1はy走査回路によって開閉するゲート2を備えたy座
標選択用スイッチMOS 電界効果トランジスタ(以下
MOSTと略記する)、3は絶縁膜、4はスイッチ1の
ソース接合を利用したpn接合光ダイオード、5は信号
出力線6を通してX座標選択用スイッチMOST(図示
せず)につながるスイッチ1のドレインである。1 is a y-coordinate selection switch MOS field effect transistor (hereinafter abbreviated as MOST) equipped with a gate 2 that is opened and closed by a y-scanning circuit; 3 is an insulating film; 4 is a pn junction photodiode using the source junction of switch 1; Reference numeral 5 designates the drain of the switch 1 which is connected to the X coordinate selection switch MOST (not shown) through the signal output line 6.
また7にこれらの素子を集積化するN型シリコン半導体
基板である。Further, 7 is an N-type silicon semiconductor substrate on which these elements are integrated.
上記のように構或した固体撮像素子は光電変換素子とス
イッチが一体化構造で製作できるため、集積化に適して
いる。The solid-state imaging device configured as described above can be manufactured with a photoelectric conversion device and a switch in an integrated structure, and is therefore suitable for integration.
MOSTを利用しているため低消費電力である等の利点
を有している。Since it uses MOST, it has advantages such as low power consumption.
したがって、集積化できる光ダイオードの数も比較的多
くなるが、それでもIOOXIOO個程度であり、この
種固体撮像素子は撮像用の素子を実現する上で次に挙げ
る如く重要な問題点を抱えている。Therefore, although the number of photodiodes that can be integrated is relatively large, it is still only about IOOXIOO, and this type of solid-state image sensor has the following important problems in realizing an image sensor. .
1,入射光によって発生した電荷はダイオードの持つ容
量に畜積するが、必要な信号対雑音比を得るためには所
定のダイオード容量が必要である。1. Charges generated by incident light are accumulated in the capacitance of the diode, but a predetermined diode capacitance is required to obtain the necessary signal-to-noise ratio.
pn接合ダイオードの持つ容量は一般に100μm角当
り1 9Fであり、前記信号対雑音比を獲捕するために
は50μm角が必安となる。The capacitance of a pn junction diode is generally 19F per 100 μm square, and in order to achieve the above signal-to-noise ratio, a 50 μm square is essential.
500X500個のダイオードを集積化した場合、撮像
素子のICチップサイズは25i,ya角に及び、現在
Qつサイズが通常のもので2〜3關角、最犬のものでも
7闘角であることを考慮すると、25關角ICの製作ほ
至難である。When 500 x 500 diodes are integrated, the IC chip size of the image sensor is 25i, ya square, and currently the standard Q size is 2 to 3 wafers, and even the smallest one is 7 squares. Considering this, it is extremely difficult to manufacture a 25-angle IC.
2,撮像ICを製作するためには、衆知のようにICホ
トマスクが必要であるが、現在ワンショント撮影で撮り
得るチップのサイズは10間角である。2. In order to manufacture an imaging IC, an IC photomask is required as is well known, but the size of the chip that can be photographed by one-shot imaging is currently 10 squares.
したがって、25mm角の場合はx,y方向に2つのブ
ロック、合計4つのブロックに分けて撮影し、その後各
ブロックを互につなぎ合せる方法で製作しなければなら
ない。Therefore, in the case of a 25 mm square, it must be manufactured by dividing into two blocks in the x and y directions, a total of four blocks, and then connecting each block to each other.
これはマスクの製作を難かしくするばかりでなく、分割
マスクによって作る撮像素子で得られる画像には、つな
ぎ目を反映した白(あるいは黒)線が縦横に走り画質を
低下させる。Not only does this make it difficult to manufacture masks, but the image obtained by the image sensor created by the split mask has white (or black) lines reflecting the seams running vertically and horizontally, degrading the image quality.
したがって、本発明の目的は光電変換に用いるダイオー
ドの構造を簡単にし、その占有面積すなわち撮像素子の
サイズを減らすことにあり、これを実現するため穿孔型
のダイオードを製作するようにしたものである。Therefore, an object of the present invention is to simplify the structure of a diode used for photoelectric conversion and reduce the area occupied by the diode, that is, the size of the image sensor, and to achieve this, a perforated diode is manufactured. .
以下、本発明の詳細を実施例を用いて説明する。Hereinafter, the details of the present invention will be explained using examples.
第2図は本発明の骨子を示す図である。FIG. 2 is a diagram showing the gist of the present invention.
まず、たとえば、aに示すように面方位{110}面を
持ったシリコン半導体基板8上にエッチングマスクとな
る絶縁膜9 ( S + 02がよく用いられる)を形
成し、この絶縁膜の一部にエッチング孔10をフォトエ
ッチング法によって形成する。First, for example, as shown in a, an insulating film 9 (S+02 is often used) serving as an etching mask is formed on a silicon semiconductor substrate 8 having a {110} plane, and a part of this insulating film is Etching holes 10 are formed by photo-etching.
しかる後に方位依存エッチングによって細孔11を形成
する。Thereafter, pores 11 are formed by orientation-dependent etching.
方位依存エッチングは、たとえばKOHの水溶液などの
アルカリ性溶液を用いて実現出来る。Orientation-dependent etching can be achieved using an alkaline solution, such as an aqueous KOH solution.
KOHの他にはヒドラジン、エチレンジアミン等が例で
ある。In addition to KOH, examples include hydrazine and ethylenediamine.
シリコンとKOH水溶液を例にとれは{111}面のエ
ッチング速度が{110}面にくらべて特に遅く、適当
な条件を選べば{111}面以外の面の数百分の1のエ
ッチング速度を得ることが可能である。Taking silicon and KOH aqueous solution as an example, the etching rate of the {111} plane is particularly slow compared to the {110} plane, and if appropriate conditions are chosen, the etching rate can be several hundred times lower than that of planes other than the {111} plane. It is possible to obtain.
このエッチング速度の差を利用して十分に細孔を形戒す
ることが出来る。By utilizing this difference in etching rate, the pores can be sufficiently shaped.
bに示すようにMOSTのドレイン領域となる部分の絶
縁膜をフォトエッチングにより除去.シ、公知の熱拡散
やイオン打込み法によって第1導電型の基板と逆の第2
導電型の領域12を形成する。As shown in b, the insulating film in the part that will become the drain region of the MOST is removed by photo-etching. A substrate of the first conductivity type and a second conductivity type opposite to the first conductivity type substrate are
A conductive type region 12 is formed.
ここで12−1は感光の役割を果す接合型光ダイオード
また12−2はドレインとなる。Here, 12-1 is a junction type photodiode that plays a photosensitive role, and 12-2 is a drain.
しかる後、Cに示すように熱酸化法等によって絶縁膜1
3を被着し、フォトエッチング法等によって電極接続孔
14をドレイン12−2の上に形成し、しかる後に(H
こ示すようにゲート電極15、ドレイン電極16を形戒
する。Thereafter, as shown in C, the insulating film 1 is formed by a thermal oxidation method or the like.
3, and an electrode connection hole 14 is formed on the drain 12-2 by photoetching or the like, and then (H
The gate electrode 15 and drain electrode 16 are shaped as shown.
ここで、15は周辺部に設けた走査回路(図示せず)に
よって開閉するゲートであり、16は光ダイオード12
−1の信号を取り出す信号出力線となる。Here, 15 is a gate that is opened and closed by a scanning circuit (not shown) provided at the periphery, and 16 is a photodiode 12.
This becomes a signal output line that takes out the -1 signal.
ゲ゛一ト電極この図から明らかなように本発明の光ダイ
オードは従来の平面構造(第1図)とは異なり縦型構造
になるため占有面積は大きく減らすことが可能になる。Gate Electrode As is clear from this figure, the photodiode of the present invention has a vertical structure, unlike the conventional planar structure (FIG. 1), so that the occupied area can be greatly reduced.
方位依存エッチングを使用した場合例を上に示したよう
にX方向のエッチング速度と2方向のエッチング速度は
細孔11の基板に対する面方位にも依存するが、最高で
数百倍の差を持たせることができ、2方向のエッチング
速度をX方向の100倍に選ぶことは比較的容易である
。When orientation-dependent etching is used, as shown in the example above, the etching rate in the X direction and the etching rate in the two directions also depend on the plane orientation of the pores 11 relative to the substrate, but can have a difference of several hundred times at most. It is relatively easy to select the etching rate in the two directions to be 100 times that in the X direction.
第3図aは細孔11の平面図を示したもので、細孔は同
図に示したように4つの側壁L, , L2 , L3
, L4を持つ。Figure 3a shows a plan view of the pore 11, and the pore has four side walls L, , L2, L3 as shown in the figure.
, has L4.
一片の長さを6μmとして設計した場合でも、2方向に
は100μmの深さが方位依存エッチングにより形成で
きるので、全側壁の有する表田」積は2400μm2(
6X4X10.O)となる。Even if the length of one piece is designed to be 6 μm, a depth of 100 μm in two directions can be formed by orientation-dependent etching, so the surface area of the entire sidewall is 2400 μm2 (
6X4X10. O).
したがって、本発明では6μm角で従来の平面型ダイオ
ードの場合の50μm角に相当するダイオード容量を備
えることが可能になる。Therefore, in the present invention, it is possible to provide a diode capacitance of 6 μm square corresponding to that of a conventional planar diode of 50 μm square.
これは、撮像素子全体の大きさが従来の1/10に低減
できることを意味しており、500X500の絵素が7
間角程度に収まることになる。This means that the overall size of the image sensor can be reduced to 1/10 of the conventional size, and 500 x 500 pixels can be reduced to 7
It will fit within about an angle.
また、光ダイオードを細孔型にした場合第3図bに示し
たように、光ダイオードに入射した光30は従来の平面
型ダイオードのように上面に反射することなく、向図の
矢印で示したように基板内部に向って反射を繰り返すの
で、入射光を損失なく全部吸収できる効果力Sあり、光
感度の向上にも役立つ。In addition, when the photodiode is made into a pore type photodiode, as shown in Figure 3b, the light 30 incident on the photodiode is not reflected on the top surface as in a conventional planar diode, but instead is reflected by the arrow in the figure. Since it is repeatedly reflected toward the inside of the substrate, it has the effect of absorbing all of the incident light without loss, and is also useful for improving photosensitivity.
第4図は本発明の固体撮像素子の単位となる九電変換素
子の他の実施例を示したものである。FIG. 4 shows another embodiment of a nine-density conversion element which is a unit of the solid-state image sensor of the present invention.
まず基板17上にエッチングθつマスクとなる絶縁膜1
8を形威し、この膜にエッチング孔19をフλ一トエッ
チング法によって形戒する。First, an insulating film 1 that serves as an etching mask is formed on the substrate 17.
8, and etching holes 19 are formed in this film by the λ-etching method.
しっ)る後に、方位依存エッチングによって細孔20を
形成する。After that, the pores 20 are formed by orientation-dependent etching.
その後、所定の絶縁膜18上に自己整合電極21を形成
しこれをマスクとして公知のイオン打込みや熱拡散法に
よって第2導電型の領域22を形成する。Thereafter, a self-aligned electrode 21 is formed on a predetermined insulating film 18, and using this as a mask, a second conductivity type region 22 is formed by known ion implantation or thermal diffusion method.
ここで、22−1は光ダイオード、22−2は光ダイオ
ードの信号電荷を取り出すドレインとなる。Here, 22-1 is a photodiode, and 22-2 is a drain for extracting signal charges from the photodiode.
自己整合電極21はイオン打込みあるいは熱拡散耐える
ものであればよく、熱拡散法では多結晶シリコンやMo
,W などの高融点金属などがよく用いられる。The self-aligned electrode 21 may be made of a material that can withstand ion implantation or thermal diffusion.
, W, and other high melting point metals are often used.
さらにその上にCVD(Chemical Vapor
Deposition)法によるSiO2膜やこれに
りんやほう素を添加したPSG(Phospho−si
licate Glass)やBSG(Borosil
icate Glass)で代表される第2層絶縁膜2
3を被着し、ドレイン22−2の上に電極接続孔24を
形或し、ドレイン電極25を設ける。Furthermore, on top of that, CVD (Chemical Vapor
PSG (Phospho-Si) film made by adding phosphorus or boron
licate Glass) and BSG (Borosil
The second layer insulating film 2 is represented by
3, an electrode connection hole 24 is formed on the drain 22-2, and a drain electrode 25 is provided.
本実施例は光ダイオード領域およびトレイン領域とゲー
トが自己整合で形成されるので素子の微小化が達成され
る。In this embodiment, since the photodiode region, the train region, and the gate are formed in self-alignment, miniaturization of the device can be achieved.
以上、実施例を用いて詳細に説明したように、KOH溶
液を用いた方位依存エッチングの利用により半導体基板
に穿孔型の光ダイオードを形威し、これを2次元状に配
夕1ルた本発明の固体撮像素子は、従来の固体撮像素子
より占有面積を1/10に減らすことができ、撮像素子
の製作が著しく容易になる。As described above in detail using the examples, a perforated photodiode is formed on a semiconductor substrate by using orientation-dependent etching using a KOH solution, and this is arranged in a two-dimensional manner. The solid-state image sensor of the present invention can reduce the occupied area to 1/10 of that of a conventional solid-state image sensor, and the manufacturing of the image sensor becomes significantly easier.
あるいは入射光を損失なぐ利用することができる等極め
て大きな実用価値を有している。It also has extremely great practical value, such as being able to utilize incident light without loss.
なお上記の説明では撮像素子の構成単位としてMOST
および光ダイオードの組み合せを例にとってのべたが、
本発明の趣旨を逸脱しない範囲でバイボーラトランジス
タ、光1〜ランジスタおよひ電荷移送素子の利用を考え
ることができる。In addition, in the above explanation, MOST is used as a constituent unit of the image sensor.
We took the combination of photodiode and photodiode as an example, but
It is possible to consider the use of bipolar transistors, phototransistors, and charge transfer elements without departing from the spirit of the invention.
,,図面の簡単な説明
第1図は従来の固体撮傷素子の構造、第2図は本発明に
よる固体撮像素子の断面構造、第3図は本発明による固
体撮像素子の特徴を説明する図、第4図は本発明による
固体撮像素子の別の実施例を示1一図である。,,Brief explanation of the drawings Fig. 1 shows the structure of a conventional solid-state image sensor, Fig. 2 shows the cross-sectional structure of the solid-state image sensor according to the present invention, and Fig. 3 shows the characteristics of the solid-state image sensor according to the present invention. , FIG. 4 is a diagram showing another embodiment of the solid-state imaging device according to the present invention.
Claims (1)
用MOS電界効果トランジスタを接続した光電変換素子
を一次元あるいは二次元的に配列し、かつ光電変換素子
を時間順次的に選択する走査回路を有する固体撮像素子
において、第1導電型の上記半導体基板の所定の位置に
細孔を形成し、該細孔全面に第2導電型の領域を形成し
これを光電変換用の接合型光ダイオードとし、該細孔の
第2導電型領域と離間して配置された第2導電型の領域
を該光ダイオードの信号電荷読み出し用のドレインとし
、該接合型ダイオードとドレインの間の上記半導体基板
上に絶縁膜を介してゲート電極を配置し、該ダイオード
,該ドレイン,および該ゲ一トからなるスイッチが上記
走査回路によって順次開閉し、上記接合型光ダイオード
の接合容量に入射光によって蓄積された光信号電荷を上
記ドレ1ンに取り出すことを特徴とする固体撮像素子。1. Photoelectric conversion elements each having one or more switch MOS field effect transistors connected thereto are arranged one-dimensionally or two-dimensionally on the same semiconductor substrate, and have a scanning circuit that selects the photoelectric conversion elements time-sequentially. In the solid-state imaging device, a pore is formed at a predetermined position of the semiconductor substrate of a first conductivity type, a region of a second conductivity type is formed on the entire surface of the pore, and this is used as a junction photodiode for photoelectric conversion; A second conductivity type region located apart from the second conductivity type region of the pore is used as a drain for reading out signal charges of the photodiode, and an insulated region is formed on the semiconductor substrate between the junction diode and the drain. A gate electrode is disposed through the film, and a switch consisting of the diode, the drain, and the gate is sequentially opened and closed by the scanning circuit, and an optical signal accumulated by the incident light is transferred to the junction capacitance of the junction photodiode. A solid-state imaging device characterized in that electric charges are taken out to the drain.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP51063614A JPS5847906B2 (en) | 1976-06-02 | 1976-06-02 | solid-state image sensor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP51063614A JPS5847906B2 (en) | 1976-06-02 | 1976-06-02 | solid-state image sensor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS52147017A JPS52147017A (en) | 1977-12-07 |
| JPS5847906B2 true JPS5847906B2 (en) | 1983-10-25 |
Family
ID=13234349
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP51063614A Expired JPS5847906B2 (en) | 1976-06-02 | 1976-06-02 | solid-state image sensor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5847906B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5615087A (en) * | 1979-07-18 | 1981-02-13 | Nec Corp | Solid-state image pickup element |
| JPS59130468A (en) * | 1983-12-14 | 1984-07-27 | Hitachi Ltd | solid state imaging device |
-
1976
- 1976-06-02 JP JP51063614A patent/JPS5847906B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS52147017A (en) | 1977-12-07 |
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