JPS584821B2 - Substrate for microwave integrated circuits - Google Patents
Substrate for microwave integrated circuitsInfo
- Publication number
- JPS584821B2 JPS584821B2 JP52096165A JP9616577A JPS584821B2 JP S584821 B2 JPS584821 B2 JP S584821B2 JP 52096165 A JP52096165 A JP 52096165A JP 9616577 A JP9616577 A JP 9616577A JP S584821 B2 JPS584821 B2 JP S584821B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- microwave integrated
- metal plate
- integrated circuits
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Structure Of Printed Boards (AREA)
- Waveguides (AREA)
Description
【発明の詳細な説明】
本発明は任意の位置でアース点をとった上気密封止が簡
単なマイクロ波IC基板に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a microwave IC board that has a ground point at an arbitrary position and can be easily hermetically sealed.
従来、マイクロストリップ線路と半導体素子からなるマ
イクロ波IC回路はアルミナ等の誘電体基板上に構成さ
れるが、回路の構成上、アースをとる必要がしばしば生
ずる。Conventionally, a microwave IC circuit consisting of a microstrip line and a semiconductor element is constructed on a dielectric substrate such as alumina, but it is often necessary to provide grounding due to the construction of the circuit.
マイクロ波の領域ではアースをとる位置が回路により決
まってしまうので基板の側面までアース線をもってくる
ことができないことが多い。In the microwave range, the location of the ground is determined by the circuit, so it is often not possible to bring the ground wire to the side of the board.
この様々場合、基板に穴をあけて裏面のアース面との間
でアースをとる。In these various cases, a hole is made in the board and grounded between it and the ground plane on the back side.
しかし、この様にすると基板の両面の間で気密を保つこ
とは難しく、基板の上面を封止しても信頼性の面から半
導体素子をチップのまま使用することができない。However, in this case, it is difficult to maintain airtightness between both surfaces of the substrate, and even if the upper surface of the substrate is sealed, the semiconductor element cannot be used as a chip from the viewpoint of reliability.
その為、素子の電気的特性をある程度犠牲にしてケース
入りの素子を使用するか、エポキシ等の樹脂で半導体チ
ップを覆って使用していた。For this reason, the electrical characteristics of the element have been sacrificed to some extent to use a cased element, or the semiconductor chip has been covered with a resin such as epoxy.
特性上、半導体素子をチップのまま使用する必要のある
場合には、基板を入れるケース全体を気密封止して使用
していた。Due to its characteristics, when it is necessary to use a semiconductor element as a chip, the entire case containing the substrate is hermetically sealed.
また、高入出力半導体素子は放熱をよくしなければなら
ない為、他の回路と同一基板上に使用することはできず
、ケース入りの素子を放熱をよくして取り付けるか、そ
の部分だけベリリア等の熱伝導率のよい基板を金属板に
ろう付けして、その上に半導体チップをおいて使用して
いた。In addition, high input/output semiconductor devices must have good heat dissipation, so they cannot be used on the same board as other circuits, so it is necessary to install the device in a case with good heat dissipation, or to use beryllia for that part. A substrate with good thermal conductivity was brazed to a metal plate, and a semiconductor chip was placed on top of it.
本発明は回路パターン上必要なアース点で基板に穴をあ
け、基板裏面にろう付けした薄い金属板との間で導通さ
せることを特徴とし、その目的はアースを裏面との間で
とり々から基板の上面を封止することによって完全な気
密封止ができ、半導体素子を高入出力素子も含めてチッ
プのまま使用できる様にすることにある。The present invention is characterized in that holes are made in the board at ground points necessary for the circuit pattern, and electrical continuity is established between the holes and a thin metal plate brazed to the back of the board. By sealing the upper surface of the substrate, complete hermetic sealing can be achieved and the semiconductor elements, including high input/output elements, can be used as chips.
以下詳細に説明する。第1図及び第2図は本発明の一実
施例図であって、第1図は平面図、第2図は第1図にお
けるA−A断面の拡大図である。This will be explained in detail below. 1 and 2 are views showing one embodiment of the present invention, in which FIG. 1 is a plan view and FIG. 2 is an enlarged cross-sectional view taken along the line A--A in FIG. 1.
第1図及び第2図において、1は誘電体基板、2.2′
は回路パターンを構成する金属層、3は薄い金属板、4
はアース用の穴、5は気密封止用のキャップ、6は半導
体チップ、7はボンデイング線である。In Figures 1 and 2, 1 is a dielectric substrate, 2.2'
3 is a metal layer constituting a circuit pattern, 3 is a thin metal plate, 4 is a metal layer that constitutes a circuit pattern,
5 is a hole for grounding, 5 is a cap for airtight sealing, 6 is a semiconductor chip, and 7 is a bonding wire.
金属板3は例えば基板1をメタライズ後ろう付けしたも
のであり、アース穴4の側面をメタライズ又はメッキす
ることにより、回路パターン2,2′と電気的につなが
っている。The metal plate 3 is, for example, the substrate 1 which has been metalized and then brazed, and is electrically connected to the circuit patterns 2, 2' by metalizing or plating the side surface of the ground hole 4.
基板1がセラミックの場合、その大きさが、10mm角
程度以下であると金属板3は薄く々くとも問題はないが
、基板1が大きくなると基板1と金属板3の熱膨張率の
違いによる応力が基板1にかかり、基板1にクラツクが
入る。When the substrate 1 is made of ceramic, there is no problem even if the metal plate 3 is thin as long as the size is about 10 mm square or less, but if the substrate 1 becomes large, the difference in coefficient of thermal expansion between the substrate 1 and the metal plate 3 will cause problems. Stress is applied to the substrate 1, causing a crack in the substrate 1.
しかし、金属板3の厚さを0.05mm程度にするとク
ラツクが入るのをさけることができ、気密封止取扱いに
充分な強度を有する。However, if the thickness of the metal plate 3 is set to about 0.05 mm, cracks can be avoided and the metal plate 3 has sufficient strength for hermetically sealed handling.
基板1がアルミナ等のセラミックの場合は熱膨張率の近
い金属コバールを使うと、金属板3を厚くしても大きな
基板1とろう付けすることができるが、コバールは電気
抵抗が銅などに比べて大きく、電気的特性の劣化を招く
。If the substrate 1 is made of ceramic such as alumina, if you use Kovar, a metal with a similar coefficient of thermal expansion, you can braze it to a larger substrate 1 even if the metal plate 3 is thicker, but Kovar has a lower electrical resistance than copper etc. It is large and leads to deterioration of electrical characteristics.
しかし、本実施例の様に薄い金属板3を用いると、銅板
を使用することが可能となる。However, if a thin metal plate 3 is used as in this embodiment, a copper plate can be used.
また、コパールは熱伝導率が悪い為に、基板1として、
べリリア等の熱伝導率のよいものを使用しても高入出力
半導体素子を使用することはできないが、本実施例は熱
伝導率のよい銅板を使用することができる為、これを放
熱板に取り付けることにより、従来ほとんど不可能であ
った高入出力半導体素子をチップのまま一枚の基板上で
使用するということが可能となる。In addition, since copal has poor thermal conductivity, as substrate 1,
Although it is not possible to use a high input/output semiconductor element even if a material with good thermal conductivity such as Beryllia is used, in this example, a copper plate with good thermal conductivity can be used, so this can be used as a heat sink. By attaching the chip to the chip, it becomes possible to use a high input/output semiconductor element as a chip on a single substrate, which was almost impossible in the past.
また、アース穴に金属を埋め込むことにより、これのみ
によって裏面との間でアースをとり、気密にすることが
考えられるが、この場合も基板と金属の熱膨張率の違い
によって基板にクラツクが入りやすく、充分小さい穴以
外は実現出来ない。Also, by embedding metal in the ground hole, it is possible to ground the back side and make it airtight, but in this case too, cracks may occur in the board due to the difference in thermal expansion coefficient between the board and the metal. It is easy to achieve this, and it cannot be achieved with anything other than a sufficiently small hole.
また完全に気密を保つことも困難である。It is also difficult to maintain complete airtightness.
本実施例の場合は穴の側面に金属を付けるだけでよいの
で、基板にクラックが入る心配はなく、穴の形、大きさ
もある程度の任意性があり、スリット等により広い範囲
でアースをとることも可能となる。In the case of this example, it is only necessary to attach metal to the side of the hole, so there is no need to worry about cracks in the board, and the shape and size of the hole can be arbitrary to a certain extent, and it is possible to ground over a wide area using slits, etc. is also possible.
また、本実施例は基板の両面の間で気密を保っているの
で、基板の上面をキャップによって封止することにより
、回路パターン全体が容易に気密封止される。Furthermore, since this embodiment maintains airtightness between both surfaces of the substrate, the entire circuit pattern can be easily hermetically sealed by sealing the top surface of the substrate with a cap.
従って、第1図及び第2図に示すように半導体素子をチ
ップのまま使用できる。Therefore, the semiconductor element can be used as a chip as shown in FIGS. 1 and 2.
以上説明したように、本発明は大きな面積の基板を用い
たマイクロ波IC回路で、回路上必要な位置で裏面との
間でアースがとれ、かつ簡単に完全気密封止ができるの
で、半導体素子をチップのまま使用でき、熱伝導率のよ
い基板を用いることによって高入出力素子をもチップの
まま一枚の基板上で使用することができる。As explained above, the present invention is a microwave IC circuit using a large-area substrate, which can be grounded to the back surface at necessary positions on the circuit, and can be easily and completely hermetically sealed. can be used as a chip, and by using a substrate with good thermal conductivity, high input/output elements can be used as chips on a single substrate.
第1図及び第2図は本発明の一実施例図であって、第1
図はその平面図、第2図は第1図におけるA−A断面の
拡大図である。
1・・・誘電体基板、2,2・・・回路パターンを構成
する金属層、3・・・薄い金属板、4・・・アース用の
穴、5・・・気密封止用キャップ、6・・・半導体チッ
プ、7・・・ボンデイング線。FIG. 1 and FIG. 2 are diagrams showing one embodiment of the present invention.
The figure is a plan view thereof, and FIG. 2 is an enlarged view of the AA cross section in FIG. 1. DESCRIPTION OF SYMBOLS 1... Dielectric substrate, 2, 2... Metal layer constituting a circuit pattern, 3... Thin metal plate, 4... Hole for grounding, 5... Cap for airtight sealing, 6 ... Semiconductor chip, 7... Bonding wire.
Claims (1)
穴またはスリットが開けられた基板の裏面全面に薄い金
属板を接着して前記穴またはスリットの裏面側の開口部
を密閉するとともに接地電極を形成し、前記基板の表面
に前記穴またはスリットを通して前記接地電極と導通す
る接地点を形成したことを特徴とするマイクロ波集積回
路用基板。1. Glue a thin metal plate to the entire back surface of a substrate with holes or slits made at necessary positions on the circuit pattern of the microwave integrated circuit to seal the openings on the back side of the holes or slits and form a ground electrode. A substrate for a microwave integrated circuit, characterized in that a grounding point that is electrically connected to the ground electrode through the hole or slit is formed on the surface of the substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52096165A JPS584821B2 (en) | 1977-08-12 | 1977-08-12 | Substrate for microwave integrated circuits |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52096165A JPS584821B2 (en) | 1977-08-12 | 1977-08-12 | Substrate for microwave integrated circuits |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5431569A JPS5431569A (en) | 1979-03-08 |
| JPS584821B2 true JPS584821B2 (en) | 1983-01-27 |
Family
ID=14157714
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP52096165A Expired JPS584821B2 (en) | 1977-08-12 | 1977-08-12 | Substrate for microwave integrated circuits |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS584821B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6138366Y2 (en) * | 1981-02-06 | 1986-11-06 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5210077A (en) * | 1975-07-15 | 1977-01-26 | Toshiba Corp | Method for manufacturing super high frequency integrated circuit |
-
1977
- 1977-08-12 JP JP52096165A patent/JPS584821B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5431569A (en) | 1979-03-08 |
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