JPS5849061B2 - Fault detection method - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a fault detection method for an electronic switching system having a processor that manages the system.Recently, in the technical field of data processing, processing system configurations using a multiprocessor method have been developed. has been widely put into practical use.

This multiprocessor type processing system uses a plurality of processors to process a plurality of tasks independently and simultaneously, and has the following advantages.

In other words, even if one processor fails, the entire system will not come to a complete halt.
A building system with fail-soft properties and the ability to gradually expand the scale of the system as processing operations increase.
It has a building block property and also has high affinity for LSI.

In the technical field of telephone exchanges, development of electronic exchanges based on multiprocessor systems has begun, taking note of these advantages.

FIG. 1 is a block diagram showing an example of the case where this multiprocessor system is applied to a time division switching device.

In the figure, SU1 to SUn are call path subunits including various trunks such as incoming trunk ICT, outgoing trunk OGT, incoming register trunk IRT, outgoing center trunk OST, and time division network NW, and are relays between stations. Lines or subscriber lines are connected and accommodated.

The TDJ is a time-division junctor that performs interconnection between each channel subunit SU, or loopback connection within each channel subunit SU.

Further, PCP, to PCPn are the communication path subunits S
Each of U1 (this is a peripheral control device prepared in one-to-one correspondence, and uses a processing program stored in the attached local memory LM to drive the communication path network NW and drive the relays of each trunk type. , and even perform trunk or subscriber scanning autonomously.

A plurality of CCPs are prepared to control the entire system, and each CCP is a central control unit that executes processing based on a processing program stored in a local memory IJLM attached to each CCP.
M is various data related to calls, received numeric information and outgoing trunk O
These are a plurality of common memories in which translation tables and the like indicating correspondence with GT routes are stored.

Each of the central control units CCP is connected on the one hand to a common memory IJcM via a memory bus MBUS, and on the other hand to a peripheral control unit PCP-1 via a peripheral bus PBUS.

Sara, IO are input/output devices such as typewriters and printers, prepared for man-machine communication, etc., and DCHo, DCH1 is an interface between the input/output devices IO and the central control unit CCP. It is a data channel device for taking data.

Here, the input/output device IO connected to both data channel devices DCHo and DCH1 is typically shown as one each, but usually a plurality of various devices are connected, and both data channel devices Each of DCHo and DCH is connected to each of a plurality of central control units CCP.

The multiprocessor type electronic exchange configured in this manner operates as follows.

That is, when the peripheral control device PCP- detects that a state change has occurred due to trunk scanning or the like, the peripheral control device PCP- sends that information to the queue assigned to the peripheral control device PCP-1.
Connect to.

When each central control unit CCP completes the process being executed, it goes to check the queue assigned to each peripheral control unit PCP, extracts the information connected thereto, and starts executing the corresponding predetermined process. do.

When the processing is completed, the central control unit CCP stores the call correspondence information obtained as a result of the processing at a predetermined address in the common memo IJcM.

Next, when a state change occurs for that call, the central control unit CCP that has retrieved the information queued by the corresponding peripheral control unit PCP- uses the information corresponding to that call in the common memo IJcM. The process is executed and the result is stored again in the common memo IJcM.

At the execution stage of each process, the central control unit CCP transfers information to the peripheral control unit PCP- as necessary to perform desired control processing.

The exchange processing operation progresses by sequentially repeating such processing.

A specific example will be explained below. For example, assume that the incoming trunk ICT of channel subunit SU is activated by the previous station.

When the peripheral control device PCP detects activation of the incoming trunk ICT by trunk scanning, it connects this information together with trunk number information to the assigned queue.

When the central control unit CCP, which has completed the processing being executed, obtains the information from the queue of the peripheral control unit PCP, it selects an empty register trunk IRT, and establishes a path between this incoming register trunk IRT and the incoming trunk ICT. Go hunting.

Based on the results of this series of processing, the common memo
The content of the address corresponding to 7J'f' is rewritten, and the path information is transferred to the peripheral control device PCP.

The peripheral control device PCP sets a communication path on the time division network NW based on this path information and connects the input trunk IC.
Connect T and input register trunk IRT.

Processing proceeds sequentially in this order, receiving number information from the previous station, selectively connecting the outgoing trunk OGT and outgoing center trunk OST, sending information to the subsequent station, etc. The trunk ICT and outgoing trunk OGT are connected.

In a multiprocessor type electronic switching system, a specific processor is used to perform system management, that is, system failure management, equipment online management, maintenance operation work, man-machine interface control (including I/O control), etc. There are many.

A processor that performs such processing is called a system management processor (MCP).

This MCP is no different from other CCPs in terms of hardware configuration, and the MCP installed inside the CCP is controlled by an external control circuit.
In many cases, the programs on the LM of each CCP are differentiated in terms of processing so that they have the functions described above, such as by setting up a display.

In other words, the CCP in which the MCP display within the CCP is set is M
CP, and the CC whose MCP display in the CCP is erased
P operates as a general CCP.

Failures of each device in the system (CCP, PCP, etc.) are notified to the MCP, and from the MCP via I/O,
The maintainer will be informed.

In the multiprocessor type electronic exchange system shown in Figure 1, each CCP has the job of extracting and processing information connected to the PCP's queue as described above, and the job of transferring information to the PCP as necessary. , the work of storing call information on the CM is shared between the parties, which is a so-called load sharing system.

That is, each CCP shares and processes the load that should be processed by the entire system.

When adopting such a load sharing format, one CCP
Even if a CCP stops processing calls, the system as a whole will not be significantly affected (failsoftness), but on the other hand, even if one CCP becomes impaired and stops functioning, it will not be detected from the outside at all. It also has the disadvantage that it can sometimes occur.

That is, for example, if a certain CCP causes a failure in its hardware, if it can notify the MCP itself, the MCP can take the failed CCP offline or notify maintenance personnel of the failure. However, in the case of a failure in which the CCP cannot notify the MCP that the CCP has stopped functioning, such as when the program goes out of control due to a failure written in the hardware, or there is a bug in the program. , it is neither possible to detect the occurrence of the failure nor to notify maintenance personnel.

Furthermore, it is possible that the faulty CCP goes out of control and destroys memory that is commonly used with other CCPs, such as CM, and an abnormality that occurs in one CCP may spread to the entire system.

Even in conventional electronic switching systems, if a program goes out of control due to a failure in the central control unit, or if the central control unit stops functioning due to a bug in the program, the central control unit itself cannot detect this. In such cases, the normality of the central control unit can be checked by installing an external monitoring device, connecting it to the communication path terminal, making periodic calls from it, and confirming that a dial tone is returned. I took steps to confirm.

However, in a load-sharing multiprocessor electronic switching system, there are multiple processors (CCPs), so
Even if one CCP fails, as long as the other CCPs are operating normally, the external monitoring device described above can detect that CCP.
An abnormality in P cannot be detected.

In order to eliminate such drawbacks, the present invention provides communication means between processors that process calls (means for determining that processor as a failure if the frequency of information output from this processor is less than a predetermined frequency). When the means considers a processor to be a failure, it is characterized by notifying the processor that performs system management, and its purpose is to improve the stability and operation rate of the system, which will be described in detail below. explain.

In a multi-processor type electronic switching system, when processing a call, each CCP checks the queue of the PCP and issues control commands to the PCP after completing the processing being executed. PCP & this command is issued within a certain frequency range.

This frequency varies depending on the size of the traffic involved in the electronic exchange system, and generally speaking, the larger the traffic amount, the higher the frequency, and the smaller the truck amount, the lower the frequency.
Even when there is no traffic, CCP is P.
Since the process of checking the queue of the CP is performed, unless the CCP is in trouble, the CCP always issues commands to the PCP at a certain frequency or more.

The present invention has been made with attention to this point.

FIG. 2 is a diagram showing an example of a failed CCP detection method according to the present invention.

In the figure, FDC is a CCP failure detection circuit, and MCP
is a processor that performs system management.

The FDC is connected to the outputs of all CCPs to the PBUS and checks whether a command is issued from the CCP to the PCP1.

As mentioned above, the CCP's commands to the PCP include commands to retrieve information connected to the PCP queue, and PCP commands.
There are instructions for transmitting path information to be connected by CP.

The FDC checks for each CCP whether or not commands to the PCP are issued more frequently than a predetermined frequency, and faults CCPs that issue commands to the PCP less frequently than the predetermined frequency. and notify the MCP accordingly.

Upon receiving the notification, the MCP determines whether the CCP is faulty, takes the CCP offline, and sends it to the maintainer.
Let them know that the CCP is the problem.

FIG. 3 is a functional block diagram of the FDC.

The signal lines drawn from the output section of each CCP to the PBUS are connected to respective detection circuits (DET1 to DETm), and it is checked whether a command has been issued to the PBUS from each CCP, and whether or not a command has been issued to the PBUS is checked. When the DET detects this, it outputs an output signal from the counting circuit (CNT).

A timing circuit (TC) outputs a timing signal at a constant period for all CNTIs.

If more than a certain number of output signals are received from the DET during the interval of timing signals received from the TC, the CNT outputs the CCP.
is determined to be normal, and if a certain number of output signals are not received, the CCP determines it to be a failure and sends a signal to the interrupt line to the MCP.
Let Piko know.

In FIG. 3, communication to the MCP is performed by interrupting the interrupt line (although this has been explained in detail, it is of course possible to use a method in which the MCP periodically looks up the FDC instead of communicating by interrupting.

In addition, in the example shown here, the MCP is
Although we have explained the case where the MCP is different from the CP, (as described above, the MCP can have a hardware configuration that is not different from the CCP, and even in that case, the operation of each device regarding the fault detection method of the present invention is , as described above.

Although the electronic exchange system having the configuration shown in FIG. 2 has been described above, the present invention is not limited to this only.
General (multiple processors are provided to process this call,
It can be applied to an electronic switching system that is equipped with a processor that manages the system.

That is, in a system where information for processing a call is constantly transmitted between processors that process calls, if the frequency of communication from one processor to another is less than a certain value, That processor can be considered the fault.

As explained above, CCP becomes an obstacle and MCP is initiated by oneself.
Even if the FDC cannot notify the PCP that the command has not been issued from the CCP, the MCP
By notifying the system, the MCP can learn of the faulty CCP, disconnect the CCP from the system, and notify the maintenance staff accordingly. System stability and operation rate can be improved.

The present invention is applicable not only to electronic switching systems that handle telephones, but also to data switching systems and telex switching systems.

Furthermore, it can be applied not only to time-division electronic exchange systems but also to space-division electronic exchange systems.

In other words, the electronic switching system can be used regardless of the communication channel method.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the parts of a multiprocessor type time-division electronic switching system closely related to the present invention, and FIG. 2 is an embodiment of the configuration of the electronic switching system according to the present invention. FIG. 3 is an example of a functional block diagram of a CCP failure detection circuit according to the present invention. CCP...Central pedestal unit, MCP...System management processor, FDC...CCP failure detection circuit.

Claims (1)

[Claims] 1 In an electronic switching system having a processor that performs system management, a communication means for transmitting call processing information between the processors that perform call processing is provided, and the frequency of information output from the communication means In the following cases, a fault detection means having a detection means for determining the processor as a fault and an information frequency counting means is provided, and when the fault detection means considers the processor to be a fault, it notifies the processor that performs system management. A fault detection method featuring: