JPS5852249B2 - channel device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a channel device 1, and more particularly to a channel device having a data transfer count display function.

The channel device has the function of controlling information transfer between the input/output device and the main storage device, and executes a series of operations in the steps shown in Figure 1 when input/output commands are issued from the central processing unit. do.

For example, input/output instructions 5IO (StartIlo) and 5IOF (StartIlo) are used to start a specified input/output device.
tI10pa3i Re1ease) is issued, 1
At , the channel device receives the I/O device address and performs subchannel testing.

Next, in step 2, the channel data is saved from the fixed area of the main memory MS.
Read the address word (hereinafter referred to as CAW), and at 3 the main memory M
A channel command word (hereinafter referred to as CCW) is read from the address indicated by CAW of S.

Prior to that, the channel device decodes the input/output board +5 IOF, sets the condition code CC, and sends it back to the central processing unit to complete the input/output command (STP). After sending this command to device 1,
It sets the condition code CC and sends it back to the central processing unit.

Next, in step 5, an input/output operation is executed, that is, data is transferred between the input/output device and the main memory MS, and when it ends in step 6, an input/output interrupt is performed, control is transferred to the central processing unit, and the main memory is transferred. A channel status word (hereinafter referred to as C3W) is written to the device MS and terminated (END).

By the way, when the main storage MSI receives undefined length data from an input/output device via an input/output control device or from a terminal device via a communication control device, the channel device calculates the number of data to be transferred and transfers the data. At the end of the transfer, one is reported to the central processing unit.

In this case, when one data transfer is completed, the CCW is read from the main memory device MS, a command is sent to the input/output device 1, and then the data transfer is continued.
If the next CCW has the same command code as the current command code, the CCW's chain data
The data chain operation is performed by setting the flag "l"f.

Also, even if the chain data flag is "0",
When the chain command flag is set to "1", a command chain operation is performed, and input/output operations using new commands are continued.

In this way, when data transfer between input/output devices, terminal devices, and main storage is performed by a chain of multiple CCWs, the number of data transferred related to the last CCW executed is The channel device cannot report the number of transferred data related to other CCWs.

For this reason, when the main memory receives undefined length data, the following three methods have been conventionally used to determine the number of data actually transferred, but each method has drawbacks.

(1) There is a method of sending a command for each piece of transfer data without using chain commands, but this method cannot take advantage of the effectiveness of chain commands.

(2) When using a chain command, there is a method of inserting data length information into the transfer data (telegram). For example, the number of transfer data is memorized on the input/output device side, and the next read command is sent to the channel device. This method places the data length and count information at the beginning of the transferred data.

However, this cannot be implemented if the transmission control procedure does not allow data length information to be included in the message.

(3) When using a chain command, a method of adding information including a data delimiter code after the final data, that is, sending out a pattern that is not used in the command or data, for example, all "1" information as a delimiter code; The data length is determined by sequentially checking the data in the program and subtracting the first address from the address where the last delimiter is stored.

However, it is time-consuming because all data stored in main memory has to be checked, and if complete data transparency is guaranteed, i.e.
When all patterns are used as data, it is not possible to define a data delimiter code.The purpose of the present invention is to eliminate such conventional drawbacks and to continuously transfer data from a terminal device through a command chain. To provide a channel device that can report the data length information of each message to a central processing unit without including the data length information in the transferred data and guaranteeing complete data transparency when receiving the message. There are so many.

In the present invention, there is provided a means for detecting a predetermined display bit included in a channel command word being executed or a channel command word following it, and an output from the detecting means that is actually (transferred). data byte count information to the running or subsequent channel.
The foregoing object is distantly related by providing means for storing any area within the command word, or any data area specified by the channel command word f.

Hereinafter, the present invention will be explained in detail with reference to the drawings.

Figure 2 a, b, and c show the conventionally used ccw,
csw, format, and CCW in main storage
FIG.

As shown in FIG. 2a, CCW consists of 8 bytes (2 words) and includes a command code CMD.

It includes areas for data address D, ADR, flag FLG, and count CNT.

When an input/output command is issued, the CCW is already stored in the main memory, and the starting address of the CCW group is indicated by reading the CAW (4-byte structure) located in a unique area of the main memory. .

Command code CMD is sense, write, read,
It specifies the type of input/output operation such as batter word read, control, etc., and the data address D-AD
H indicates the first data address to start data transfer.

Flag FLG specifies simple control between CCWs, and includes chain data (CD'), chain command (CC), invalid length display inhibition (SLI), and skip (SLI).
KIP), program control interrupt (PCI), and indirect data address (IDA).

Further, the count CNT indicates the number of bytes of data transferred by the CCW.

The present invention uses an indication bit such as a flag FLG as a transfer data length information storage instruction bit, and when this bit is "1", data length information is stored in the area of the count CNT.

Next (C8W is used when an input/output interrupt occurs,
The cause and the completion status of the input/output operation are stored in a fixed area of the main memory.As shown in Figure 2, the protection key KY, CCW address, device status byte DSB, It has areas for channel status byte CSB and count (remaining number of bytes) CNT.

Now, the main memory R is arranged as shown in Figure 2 cf:
It is assumed that CCW is stored.

CCWO specifies output operation (write WT) and sets chain command flag CCF to "1".

CCWI and CCW2 both specify the input operation (read RD) of undefined length data, CCWl sets the chain command flag CCF to "1", and CCW2 sets the program control interrupt flag PCIF to "l" (thus, There is.

That is, each CCW has a chain command flag CC
F) Because they are chained together, these series of I/O operations are a single I/O activation instruction (5 tartl 10)
Executed by IC.

Such a chain is controlled by the chain command flag CCF
The execution state of the input/output activation instruction, that is, the normality of the input/output operation, the number of bytes of transferred data, etc., is stored in the main memory as C8W. Therefore, you can refer to the program (from here).

However, since C8W only contains information related to the last (this is executed?) = CCW, in the case of C in Figure 2 (this is
Only the number of data bytes transferred from CW2t is transferred to C8.
You can know from the value of "remaining count" in W,
The number of data bytes transferred by CCWl cannot be known by the program.

Therefore, in the present invention, the channel program control interrupt flags PC and IF are added to the CCW21, and when the input operation by the CCWI is completed and the CCW2 including PCIF is read from the main memory, the data transferred by the ccwit. The value of the "remaining count" of bytes is stored in the count area CNTl of CCWl, and the number of data bytes transferred can be easily referenced by the program.

FIG. 3 shows the block configuration countries of the channel equipment according to the embodiment of the present invention.

The channel device 20 is a control unit 2 of a human output interface.
4, sub channel 26, computing unit 26, main control section 2
5, an address register 29, a data register 30, a sub-channel storage section 27, etc.

The sub-channel 26 also has a flag register 32,
Sequence control register 33, count register 34
, a CCW address register 35, and a data address register 36.

When the input/output activation instruction is executed by the central processing unit 23, the input/output activation instruction is sent to the CPU register 4 through the CPU interface 39.
51 input/output device addresses are sent.

The input/output interface control unit 24 controls the CPU register 4
When address 5 is received, the input/output device 22 is selected and activated immediately.

At the same time, when the channel sequence control unit 25 reads the CAW from the fixed area of the main memory 21, the CAW is loaded into the data register 30 via the storage data bus 41.

Since CAWf contains the start address of the CCW group to be executed, the sequence control unit 25 selects the start address of the CCW group to be executed.
To read the CCW, the CAW information is transferred from the data register 30 to the address register 291 and the CCW reading begins via the address line 40.

When the reading of the CCW is completed, the channel sequence control unit 25 transfers the loaded CCW to the data register 30.
The sub-channel 26 is initialized based on the contents of the sub-channel 26.

That is, the contents of the flag register 32, count register 34, and data address register 36 are made to correspond to the CCW flag FLG, count CNT, and data address D-ADRJ, respectively.

The CCW address register 35+ is set with the address of the primary CCW which is the contents of the address register 29 plus eight.

Further, the read command CMD is sent from the data register 30 to the input/output data register 38, and from there to the input/output device 22.

Upon receiving the command code CMD, the input/output device 22 immediately starts data transfer.

In the case of a multiplexer that controls data transfer for multiple input/output devices 22 at the same time, the contents of the associated sub-channels of each input/output device are transferred to each input/output device in the sub-channel storage section 27. It is stored in one allocated area as a unit control word (hereinafter referred to as UCW).

Its contents are that when a data transfer request is made via the input/output interface l10INF, the subchannel 26
The contents of data address register 36 are sent to address register 29f as a data address, and data is read from and written to main memory 21#.

In the case of output operation (write WT), the main memory 21
The data read from data register 30 is transferred to input/output data bus 43 and input/output data register 3.
8 to the input/output interface l10INF.

On the other hand, in the case of an input operation (read RD), transfer data is sent from the input/output interface l10INF to the data register 30f via the input/output data register 38 and the input/output data bus 43, and is stored in the main memory 21. be done.

In either case, the contents of the count register 34 and data address register 36 are incremented by 1 or 1, respectively, by the arithmetic unit 281, and then sub-counted again.
The contents of channel 26 are stored in sub-channel storage section 27.

Such a data transfer operation continues to be repeated until a data transfer termination condition occurs in the input/output device 22t.

This termination condition occurs when the value of the sub-channel count register 34 reaches "o jt" and the channel device 20 notifies the input/output device 22 of the contents, or when the input/output device 22 stops transferring all data. When the transfer is completed and there is no more data to transfer, this occurs.

In the latter case, the sub-channel count register 34
The value indicates the difference between the number of data bytes to be transferred specified by the program and the number of data bytes actually transferred (remaining count).

When the input/output device 22 detects a data transfer end condition, it reports the end to the channel device 20.

When the input/output interface control unit 24 receives this completion report, the input/output device 2
The UCW associated with sub-channel 26E is loaded from sub-channel storage 2T.

At this time, the contents of the flag register 32 are input to the flag identification circuit 311I and further transferred to the channel sequence control section 25, so that the channel sequence control section 25 determines whether or not to perform a chain command operation. You can know.

If the chain command operation is specified, the channel sequence control unit 25 executes the input/output device 2 immediately after reporting completion, in the same way as when receiving the input/output start command.
2 is reselected and activated, and then the new CCW is read to initialize the sub-channel.

In this case, the contents of the CCW address register 35 are used as the address of the new CCW.

On the other hand, when a chain command operation is not specified, a C8W is created based on the count register 34 and CCW address register 35, and an interrupt request is issued to the central processing unit 23.

In the example shown in Figure 2C, when the output operation of CCWO is completed,
The next CCWl is read from the chain command F,
Sub-channel 26 count register 34, CCW
The address register 35 and the like are initialized based on the contents of CCWI.

The CCWI instructs to write undefined length data to the main storage device 21, and the count specified by the program specifies the maximum number of data bytes that can be transferred from the input/output device 22.

Therefore, the actual number of data bytes transferred by CCWl may be smaller than the count specified in the program.

Even in such a case, if the bit of the invalid length display suppression flag 5LIP is rlJ, an invalid data length will not be displayed, and when the execution of CCWl is completed, the channel device 20 will skip the chain command and transfer the data to the main memory. 21 to C
Read CW2.

In the present invention, a flag detection circuit 46 is provided attached to the data register 30, and when the reading of the CCW is completed, the validity of the PCIF in the CCW loaded in the data register 30p is determined by the flag detection circuit 46. test.

When the flag detection circuit 46 detects that PCIF is "l", it reports it to the channel sequence control section 251. From this, the sequence control section 25 starts counting and
CCW the "remaining count" left in register 34
The count area CNTIF of I is stored.

At this time, the contents of the CCW address register 35 are
Since it indicates the address of W2, it is subtracted by eight by the arithmetic unit 28 and sent to the address register 29.

Further, the contents of the count register 34 are sent to the data register 30, and the contents of the count register 34 are sent to the data register 30, and the contents of the CCWI of the address area of the main storage device 21 indicated by the address register 29 are sent to the data register 30.
Area CNTt is stored.

After that, the channel device 20 transfers the CCW from the main storage device 21 to the CCW.
2 is read out, and the count register 34, data address register 36, etc. of the sub-channel 26 are initialized based on the contents of CCW2, and the input/output operation is continued.

In this example, the program control interrupt flag PCIF of the CCW2 is set to "1", and the channel sequence control unit 25 detecting this sets the "remaining count" of the contents of the count register 34 to the immediately preceding CCW1. Since the data is written in the count area of , the program can know the actual length of data transferred by referring to this area.

In this case, the original control function of PCIF is also executed.

The original function of PCIF is to interrupt the program and check whether CCW execution has been completed up to the current point.

That is, as shown in FIG. 4, the main memory read operation is performed in a binary buffer format, and DATA
The writing area of TA2 and the work area actually used.
Area (WK) is provided.

Data transferred from various terminals is DAT for the time being.
The data is stored in AI or DATA2, and is moved to a predetermined work area WK before these write areas become full.

That is, after the last area of DATAI and DATA2 has been written, it will be written again from the beginning and overwritten.

To prevent this, the progress of the program is constantly monitored by the PCIF, and the PCIF determines when to move the program to the work area where it will actually be used.

In addition to these original functions, in this embodiment, when a certain input/output operation is completed and the next CCW is read, the PC
Check whether IF is "0" or "1", and if it is "1", press E
In order to refer to the number of data bytes actually transferred, the contents of the count register, ie, the "remaining count", are stored in the immediately preceding CCW.

FIG. 5 is an explanatory diagram of the storage state of the main storage device according to the first invention.

When PCIFr I J of CCW2 is detected, the value CNTl in the count area of the previous CCWl is rewritten to the value of the remaining count JR-CNT.

The value CNTl in the count area of CCWI is
This is the total number of bytes of data transferred from this, and the program is used for CCWI input operation (the write area of the main memory prepared for this is a count area from data address D-ADRI to data address D-ADRI). The maximum value is the sum of the value CNT1.

That is, as shown in FIG. 5, the area prepared by program E is data address D・ADRl(
ll) to (D-ADR1+CNT1) address (
13), the valid data actually transferred is
Address (12), which is obtained by subtracting the remaining count R・CNT from address (13), that is, D-ADR1+CNT1-
Up to R-CNT.

Therefore, if the remaining count R-CNT is stored in an area that can be referenced by the program, for example, the count area of the immediately preceding CCW1, all data can be saved by the program.
By subtracting the remaining count R-CNT from the number of bytes CNT1, the actual length of data transferred can be found.

In the embodiment, the PCIF bit is used as the detection bit for storing the "remaining count", but the present invention is not limited to this, and any other display bit may be used.

That is, even if the PCIF bit for interrupting the program is not used, the CCW ends with an interrupt, so the count can be checked at that time.

For example, chain command flag CCF chain
Data flag CDF, invalid length display suppression flag 5LIP
It is also possible to use a new bit in the reserved area E of the CCW.

In addition, in the embodiment, the CCW2 display bit is used to
Although the "remaining count" associated with WH is stored, the display bit may be placed in CCWI and storing the "remaining count" associated with CCWl.

That is, when the operation of CCW1 is completed, the bit is checked and stored in an area that can be referenced by the program.

Furthermore, in the embodiment, the "remaining count" is stored in the count area of the CCWI, but it may also be stored in another area of the CCWI or the area of CCW2, or in another area that can be easily referenced by the program. It may be stored in any area.

For example, as shown in Figure 4, the writing area DAT
AI, last 2 byte area 15.1 of DATA2
6 can also be rubbed in the "remaining count" storage area t.

The last area 15°16 is where the CCW count and
Since the area is shown, it is easier to program than 1.
It is possible to refer to this.

As explained above, the present invention (according to the present invention) detects a predetermined display bit in the CCW and stores information on the number of transferred data and bytes in an area that can be referenced by a program.
Programs can recognize the data length of indefinite-length records.

In this case, there is no burden on the input/output device side, and there is no need to transmit data length information including the transfer data, so there is no need to worry about being restricted by the transmission control procedure, and further transmission Problems such as complication of the procedure program and reduction in versatility do not arise.

Furthermore, since no data delimiter is used, complete data transparency is guaranteed.

[Brief explanation of drawings]

FIG. 1 is a flow chart showing the startup procedure for input/output operations in channel device t, FIG. 2 is a diagram of each format of the channel command word and channel state word, and a diagram of the chain state in the main storage device. 4 is an explanatory diagram of the buffer operation in the main memory, and FIG. 5 is a state diagram of the channel command word and write data area in the main memory. It is. 20: Channel device, 21: Main storage device, 22: Input/output device, 23: Central processing unit, 24: Input/output interface control unit, 25 Janel sequence control unit, 26
:Sub channel, 27:Sub channel storage section, 28
: Arithmetic unit, 29 Near address register, 30: Data
register, 31: flag identification circuit, 32: flag register, 33 sequence control register, 34: count register, 35: CCW address register, 36:
Data address register, 37: Tag line control section, 3
8 two output data registers, 39: CPU interface signals, 40: storage address signals, 41: storage data bus, 42: channel bus, 43
:I/O data bus, 44:Flag signal line.

Claims (1)

[Claims] 1 Chain command operation number
In a channel device that continuously executes command words and reports the number of data transferred from the input/output device to main memory to the central processing unit, the channel command word being executed or the next channel command・A means for detecting a predetermined display bit included in a word, and an arbitrary memory device in the main memory that allows a program to refer to information on the number of data bytes actually transferred from an input/output device through the output of the detection means. A channel device characterized in that it comprises means for storing a data area.