JPS5852328B2 - hand tai souchi no seizou houhou - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a method for manufacturing a high voltage semiconductor device.

Various methods have been devised to increase breakdown voltage and achieve high reliability in planar semiconductor devices or mesa semiconductor devices.

Often used methods are known, including suitable combinations of phosphor glass, alumina, silicon nitride and silicon dioxide.

However, the breakdown voltage of the semiconductor device is 600 to 700
If the value exceeds V, it is extremely difficult to form a surface protective film with sufficient reliability.

In other words, due to the synergistic effect that occurs at the interface between silicon dioxide and surface protective films such as link glass, alumina, and silicon nitride, a structure with extremely low contamination is formed on the PN junction surface. Thermal distortion occurs due to the difference in thermal expansion coefficients between the substrate and film materials up to room temperature, resulting in micro warping, racks, and pinholes, so slight changes over time occur during high temperature reverse voltage processing (HTRB processing). The disadvantage was that leakage current was likely to occur.

Generally, protective films formed at low temperatures tend to generate tensile stress, and by densifying them at high temperatures, compressive stress tends to be applied, which has the drawback that the above-mentioned microscopic defects are likely to occur.

Therefore, as can be seen from the above explanation, forming a sufficiently thick protective film has been limited by cracks and pinholes.

This invention was made to solve the above problems, and an object thereof is to provide a method for manufacturing a semiconductor device that can form a sufficiently thick protective film without cranks or pinholes in a simple process. That is.

The basic structure of this invention to achieve the above object is as follows:
In the process of manufacturing a semiconductor device having a PN junction formed by diffusion, a semiconductor oxide film is formed to cover the exposed end of the PN junction, and a lower layer made of phosphorus pentoxide and a semiconductor oxide film are formed on the semiconductor oxide film. A two-layer film composed of an upper layer and an upper layer of
This method is characterized in that a high-reliability, high-voltage semiconductor device is manufactured by sequentially stacking the layers several times while applying a 0-minute densification heat treatment to form an insulating protective film with a thickness exceeding 5 μm.

Hereinafter, the present invention will be specifically explained with reference to Examples.

The method of the embodiment will be explained with reference to FIGS. 1 and 2.

First, a semiconductor substrate 4 in which a PN junction 3 consisting of a semiconductor substrate 1 of one conductivity type and a diffusion layer 2 of an opposite conductivity type is exposed on an end surface.
A thermal oxide film 5 is then formed.

At this time, the film thickness is made sufficient to prevent impurities contained in the upper protective film to be formed later from diffusing.

Next, 1000 people applied phosphorus pentoxide (P2O5) membrane 6,
A silicon dioxide (S 102 ) film 7 is continuously formed for 9000A to form a two-layer film 8.

This bilayer membrane 8 was heated for 1100' in dry nitrogen or dry oxygen.
Heat treatment for 0.010 minutes to densify.

Furthermore, in the same manner, P2O5 film 61000A, 5t02
The two-layer film 8 made of the film 79000A is shaped and heat-treated under the same conditions.

In this way, by repeating the formation of the two-layer film 8, a protective film is formed up to a thickness of 10 μm without cracks.

FIG. 3 shows the relationship between the film thickness and densification temperature of one two-layer film and the occurrence of cracks.

In the figure, region B on the right side of straight line A is a region where no cracks occur, and region C on the left side of straight line A is a region where cracks occur.

In Figure 3, the thickness of the two-layer film is 10,000 people (=1
μ), but the thickness of the two-layer film was 150 μm.
00, cracks occur even if densification heat treatment is performed.

The P material for forming the P2O5 film is PH3゜POC
l2. Any of P2O5 may be used.

In the example, heat treatment was performed after forming the two-layer film, but the same result can be obtained even if 51,000 P2O515iO29000 films are continuously formed using a CVD apparatus in which the reaction tank is heated to about 1100°C.

Moreover, even if the densification at 1100'C for 110 minutes was repeated 10 times, the spread of P2O5 in each bilayer film was extremely small.

Furthermore, the present invention can also be applied to the collapse of mesa-type semiconductor devices and flannel-type semiconductor devices.

As detailed above, in the method for manufacturing a semiconductor device according to the present invention, a semiconductor oxide film is created to cover the exposed end of a PN junction having an exposed end on the surface of a semiconductor substrate,
On the semiconductor oxide film, a two-layer film consisting of a lower layer made of phosphorus pentoxide and an upper layer made of a semiconductor oxide film is heat-treated for densification at about 1100°C for about 10 minutes every 1 μm in thickness. Since a protective film with a thickness of 5μ or more is formed by stacking multiple times, a sufficiently thick protective film with few cracks and pinholes can be obtained, preventing contamination from external Na ions, etc., and PN junction of charged particles on the protective film. This has the effect of making it possible to obtain a semiconductor device with extremely high breakdown voltage and high reliability.

[Brief explanation of the drawing]

1 and 2 are explanatory diagrams for explaining the present invention in detail, and FIG. 3 is a characteristic diagram showing the relationship between the film thickness and densification temperature of the two-layer film and the occurrence of cracks. In the figure, 1 is a semiconductor substrate, 2 is a diffusion layer, 3 is a PN junction, 4 is a semiconductor substrate, 5 is a thermal oxide film, 6 is a phosphorous pentoxide film, 7 is a silicon dioxide film, and 8 is a two-layer film. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A step of creating a semiconductor oxide film covering the exposed end of a PN junction having an end exposed on the surface of a semiconductor substrate, by forming a lower layer made of phosphorus pentoxide and an upper layer made of a semiconductor oxide film on the semiconductor oxide film. A process of creating a two-layer film to a predetermined thickness, and stacking the two-layer film from the above process multiple times to a thickness of 3μ while applying densification heat treatment at about 1100'C for about 10 minutes for every 1μ of thickness. A method of manufacturing a semiconductor device, comprising a step of forming a protective film with a thickness as described above.