JPS5853532B2 - stereo demodulation circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvement of a stereo demodulation circuit, and particularly aims to improve the SN ratio (signal-to-noise ratio) when receiving weak electric field signals.

It is known that in an FM broadcast receiver, the SN ratio is worse when receiving a weak electric field signal than when receiving a residual electric field signal, and in particular, it is worse in a stereo reception state than in a monaural reception state.

Particularly in vehicle-mounted FM receivers, the electric field strength changes rapidly, and the SN ratio worsens when the electric field is weak, resulting in uncomfortable listening conditions.

Conventionally, in order to prevent the SN ratio from deteriorating, when a stereo signal is received in a weak electric field, the receiver is forcibly put into a monaural state in order to improve the SN ratio.

As shown in Fig. 1, when the input signal becomes small and the output signal (solid line A in Fig. 1) also becomes small, the SN ratio in the stereo reception state (dotted chain line in Fig. 1) is higher than the mono signal. This method focuses on the fact that the SN ratio in the reception state (dotted line C in Figure 1) is better. For example, by switching the receiver to the monaural state at point B in Figure 1, a large SN ratio can be achieved.
An improvement in the ratio is made.

However, in the conventional method, the stereo reception state is forcibly and abruptly switched to a monaural state, which gives a sense of discomfort to the listener and, for example, at point A in Figure 1.
When the input signal is smaller than that, the signal-to-noise ratio deteriorates so much that even in monaural reception, it becomes unlistenable.

Furthermore, a method of substantially improving the signal-to-noise ratio by cutting unpleasant high-frequency noise is also conventionally known.

For example, as shown in FIG. 2, capacitors 4 and 5 for cutting high-frequency components are connected to the left and right output terminals 2 and 3 of the stereo demodulation circuit 1 via switches 6 and 7, respectively, and the electric field strength of the input signal is When the signal becomes below a predetermined level, the switch is turned on to improve the S/N ratio.

However, such a method has the disadvantage that the S/N ratio changes rapidly before and after the switch is turned on, and the frequency characteristics also change rapidly.Moreover, in the case of a car-mounted receiver, it is difficult to respond to changes in electric field strength. As a result, switching is performed frequently, which has the disadvantage of being extremely jarring to listeners.

The present invention has been made in view of the above-mentioned drawbacks, and the present invention demodulates the sub-channel signal to create difference signals (L-R) and (R-L). In a stereo demodulation circuit that obtains left and right stereo signals by adding the two signals, a high-frequency cut main channel signal with the high frequency cut is mixed into the main channel signal when receiving a weak electric field, and the weaker the electric field, the higher the high frequency It is an object of the present invention to provide a novel stereo demodulation circuit that can substantially improve the signal-to-noise ratio by increasing the proportion of the cut main channel signal.

FIG. 3 shows an embodiment of the present invention, in which 8 is a difference signal demodulation circuit for demodulating the sub-channel signal ((LR) sin ωt).

The demodulation circuit comprises a first differential circuit L3 comprising first and second transistors 11 and 12 controlled by positive and negative 38KHz switching signals applied to first and second control terminals 9 and 10; a second differential circuit U connected to the third and fourth transistors 14 and 15, a fifth transistor 17 whose collector is connected to the first differential circuit and whose base is connected to the bias power supply; The differential circuit 16 includes a sixth transistor 19 whose base is connected to the stereo composite signal input terminal 18, and a constant current transistor 20. By switching the signals with a 38 KHz switching signal, the first stereo difference signal (L-R) is applied to the collector of the third transistor 14, and the second stereo difference signal (L-R) is applied to the collector of the fourth transistor 15.
).

Further, 1 and 42 are first and second sum signal circuits for adding the main channel signal (stereo sum signal (L+R)) to the first and second stereo difference signals, respectively, and the first sum signal circuit 1 is a third differential circuit t5 consisting of seventh and eighth transistors 23 and 24 controlled by third and fourth control signals t0 and t2, and a ninth and tenth transistor 2).
6 and 27; an eleventh transistor 29 whose collector is connected to the third differential circuit generator and whose base is connected to the stereo composite signal input terminal 18;
A twelfth transistor 33 whose collector is connected to the fourth differential circuit U and whose base is connected to the stereo composite signal input terminal 18 via a high-frequency cut circuit turtle 2 consisting of a resistor 30 and a capacitor 31; Differential circuit U
The main channel signal is arranged to be added to the first stereo difference signal (LR) obtained at the collector of the third transistor 14 .

The second sum signal circuit U receives a second stereo difference signal (R-
It is arranged to add the main channel signal to the sum signal circuit L), and its configuration and operation are the same as those of the first sum signal circuit, and a description thereof will be omitted.

Note that the circuit elements of the second sum signal circuit t1 include the corresponding first
The sum signal circuit υ is shown with a dash added to the figure number.

Next, the operation will be explained.

When the electric field strength of the received signal is sufficiently large, that is, within the range where the input signal is smaller than point B in FIG. The first stereo difference signal (L-R) obtained at the collector of the third transistor 14 of the differential circuit IJ and the stereo sum signal (L+R) from the first sum signal circuit J are added, and the signal is sent to the first output terminal 34. A left (2L) stereo signal is also obtained at the collector of the fourth transistor 15 of the second differential circuit 16, a second stereo difference signal (R-L), and a stereo sum signal from the second sum signal circuit 2. (L+R) is added,
A u2RD teleo signal is obtained at the second output terminal 35.

The third voltage applied to the third and fourth control terminals 36 and 36'
The fourth control signals t1 and t2 are, as shown in FIG. The signal is taken out from the IF amplifier circuit 0 of the FM stereo receiver consisting of the following.

The signal passing through the IF amplifier circuit 0 has an amplitude proportional to the electric field strength.

Therefore, the signal is extracted by the detection circuit generator 45, and the control signal generator 45 outputs the third and fourth signals having a predetermined relationship.
If the control signals t1 and t2 are generated, and the third and fourth control signals t1 and t2 are generated, the third and fourth control signals t1 and t2 are signals related to electric field strength.

Incidentally, the relationship between the third control signal t1 and the fourth control signal t2 is set so that t2=(A il).

(However, A is a constant)C In the first operating state, the electric field strength is sufficiently large, so the relationship tl>t2 holds, and therefore, with respect to the first sum signal circuit υ, the third differential circuit υ The seventh transistor 23 and the first transistor of the fourth differential circuit 11
Since the zero transistor 27 is conductive and the eighth and ninth transistors 24 and 26 are non-conductive, the signal is transmitted from the stereo composite signal input terminal 18 to the third differential circuit z5 via the base-collector path of the eleventh transistor 29. The applied stereo sum signal (L+R) is transmitted to the seventh transistor 2
3 is supplied to the collector of the third transistor 14 of the second differential circuit U from which the first stereo difference signal (L-R) is obtained, and the left stereo signal (2L) is supplied to the first output terminal 34.
) is obtained.

The same applies to the second sum signal circuit U, and by applying the third and fourth control signals t1 and t2 in the above state, a stereo sum signal (L+R) is obtained at the output terminal, which is transmitted to the second differential circuit U. The second transistor obtained at the collector of the fourth transistor 15 of
It is added to the stereo difference signal (R-L) and sent to the second output terminal 3.
5, a right stereo signal (2R) is obtained.

When the electric field strength decreases and the input signal becomes smaller than point B in FIG. 1, the output signal of the difference signal demodulation circuit 8 becomes smaller.

That is, the first and second control terminals 9 and 10 in FIG. 3 are connected to the first and second output terminals 46 and 4 of the 38KHz switching signal level/141J control circuit shown in FIG.
The signal obtained at 7 is applied.

The level control circuit includes differentially connected transistors 48 and 49, a constant current transistor 50, and a control terminal 51 to which a signal for controlling the collector current of the constant current transistor 50 is applied. 38K applied to the bases of differentially connected transistors 48 and 49, respectively, in response to a control signal applied to terminal 51.
This is for attenuating the Hz switching signal.

The control signal corresponds to the electric field strength of the received signal, and is taken out from the IF amplifier circuit 0 in FIG. 4 to the output terminal 53 via the detection circuit (4) and the processing circuit 11. .

Therefore, when the input signal becomes smaller than point B in FIG. 1, the control signal applied to the control terminal 51 also becomes smaller, and the control signals applied to the first and second control terminals 9 and 10 in FIG. The 38 KHz switching signal becomes small, and the values of the demodulated first and second stereo difference signals (L-R) and (L) also become small.

Therefore, when adding the stereo sum signal (L+R) from the first and second sum signal circuits and U, the right stereo signal crosses to the first output terminal 34, and the left stereo signal crosses to the second output terminal 35. It remains as a talk portion, and the degree of separation deteriorates.

As the input signal further decreases, the crosstalk component increases further, and eventually the generation of the stereo difference signal stops, and the stereo sum signal (L+R) is output to the first and second output terminals 34 and 35. They occur equally, resulting in a monaural listening condition.

The output signals generated at the first and second output terminals 34 and 35 continuously transition from a stereo state to a monaural state, and accordingly, the SN ratio also continuously transitions from a stereo state to a monaural state, and the SN ratio changes continuously from a stereo state to a monaural state. Since the improvement can be made smoothly rather than suddenly, it is possible to prevent the listener from feeling uncomfortable or uncomfortable.

During this time, the state of the sum signal circuit does not change at all.

In the range (A-B) in FIG. 1, an improvement in the SN ratio is achieved by transitioning from a stereo state to a monaural state and maintaining the monaural state, as described above.

When the electric field strength of the received signal becomes even smaller and the deterioration of the S/N ratio becomes noticeable even in the monaural state, the first and second
The states of sum signal circuit 1 and begin to change.

That is, when the input signal reaches point A in FIG. 24
, and the ninth transistor 26 of the fourth differential circuit L'' starts conducting.

Then, with the start of conduction of the ninth transistor 26,
The high-frequency cut main channel signal applied from the stereo composite signal input terminal 18 to the base of the twelfth transistor 33 via the high-frequency cut circuit U begins to be led out to the collector of the ninth transistor 26, and the first sum signal circuit υ
The high frequency cut main channel signal is included in the output signal of the third
This signal is obtained together with the main channel signal derived to the collector of the seventh transistor 23 of the differential circuit B5.

In response to a decrease in the level of the input signal, the third control signal t1
decreases more and more, and the fourth control signal t2 increases more and more, so
The proportion of the high-frequency cut main channel signal included in the output signal of the first sum signal circuit υ increases more and more.

For example, at tl-12, the ratio of the high frequency cut main channel signal to the main channel signal is 50%, and tl
<h, the high-frequency cut main channel signal becomes 100%.

When the input signal becomes extremely small, 11 (<12, and the third
The seventh transistor 23 of the differential circuit becomes non-conductive, and the ninth transistor 26 of the fourth differential circuit 1 becomes saturated.

Therefore, the output signal of the first sum signal circuit J is only the high-frequency cut main channel signal, and a sufficient improvement in the S/N ratio is achieved.

FIG. 6 is a characteristic diagram showing the relationship between the ratio of the third control signal t1 to the main channel signal and the high-frequency cut main channel signal, where the dashed line 2 represents the main channel signal and the solid line H represents the high-frequency cut main channel signal. shows.

The second sum signal circuit operates in exactly the same way as the first sum signal circuit υ and provides the same output signal, so a description thereof will be omitted.

In the embodiment shown in FIG. 3, when the electric field strength is sufficiently large, the signal-to-noise ratio is not improved, and as the electric field becomes weaker, the sub-channel signal is first reduced and the first and second
The signals obtained at the output terminals 34 and 35 are made monaural,
Next, the SN ratio is improved by increasing the proportion of the high-frequency cut main channel signal in the output signals of the first and second summation signal circuits J and tl.
The stereo demodulation circuit according to the present invention is not limited to such an embodiment, and for example, the SN ratio can be improved using only the method of expanding the high-frequency cut main channel signal without improving the SN ratio by making it monaural. Any device that has an improved circuit is applicable.

Therefore, for example, unlike the embodiment shown in FIG. 3, the SN ratio may be improved by first enlarging the high-frequency cut main channel signal, and then the SN ratio may be improved by making it monaural.

As described above, the stereo demodulation circuit according to the present invention can achieve a significant improvement in the S/N ratio when receiving weak electric field signals, and furthermore, in improving the S/N ratio, continuous changes can be made. Therefore, it does not cause any discomfort or discomfort to the listener.

[Brief explanation of drawings]

Figure 1 shows the relationship between the input signal and the output signal, and the relationship between the input signal and the S/
FIG. 2 is a circuit diagram showing an example of a conventional SN ratio improvement circuit, FIG. 3 is a circuit diagram showing an embodiment of the present invention, and FIG. FIG. 5 is a circuit diagram explaining the method of generating the first and second control signals in FIG. 3, and FIG. 6 is a block diagram for explaining the method of generating the fourth control signal. FIG. Explanation of main figure numbers, fl2...difference signal demodulation circuit, t
Ltl...sum signal circuit, U...high frequency cut circuit.

Claims (1)

[Claims] 1. In a stereo demodulation circuit that obtains left and right stereo signals by adding an output signal of a circuit that demodulates a sub-channel signal and an output signal of a circuit that passes a main channel signal, the main channel signal is The circuit for passing the signal has a first input terminal to which a main channel signal is applied, a second input terminal to which a high frequency cut main channel signal obtained by cutting high frequency components of the main channel signal is applied, and an electric field strength of the received signal. a switching circuit that continuously varies the mixing ratio of the main channel signal and the high-frequency cut main channel signal according to a signal corresponding to The stereo demodulation circuit is characterized in that the mixing ratio of the switching circuit is varied so that as the electric field strength increases and the electric field strength decreases, the proportion of the high-frequency cut main channel signal increases. 2. The switching circuit is configured to pass only the main channel signal when the signal corresponding to the electric field strength of the received signal is sufficiently large, and to pass only the high-frequency cut main channel signal when the signal corresponding to the electric field strength of the received signal is sufficiently small. A stereo demodulation circuit according to claim 1, characterized by: 3. The circuit for demodulating the sub-channel signal has a switching circuit that is switched by a switching signal having a frequency corresponding to the sub-carrier signal, and the level of the switching signal changes according to the electric field strength of the received signal, and the level of the switching signal changes according to the electric field strength of the received signal. is a dog, left and right stereo signals are generated at the left and right output terminals of the stereo demodulation circuit, respectively, and as the electric field strength becomes smaller, the signals obtained at the left and right output terminals approach a monaural state. A stereo demodulation circuit according to claim 1, characterized in that: 4. The input signal level at which the level reduction of the output signal of the circuit for demodulating the sub-channel signal starts is higher than the input signal level at which the switching circuit starts switching in the circuit for passing the main channel signal. A stereo demodulation circuit according to claim 3.