JPS5853828B2 - television screen display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a television screen display device, and more particularly to a device that displays information processed by a microcomputer in color on a television screen.

In general, there are various fields in which television receivers are used as terminal equipment for microcomputers, such as education and entertainment.

An example of the above-mentioned entertainment device is a television game device, which will be explained with reference to FIG. 1a.

The television game device shown in this figure connects the output end of a game machine 2 to the antenna terminal of a television receiver 1,
The game is played by controlling the two keyboards 3 and 4 provided on the game machine 2 to arbitrarily control the movement of the game pattern displayed on the screen of the television receiver 1.

That is, the game machine 2 outputs a video signal to a television receiver, and a pattern displayed on the screen is selectively moved by keyboard operations.

For example, if we talk about baseball as an example of a ball game,
In FIG. 1a, a pitcher appears on the television screen 5.
Symbol patterns corresponding to B1 Fielder C1 Pole D and Batter A are played on the disk, keyboards 3 and 4 are controlled by two operators, one is on the attacking side, the other is on the defensive side, and one operator is on the keyboard. The other operator controls the predetermined keys on the keyboard 4 to move the symbol corresponding to the bat and swing the bat A, and the other operator controls the predetermined keys on the keyboard 4 to make the pitcher move.
Pole D is thrown by B, and fielder C changes his position to catch the ball that is hit.

The keyboards 3, 4 are connected to the game machine 2 by a cord 8, as shown enlarged in FIG. 1b, and the board 6 has a plurality of keys 7.about.7. have.

For example, when one operator presses the key 75 on the keyboard 4, the pole D moves in the direction of the batter A, as if it had been thrown by the pitcher B, and the other operator presses the key 76 on the keyboard 3 in a predetermined manner. When pressed at the right timing, Batter A's symbol rotates and moves as if a bat has been swung, and when Paul D hits this rose L-A, Paul D moves in the opposite direction.

If the timing of the rotational movement of bat A is delayed, it will not contact pole D and a strike count will be taken.

That means a missed shot.

Furthermore, when one of the operators presses another key 72 on the keyboard 4, the fielder symbol C can be controlled to move (move upward on the screen), and moves as if catching the ball that was hit.

If the symbol of fielder C is moved in a timely manner and matches pole d, an out count will be obtained; if the timing is off, pole d will fly backwards and a hit count will be obtained.

By operating like this, when a three-out is counted, the offense and defense are reversed, and by operating the 'keyboard 4,
It is possible to perform attacks, that is, bat operations, and by operating the other keyboard 3, defensive operations can be performed.

In the above explanation, a ball game was used as an example, but other games (such as playing cards, dice games, or educational games) can also be played on the disc.

Programs, symbol displays, etc. related to the baseball game and the like are processed by a circuit including a microcomputer disposed within the game device 2, and pitching, batting, or catching is performed in a timely manner.

It is also possible to display scores, out counts, etc. on the screen.

FIG. 2 shows an example of a conventional circuit for displaying information processed by a microcomputer on a television screen.

In this FIG.
An input/output controller 13 (referred to as an I10 controller) for transferring keyboard data onto the data bus line 12 is connected to the input/output controller 13 (referred to as an I10 controller).

Further, 14 in FIG. 2 is a CPU (control processing unit) for decoding and executing program instructions.

This CPU 14 has a ROM (read only memory) for storing instructions to be executed by this CPU 14.
15 is connected via the data bus line 12, and C
A RAM (Random Access Memory) 16 for temporarily storing calculation results etc. while the PUI 4 is executing an instruction is also connected via the data bus line 12.

The ROM 15 has data of predetermined game contents written therein.

Roughly speaking, a RAM 17 for storing data to be displayed on a television screen is also connected to the CPU 14 via a data bus line 12.

Note that the data input device 11, RAM16, 17, RO
M15 is connected to the CPU 14 by an address bus line 18 as shown in the figure.

Furthermore, an oscillator 19 is provided to generate a clock signal for operating the CPU 14 and generating a synchronization signal.

A counter 20 is connected to this oscillator 19, and receives a horizontal synchronization signal H1, a vertical movement signal (2), a DMA request signal for the CPU 14 to perform a DMA (direct memory access) operation, and a load and latch signal for a shift register (described later). I'm making it.

Further, the horizontal and vertical synchronizing signals from the counter 20 are applied to a mixer 21, and a composite synchronizing signal is produced as the output of this mixer 21.

Further, the data on the data bus line 12 is input in parallel to the shift register 22, and a serial output is obtained from its output terminal, which is used as a pattern signal.

This pattern signal is supplied to a second mixer 23 and mixed with the composite synchronization signal from the mixer 21, a video signal is taken out from the mixer 23, this video signal is RF-modulated by a modulator 24, and this RF-modulated signal is is connected to the antenna terminal of the television receiver 1.

To explain the circuit operation shown in FIG. 2, first, when the reset button on the keyboard 11 is pressed, a reset signal is sent to the CPU 14, and the CPU 14 decodes the first data at the address in the ROMI 5 and executes it sequentially. To go.

After resetting, select the key on keyboard 11 and enter ROM1.
When a specific game is set to be selected from among the multiple games written in
16.17 works and ROM1 is operated under the control of CPU14.
A command for playing a specific game is sent from the address bus 18 to the RAMs 5 and 16 and 17, and data corresponding to the game is read out.

This data is then converted into a video signal and RF
It is modulated and supplied to the television receiver 11 to display the game pattern on the screen.

The displayed pattern is controlled by the operation of the keyboard 11, and the game progresses.

The method for displaying information processed by the CPU 14 on the television screen is as follows.

To explain with reference to FIGS. 2 and 3, the DMA O is sent from the counter 20 to the CPU 14 during the screen display period.
When the UT request signal is output, the CPU 14 outputs a DMA address signal onto the address bus line 18 during the period of the request signal.

As already shown in FIG. 3, this address signal moves in such a way that the address is incremented by one every eight clocks.

Note that FIG. 3a shows the clock signal from the oscillator 19.

The RAM 17 outputs data onto the data bus line 12 based on address signals.

This data becomes the parallel input of the shift register 22, and (
Suppose that the information up to c=j in Fig. 3 is input), is latched by the latch signal from the counter 20 (k in Fig. 3), and is converted into series and output at the rising edge of the clock signal (a in Fig. 3). Ru.

(FIG. 3 1) This output signal becomes a pattern signal and is supplied to the mixer 23.

On the other hand, the horizontal and vertical synchronizing signals H and V from the counter 20 are input to a mixer 21, and a composite synchronizing signal is obtained as its output.

This composite synchronization signal is then added to the mixer 23 together with the pattern signal (FIG. 3 1), and the mixer 23
A video signal is obtained from.

This video signal is RF modulated by a modulator 24 and RF
It is applied as a signal to the antenna terminal of the television receiver 1, and a pattern is displayed on the screen.

In general, in the case of a game device, in order to provide expandability to the game, a part of the ROM 15 can be exchanged with another ROM to form a cartridge, so that it can be replaced with a different type of game program, and a wide variety of games can be played. There is.

In addition, in such a display device, when performing color display on the screen, a color subcarrier oscillation circuit (3,58 MHz oscillation) is provided, a RAM for color display is added, and a color signal generation means is added. That's what I do.

The clock signal of the CPU 14 is 3.58 MH above.
The frequency of z is divided into 1/2 and used.

This clock signal is also supplied to the counter 20, and from the counter 20 to the shift register 22.
A horizontal synchronization signal is also extracted from this clock frequency.

In general, the address changes every 8 bits, so if the clock signal period is Tc, the address changes every 8 1 drive is enough.

Tc And when colored, the clock signal is usually the oscillator 1
At 9, the color subcarrier signal (3,58MHz... actually 3
．． 579545MHz) divided by half to 1.78
I am trying to get a signal of 9773MHz.

In order to extract the horizontal synchronization signal from this clock signal, the frequency is divided into 1/112 (112=8Xn1n=14).

In the case of this n-14, it is actually 15.980 kHz
A signal of z is obtained.

When n=13, it is 17.209 kHz; when n=15, it is 14.915 kHz.

Since the normal horizontal frequency is 15.75 kHz, it must be within 15750 ± 78.75 Hz according to broadcasting standards.
At 15.980 kHz for n-14, it falls outside the above range.0 Therefore, as it is, the 3.58 MHz signal cannot be used, and when displaying in color, the CP
It becomes necessary to separately provide a clock generation circuit for U14 and a 3.58 MHz oscillation circuit.

When two oscillation circuits are provided in this way, beats are likely to appear on the screen because the clock frequency and the 3.58 MHz frequency are close.

Therefore, the present invention takes this point into consideration, and has three and five points.
This is an improved version that generates a clock signal from an 8 MHz oscillation circuit.

A circuit for this purpose is shown in FIG.

A feature of FIG. 4 is that a gate generation circuit 30 is added between the output side of the horizontal synchronizing signal H of the counter 20 and the CPU 14.

The operation of this circuit will be explained with reference to FIG.
Clock signal frequency of CPU 14 from 9 3.57954
5 The number is = 1.789773MHz, which is 2.9 degrees, 0 cycles of the signal 3.57954
The frequency is 5MHz.

In the present invention, the period Th of the horizontal synchronizing signal taken out from the counter 20 is set to 8·TcXn+b4cTh.

(n and b are constants, Th is the period of the horizontal synchronization signal), and if n-14 and b = 2, then the frequency TH of the horizontal synchronization signal is within the range of 15.750±78.75 mentioned above. I am satisfied with the specifications.

The meaning of the above equation is that it is sufficient to add 2Tc for each horizontal period.

To explain with reference to FIGS. 4 and 5, if all operations are performed at the falling edge of the clock signal (FIG. 5a), the CPU 14 gates during a period of 2Tc from the horizontal synchronization signal (FIG. 5b). The WAIT signal (FIG. 5C) is taken out from the circuit 30 and applied to the CPU 14.

Therefore, the operation of the CPU 14 is stopped for two clocks, and the clock for generating the horizontal synchronization signal is stopped for a period of 2Tc, so that 8Tc×14+2·Tc=Th.

Furthermore, taking the above into account, The period of the CPU clock signal is Tc.

If Ts is the period of the horizontal synchronizing signal included in the broadcasting standard, then a-Tc+b-Tc-Ts should be established (a and b are integers).

By providing the gate generation circuit 30 in this manner, the clock signal and horizontal synchronization signal of the CPU 14 can be extracted by simply providing a color subcarrier oscillation circuit.

[Brief explanation of drawings]

FIG. 1a is a front view showing a television game device, FIG. 1b is a plan view showing a keyboard used in the television game device, FIG. 2 is a circuit diagram showing a television screen display device which is the basis of the present invention, and FIG. The figure is a time chart for explaining the operation of the circuit in Figure 2, Figure 4 is a circuit diagram showing the main part of the present invention, and Figure 5 is a time chart for explaining the operation of the circuit in Figure 4. be. 14...CPU, 15...ROM11
6.17...RAM, 19...oscillator, 20...counter, 30...gate signal generation circuit.

Claims (1)

[Scope of Claims] 1. A device that displays information on the screen of a television receiver by being connected to the television receiver, comprising:
Information processing means including a control processing unit (CPU), read only memory (ROM), and random access memory (RAM); a color subcarrier oscillation circuit; and operating the CPU based on the output of the color subcarrier oscillation circuit. means for generating a clock signal for the RAM; Number of bits required to specify a ROM address (N1)
A counter that counts the clock signal by A (integer) times the clock signal to generate a horizontal synchronization signal, and a counter that counts the clock signal by A (integer) times N2 (N2 < Nl) clocks for the clock pulse to be supplied to the counter in a period other than the addressing period. correction means for correcting the frequency of the horizontal synchronizing signal obtained by the counter;
c, and when the period of the horizontal synchronization signal that falls within the broadcasting standard is Ts, the period aTc (by the counting operation of the counter) is
a=A−N1) and the period bTc(N
The period of the horizontal synchronizing signal obtained by the counter is corrected so that the sum of correction amounts (b: integer) (correction amount of the period by two clocks) satisfies the relationship T s = aTc + bTc. television screen display device.