JPS5855677B2 - Atsumakushi Yuuseki Kaironoseizouhouhou - Google Patents
Atsumakushi Yuuseki KaironoseizouhouhouInfo
- Publication number
- JPS5855677B2 JPS5855677B2 JP843775A JP843775A JPS5855677B2 JP S5855677 B2 JPS5855677 B2 JP S5855677B2 JP 843775 A JP843775 A JP 843775A JP 843775 A JP843775 A JP 843775A JP S5855677 B2 JPS5855677 B2 JP S5855677B2
- Authority
- JP
- Japan
- Prior art keywords
- printing
- conductive paste
- pattern
- laser source
- screen
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
【発明の詳細な説明】 この発明は厚膜集積回路の製造方法に関する。[Detailed description of the invention] The present invention relates to a method for manufacturing thick film integrated circuits.
従来、厚膜回路の製造はスクリーン印刷により回路網を
形成した後、焼成することによって製造していた。Conventionally, thick film circuits have been manufactured by forming a circuit network by screen printing and then firing it.
近年厚膜回路は超精密多層回路化と大型化が要求される
ようになったが、従来技術ではスクリーンの呻びによる
パターン寸法の変化、印刷時のエッヂのタレによるパタ
ーン幅の太り、ショート、エッヂのギザ、メツシュの影
響やごみ、目づまりによる断線等により歩留りの低下を
招き、大型化するとさらにこの影響が大きくなり製造が
困難となっていた。In recent years, thick film circuits have been required to be ultra-precision multilayer circuits and larger in size. However, with conventional technology, there are problems such as changes in pattern dimensions due to screen groaning, thickening of pattern width due to sagging edges during printing, short circuits, Yields are reduced due to jagged edges, wire breakage due to mesh, dust, and clogging, and as the size increases, this effect becomes even more difficult, making manufacturing difficult.
またメタルマスクを使用すれば上記した問題は多少改善
されるが多層になると印刷表面の凹凸が激しくなり製造
困難となる等という問題があった。Further, if a metal mask is used, the above-mentioned problems can be alleviated to some extent, but if there are multiple layers, the unevenness of the printing surface becomes severe, making it difficult to manufacture.
この発明は上記の点に鑑みてなされたもので、パターン
の寸法精度が高く極めて高品質となる厚膜集積回路の製
造方法を提供することを目的とする。The present invention has been made in view of the above points, and it is an object of the present invention to provide a method for manufacturing a thick film integrated circuit with high pattern dimensional accuracy and extremely high quality.
以下この発明の一実施例を図面を参照して説明する。An embodiment of the present invention will be described below with reference to the drawings.
第1図において、11は基板12に導体ペーストを印刷
するためのスクリーンで、13はスフ1ノーン11上の
印刷部の乳剤が抜けた部分である。In FIG. 1, 11 is a screen for printing the conductive paste on the substrate 12, and 13 is the part where the emulsion of the printing part on the screen 1 noon 11 has been removed.
また14は上記スクリーン11によって印刷されたべた
刷り面である。Further, 14 is a solid surface printed by the screen 11.
このようにして基板12の表面w7望のパターンを包含
する必要最少限の広さに導体ペーストをへた刷りし、こ
れを乾燥して第2図に示す様にパターン作画焼成するた
めのレーザソース15を自動作画機(図示せず)を用い
て所望のパターンを16作画する。In this way, the conductive paste is printed on the minimum necessary area to cover the desired pattern on the surface of the substrate 12, dried, and a laser source is used to draw and bake the pattern as shown in FIG. A desired pattern 16 is drawn using an automatic drawing machine (not shown).
すなわち上記自動作画機によりレーザソース15をX方
向、Y方向へ自由に動かし、レーザソース15から発射
されるレーザ光線により基板13上のべた刷り面14の
乾燥した導体ペースト上に所望のパターン16を作画す
ると同時に焼付けを行う。That is, the laser source 15 is freely moved in the X direction and the Y direction by the automatic drawing machine, and the desired pattern 16 is drawn on the dry conductive paste on the solid printing surface 14 of the substrate 13 by the laser beam emitted from the laser source 15. Printing is done at the same time as drawing.
この工程終了後、焼付けを行わない乾燥しただけの不必
要な導体ペーストを溶剤で溶かし洗浄して厚膜集積回路
を完成する。After this process is completed, the unnecessary conductor paste that is simply dried without baking is dissolved and washed with a solvent to complete the thick film integrated circuit.
以上述べたようにこの発明によればスクリーン印刷でパ
ターンを形成しないのでスクリーンの呻びによるパター
ン寸法の変化がなく、パターンエツジのダレ、パターン
幅の太り等がなくなる。As described above, according to the present invention, since the pattern is not formed by screen printing, there is no change in the pattern dimensions due to the waviness of the screen, and there is no sagging of pattern edges, thickening of the pattern width, etc.
さらに始めの印刷はべた刷りであり細かいパターンを印
刷する時の様な場合、メツシュの影響や、ごみ目ずまり
による断線を防止できる等という極めて大きな効果を有
する厚膜集積回路の製造方法を提供できる。Furthermore, we provide a method for manufacturing thick film integrated circuits that has extremely large effects, such as preventing the effects of mesh and disconnection due to clogging of dust when printing fine patterns because the initial printing is solid printing. can.
第1図及び第2図はこの発明の一実施例を示す斜視図で
ある。
11・・・・・・スクリーン、12・・・・・・基板、
べた刷り面、15・・・・・・レーザソース。
14・・・・・・1 and 2 are perspective views showing one embodiment of the present invention. 11... Screen, 12... Board,
Solid printing surface, 15... Laser source. 14...
Claims (1)
必要最少限の広さにべた刷りするスクリーンと、上記基
板上にべた刷りされた導体ペーストにパターンを形成す
るためのレーザソースと、このレーザソースを縦横に移
動させる自動作画装置とを備え、基板上に導体ペースト
をべた刷りした後、上記自動作画装置を作動させ、レー
ザソースから発せられるレーザ光線により所望のパター
ンを作画するようにしたことを特徴とする厚膜集積回路
の製造方法。1. A screen for printing conductive paste onto a substrate to the minimum necessary width that covers the desired pattern, a laser source for forming a pattern on the conductive paste printed solidly on the substrate, and this laser source. and an automatic drawing device that moves the conductive paste vertically and horizontally, and after printing the conductive paste on the board, the automatic drawing device is activated to draw a desired pattern with a laser beam emitted from a laser source. Features: A method for manufacturing thick film integrated circuits.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP843775A JPS5855677B2 (en) | 1975-01-20 | 1975-01-20 | Atsumakushi Yuuseki Kaironoseizouhouhou |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP843775A JPS5855677B2 (en) | 1975-01-20 | 1975-01-20 | Atsumakushi Yuuseki Kaironoseizouhouhou |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5183163A JPS5183163A (en) | 1976-07-21 |
| JPS5855677B2 true JPS5855677B2 (en) | 1983-12-10 |
Family
ID=11693090
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP843775A Expired JPS5855677B2 (en) | 1975-01-20 | 1975-01-20 | Atsumakushi Yuuseki Kaironoseizouhouhou |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5855677B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57173924A (en) * | 1981-04-17 | 1982-10-26 | Tdk Electronics Co Ltd | Method of forming electrode for ceramic electronic part |
| JPS59159588A (en) * | 1983-03-01 | 1984-09-10 | 日本電気株式会社 | Method of producing conductor pattern and device for producing conductor pattern |
-
1975
- 1975-01-20 JP JP843775A patent/JPS5855677B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5183163A (en) | 1976-07-21 |
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