JPS585608B2 - semiconductor switch circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is directed to preventing malfunctions due to the late effect of a PNPN switch in a semiconductor switch circuit using a PNPN switch element, and particularly relates to a semiconductor switch circuit that significantly improves the prevention effect.

Semiconductor switch circuits with a four-layer PNPN structure, commonly referred to as SCR, Cyrisk, etc., will erroneously fire if a sudden forward voltage is applied between both terminals of the semiconductor switch circuit (between anode and cathode) even when the circuit is cut off. There are drawbacks.

This is called the late effect, and its resistance is dv/d.
This will be called t-tolerance.

In order to prevent this false ignition, generally a resistor (RGK) is connected between the gate G and cathode K of the PNPN four-layer switch element (hereinafter referred to as PNPN switch) 1, as shown in Figure 1.
2, or PNP as shown in Figure 2.
A method of short-circuiting between the gate G and cathode K using an electronic switch 3 (for example, transistor 4 is used in the figure) only in a transient state when a sudden voltage is applied between the anode A and cathode K of the N switch 1, etc. There is.

The method shown in Figure 1 has a simple circuit configuration, but has a high dv/d
In order to obtain the t tolerance, it is necessary to set the value of the resistor (RGK)2 low.

This results in a disadvantage of reduced gate sensitivity.

Therefore, as shown in FIG. 2, an electronic switch 3 is provided between the gate G and cathode K of the PNPN switch 1, and a transient current is introduced between the control terminal of the electronic switch 3 and the N base N1 of the PNPN switch 1. A circuit configuration is used in which a capacitive element 5 consisting of a transistor 6 and a diode 7 is inserted.

The circuit shown in FIG. 2 uses an NPN transistor 4 as an electronic switch 3 and a
This is an example in which the base-collector capacitance of the NP transistor 6 is used.

The operation of this circuit is such that when a rapidly rising pulse voltage enters the anode A of the PNPN switch 1, a differential current flows to the base of the transistor 4 through the base-collector capacitance of the transistor 6 due to the transient voltage, and the transistor immediately 4 enters the operating region and short-circuits between the gate G and cathode K of the PNPN switch 1.

Therefore, due to the rate effect, the gate G and cathode K
The voltage generated between them becomes lower, so that the PNPN switch 1 will no longer fire erroneously.

In addition, in this circuit, when no transient voltage is applied to the anode A of the PNPN switch 1, the base current of the transistor 4 is zero, so the transistor 4 is in a cut-off state, and the voltage calculated from the gate G of the PNPN switch 1 at this time is The only resistance is resistance (RGK) 2, and this value is dv
/dt has little to do with tolerance, so a relatively high value can be selected.

Therefore, the gate firing current is reduced and it becomes possible to operate the PNPN switch 1 with high sensitivity.

However, in order to obtain higher dv/dt tolerance, it is necessary to increase the current flowing through the capacitive element 5 when a sudden voltage is applied, that is, the base current of the transistor 4.

For this purpose, a PNP transistor or the like as shown in FIG. 2 is used as a circuit system for increasing the equivalent capacitance of the capacitive element 5.

This is a circuit in which the base-collector capacitance of transistor 6 is multiplied by the DC current amplification factor hFE, and transistor 4
This increases the drive base current.

On the other hand, when the rate effect causes the PNPN switch 1 to fire incorrectly, when a sudden voltage is applied between the anode A and the cathode K of the PNPN switch 1, the N base (N1) and P base (P2) of the PNPN switch 1 capacitance C1
A current flows through resistor RGK2 through resistor RGK2, and when the voltage drop causes the voltage between gate G and cathode K to exceed the firing voltage VGKB of the PNPN switch, erroneous firing occurs.

In order to prevent this, the gate G and cathode K are short-circuited using an electronic switch 3, but in reality, as shown in Figure 2, a transistor 4 etc. is used, which has internal resistance and may be affected by transient voltage. The voltage drop remains.

Furthermore, since the transient current flowing through the capacitive element 5 is extracted as a base current (N1 base) composed of the P1, N1, and P2 transistors of the PNPN switch 1, the current is amplified by the DC current of the P1, N1, and P2 transistors. Rate h
There is a drawback that the current multiplied by FE flows through the resistor (RGK) 2, resulting in a large voltage drop between the gate G and the cathode K.

Therefore, in the circuit system shown in Fig. 2, high dv
When the value of the capacitive element 5 is increased in an attempt to obtain /dt tolerance, the second junction (N1, P2) of the PNPN switch 1
Since the transient current flowing to the resistor (RGK) 2 through the capacitance C12 increases, there is a drawback that efficient improvement in dv/dt tolerance cannot be obtained.

In view of such problems, it is an object of the present invention to maintain high dv/d gate firing sensitivity of a PNPN switch.
The present invention provides a semiconductor switch circuit that improves T tolerance and prevents erroneous firing that occurs when a transient voltage is applied.

The feature of the present invention is that in order to improve the dv/dt withstand capability when a sudden voltage is applied to the PNPN switch 1, even if the base current of the transistor 4, which suppresses the voltage between the gate and cathode, is increased, the The circuit configuration is such that the transient current does not increase in the two-junction capacitance C12.

The present invention will be explained in detail below using the figures.

FIG. 3 is a block diagram showing the basic configuration of a semiconductor switch according to the present invention, which includes a PNPN switch 1, an electronic switch 3, and a capacitive element 5.

That is, the gate G and cathode K of the PNPN switch 1
An electronic switch 3 is connected between them, and when a sudden voltage is applied between the anode A and cathode K of the PNPN switch 1, the device is driven by a transient current flowing from the anode A through the connected capacitive element 5. .

Here, the capacitive element 5 is equivalently a capacitor, but
Generally, in the case of integration, elements such as transistors and diodes are used, and the transient current input terminal 51 is connected to a PNP
A transient current output terminal 52 is connected to the anode A side of the N switch 1.
are respectively connected to the control terminal 31 side of the electronic switch 3.

Further, when a transient current is passed through the capacitive element 5, the accumulated charge is discharged by being connected to the N base NN1) of the PNPN switch 1 via the charge discharge terminal 53.

Therefore, when aiming to improve the dv/dt withstand capability, even if the control current of the electronic switch 3 is increased by equivalently increasing the value of the capacitive element 5, the second junction (N1, An increase in the transient current flowing through P2) does not occur.

A specific method for configuring the circuit will be described in detail below.

FIG. 4 shows a concrete first embodiment of the semiconductor switch of the present invention.

In FIG. 4, parts with the same symbols as in FIG. 2 correspond to the same parts. In FIG. Ru.

This is not limited to transistors, but any switch that operates electronically may be used.

An example is a field effect transistor (FET).

The base-collector capacitance of a PNP transistor 6 is used as the capacitive element 5 in consideration of integration.

In this case, the charge accumulated between the base and the collector is discharged from the terminal 53 to the N base (N1) through the discharge diode 7 when the PNPN switch 1 is turned on.

Note that when PNPN is not turned on, charges are accumulated in the second junction.

This accumulated charge has a negative effect on the application of the anode voltage, making it difficult for transient current to flow.

As a result, under the off-state, the dv/dt tolerance becomes extremely good.

For this reason, even if the capacitance value of the capacitive element 5 is increased equivalently to increase the base current of the transistor 4,
Since there is no increase in the transient current flowing through the second junction (N1, P2) of the PNPN switch 1 as in the conventional example shown in FIG.
v/dt tolerance can be obtained.

Note that the discharge diode 7 for discharging accumulated charges may be a resistor instead of a diode element.

This has a forward voltage drop of diode 7 to prevent the base current of transistor 6 from flowing from anode A when the base-emitter voltage of transistor 6 is lower than the forward voltage of P1 and N1 junction of PNPN switch 1. It is.

Therefore, the diode 7 should be set to a value that allows the forward voltage of the diode to be dropped by the resistor.

In addition, in FIG. 4, the output terminal 5 of the charge discharge diode
Similar characteristics can be obtained by connecting the transistor 3 to the emitter terminal 51 of the transistor 6, but in this case there is a drawback that the emitter-base breakdown voltage of the transistor 4 must be made the same as the breakdown voltage of the PNPN switch 1.

On the other hand, in the present invention shown in FIG. 4, the emitter-base breakdown voltage of transistor 4 is
This has the advantage of being able to compensate for the withstand voltage of one joint.

FIG. 5 shows a second embodiment of the semiconductor switch of the present invention.

In the circuit shown in the figure, the capacitive element 5 is connected to diodes 7, 8, 9.
The diode 8 uses forward junction capacitance, and when a sudden voltage is applied to the anode A of the PNPN switch 1, the diode 8 has a capacitive property in order to cause the transient current to flow to the base of the transistor 4. It is used as an element.

Diode 9 is inserted to protect the reverse withstand voltage between the base and emitter of transistor 4 when a reverse voltage is applied between the anode A and cathode K of PNPN switch 1, and if it is not there, it will not work as a high voltage semiconductor switch. cannot be used.

The diode 7 is a capacitive element 5 similar to the circuit shown in FIG.
This is a diode for discharging the charges accumulated within the diode.

That is, since the diodes 8 and 9 are connected in series in opposite directions, the charge accumulated at the connection point thereof is discharged.

With this configuration, even if the value of the capacitive element 5 is increased, the transient current flowing through the second junctions N1 and P2 of the PNPN switch as explained in FIG. 2 does not increase, and the high gate point of the switch does not increase. A semiconductor switch can be obtained that can improve dv/dt tolerance while maintaining arc sensitivity, and is particularly advantageous when semiconductor integration is desired.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing an example of a conventional semiconductor switch with improved dv/dt withstand capability, and Fig. 2 is a diagram showing an example of a conventional semiconductor switch with improved dv/dt withstand capability and gate firing sensitivity.
FIG. 3 is a block diagram of a semiconductor switch according to the present invention, FIG. 4 is a diagram showing a first specific embodiment of a semiconductor switch according to the present invention, and FIG. 5 is a diagram showing a second specific embodiment of a semiconductor switch according to the present invention. It is a figure showing a concrete example. 1... Semiconductor switch element, 3... Electronic switch,
5...Capacitive element.

Claims (1)

[Claims] 1 P-type emitter P1, N-type base N1, and P-type base P
2 and an N-type emitter N2, and the P-type base P2 and N of the switch element.
an electronic switch provided between the type emitter N2, and a control terminal of the electronic switch and the semiconductor switch element P.
2 which is provided between the type emitter and is connected in reverse.
a capacitive element having two PN junction portions, the middle point of which is connected to the N-type base N1 of the semiconductor switching element, and a transient current flowing through the capacitive element causes the electronic switch to switch. A semiconductor switch circuit which performs control of the capacitive element and discharges charges transiently accumulated in the capacitive element to an N-type base N1 while the semiconductor switch element is turned on. 2 The capacitive element is constituted by a PNP transistor, the emitter of the transistor is a terminal connected to the P-type emitter side of the semiconductor switch element, and the collector is a terminal connected to the electronic switch side,
A patent claim in which the base of the transistor is the midpoint, and a terminal led out from the base, which is the midpoint, via a diode or a resistor is formed as a terminal for discharging to the N-type base N1 of the semiconductor switch element. The semiconductor switch circuit according to item 1. 3 The capacitive element is formed with two diodes connected in opposite directions, and a terminal obtained from the midpoint between the diodes through a third diode is connected to the N-type base N1 of the semiconductor switch element. The semiconductor switch circuit according to claim 1, which is formed as a discharge terminal.