JPS585631B2 - Pulpulse signal generator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse pulse signal generating device, and more particularly to a pulse pulse signal generating device which is adapted to obtain a pulse pulse signal synchronously combined with an external video signal.

In the PAL color television system, a pulse pulse signal is obtained from a synchronization signal generator.

This pulse pulse signal is a pulse signal that is inverted every horizontal scanning period (1H), and for example, in an encoder,
This signal is used as a signal to switch the output of a subcarrier oscillator for performing Hierarchical modulation of a color video signal every 1H.

When forming a pulse pulse signal synchronously coupled to an external video signal, conventionally, as shown in FIG. The synthesized signal 5c is delayed by 1H and synthesized with the other signal, an oscillator is driven based on this synthesized signal 5c, and a pulse pulse signal is formed based on this oscillation output and another predetermined signal obtained from the synchronizing signal oscillator.

In this case, since the oscillator is driven by the composite signal, there are problems with the stability and accuracy of the oscillation output.

Furthermore, as shown in FIG. 3, errors may occur due to noise in the range of ±E1 of the oscillation output.

The present invention is capable of solving the above problem, and is configured to extract a burst signal of one phase from a burst signal separated by a burst signal separation circuit, drive an oscillator with this, and use this to drive an oscillator. A voltage comparator is operated based on the phase comparison output between the oscillation output and the separated burst signal, and this voltage comparison output is used as a set signal or a preset signal for the flip-flop, so that the signal is synchronously coupled from the flip-flop. This is to obtain a pulse signal.

Embodiments of the present invention will be described below with reference to the drawings.

In FIG. 1, a color video signal 2 based on the PAL system as shown in FIG. 2A is applied to an input terminal 1.

This color video signal 2 has a video signal 3, a horizontal synchronization signal 4, and a phase difference of 90° for each 1H, for example, 4.4
3MHz burst signals 5a, 5b and vertical synchronization signal,
It consists of equivalent pulses (both not shown) and the like.

This color video signal 2 is applied to a burst signal separation circuit 6, and as shown in FIG. 2B, burst signals 5a, 5
b is extracted.

The burst signals 5a and 5b are applied to one input terminal of a synchronizing signal generator 7, a gate circuit 8, and a phase comparator 9, respectively.

In the synchronization signal generator 7, the burst signals 5a, 5b
The oscillator is driven based on this oscillation output, and horizontal and vertical synchronization signals, horizontal and vertical drive signals, burst flag signals, and other predetermined signals are generated based on this oscillation output.

The burst flag signal 11 shown in FIG.

Further, the horizontal drive signal 13 shown in FIG.
2, the 1H width signal 1 as shown in FIG.
5, and this signal 15 is applied to the other input terminal of AND gate 12.

Therefore, a gate signal 16 as shown in FIG. 2F is obtained from this AND gate 12 as an AND output of signals 11 and 15.

This gate signal 16 is obtained at a position corresponding to each of the burst signals 5a having the same phase as shown in the figure.

In the gate circuit 8, based on the gate signal 16, from the burst signals 5a and 5b inputted from the burst separation circuit 6,
As shown in FIG. 2G, only the burst signal 5a is extracted, and the oscillator 17 is driven by this burst signal 5a.

As a result, the oscillation output of the oscillator 17 has a frequency of 4
．． Locked to 43MHz, its phase is burst signal 5
It is locked in the same phase as a.

This oscillation output is applied to a phase comparator 9 and compared in phase with the burst signal 5a5b, respectively.

This phase comparator 9 is composed of, for example, a frequency discriminator, and outputs the above-mentioned oscillation output and a burst signal 5a that is in phase with the oscillation output.
When the above oscillation output is compared with the burst signal 5b having a phase difference of 90°, the output does not change, and when the oscillation output is compared with the burst signal 5b having a phase difference of 90°, a positive comparison output pulse 18a or as shown in FIG. A negative comparison output pulse 18b is obtained.

In this case, the burst signal 5b is 9 times smaller than the burst signal 5a.
If it is ahead by 0°, a positive pulse 18a is output, for example, and if it is delayed by 90°, for example, a negative pulse 18a is output.
b is output.

This pulse 18a or 18b is then applied to a voltage comparator 19a, which is compared with a positive DC voltage, and a voltage comparator 19b, which is compared with a negative DC voltage, respectively.

If the output of the phase comparator 9 is a positive pulse 18a, a pulse 20 as shown in FIG.

Further, when the output of the phase comparator 9 is a negative pulse 18b, the above-mentioned pulse 20 is obtained from the voltage comparator 19b,
In this case, this pulse 20 is applied to the reset terminal of flip-flop 21.

A horizontal drive signal 13 (FIG. 2D) is applied as a clock pulse to the flip-flop 21 from the synchronizing signal generator 7, so that the flip-flop 21
A reversal operation is performed every H.

When the pulse 20 is applied to the preset terminal or the reset terminal, the output is a pulse pulse signal 22a or 2 as shown in FIG. 2J and K.
2b is obtained from the output terminal 23.

In this case, when the flip-flop 21 is set by the pulse 20, a pulse pulse signal 22a is obtained, and when the flip-flop 21 is preset by the pulse 20, a pulse pulse signal 22a is obtained.
2b is obtained.

In addition, in FIGS. 2J and K, when the output level of the flip-flop 21 before being reset or preset is in the state shown by the dotted line, it is once inverted by the horizontal drive signal 13 and then preset or reset by the pulse 20. .

Thereafter, the flip-flop 21 is inverted by the horizontal drive signal 13 independently of the pulse 20, so that an externally synchronized pulse signal 22a or 22b can be obtained.

According to the above, since the oscillator 17 is locked to one of the burst signals 5a and 5b, the stability and accuracy of the oscillation output are improved.

Therefore, the burst signal 5a or 5b is output from the phase comparator 9.
It is possible to obtain a comparison output pulse 18a or 18b that corresponds exactly to the above.

Furthermore, as shown in Fig. 3, the oscillation output level range against noise is from 0 to +E2 or -E2, compared to the conventional one.
Since it is enlarged twice, stability can be improved by about 30%.

In FIG. 1, the AND gate 12 may be omitted and the output signal 15 of the flip-flop 14 (FIG. 2E) may be applied directly to the gate circuit 8.

Further, a gate circuit is provided between the burst signal separation circuit 6 and the phase comparator 9, and this gate circuit is connected to the output signal 15.
By opening and closing an inverted signal as a gate signal, only the burst signal 5b may be applied to the phase comparator 9.

A burst signal separation circuit 6 to which a PAL system composite video signal is supplied, and burst signals 5a and 5b separated by this burst signal separation circuit 6, which are separated by one horizontal scanning period, are extracted from each other and burst signals having the same phase are extracted. 5a, an oscillator 17 driven by the burst signal 5a of the same phase, and a phase comparison between the oscillation output of the oscillator 17 and the burst signals 5a and 5b separated by the burst signal separation circuit 6. When the phase of the separated burst signal is ahead of the phase of the oscillation force, the first
a phase comparator 9 which obtains a comparison output 18a and a second comparison output 18b when the phase of the separated burst signal lags the phase of the oscillation output;
a first detection circuit 19a that detects the comparison output 18a of the
Second detection circuit 1 that detects the second comparison output 18b
9b, and is preset by the detection output 20 of one of the detection circuits 19a and 19b of the first and second detection circuits 19a and 19b, and reset by the detection output 20 of the other detection circuit 19b. A flip-flop circuit 14 driven by a signal 13 synchronized with the horizontal synchronization signal
and the flip-flop circuit 14.
A pulse pulse signal 22 whose phase is synchronized with the phase of the burst signals 5a, 5b or subcarrier phase switching.
A pulse signal generator that obtains a or 22b.

Therefore, according to the present invention, since the accuracy and stability of the oscillator are improved, it is possible to obtain a pulse pulse signal that is accurately externally synchronized.

[Brief explanation of drawings]

FIG. 1 is a circuit system diagram showing an embodiment of the present invention, FIG. 2 is a time chart showing signal waveforms at various parts in FIG. 1, and FIG. 3 is a vector diagram of a burst signal. In addition, in the symbols used in the drawings, 5a and 5b are burst signals, 6 is a burst signal separation circuit, 9 is a phase comparator, 13 is a horizontal drive signal, 17 is an oscillator, 18a, 18
b is a comparison output pulse, 19a and 19b are voltage comparators, 2
0 is the output pulse, 21 is the flip-flop, 22a, 2
2b is a pulse pulse signal.

Claims (1)

[Claims] 1. A burst signal separation circuit to which a PAL system composite video signal is supplied, and a gate circuit that extracts burst signals every horizontal scanning period from the burst signals separated by the burst signal separation circuit to obtain burst signals of the same phase. ,
The oscillator driven by the burst signal of the same phase is compared in phase with the oscillation output of this oscillator and the burst signal separated by the burst signal separation circuit, and the phase of the separated burst signal is determined by the phase of the oscillation output. a phase comparator that obtains a first comparative output when the phase of the separated burst signal is ahead of the oscillation output and a second comparative output when the phase of the separated burst signal lags the phase of the oscillation output; A first detection circuit that detects the comparison output, a second detection circuit that detects the second comparison output, and a detection output of one of the first and second detection circuits is preset. and a flip-flop circuit which is reset by the detection output of the other detection circuit and driven by a signal synchronized with the horizontal synchronization signal of the composite video signal, and the phase of the burst signal or subcarrier is detected by the flip-flop circuit from the flip-flop circuit. A pulse pulse signal generator that obtains a pulse pulse signal whose phase is synchronized with the switching phase.