JPS5857939B2 - Digital communication method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital communication system for efficiently multiplexing, transmitting and exchanging various digital information.

Currently, various types of digital communication networks are being developed for various services.

Telephone signals are encoded and converted to 64 Kb/s before being transmitted and exchanged.

However, this communication network has a unit speed of 64 Kb/s, and cannot efficiently transmit low-speed digital signals.

On the other hand, digital data dedicated line networks and digital data exchange networks (line switching) have been considered and developed mainly for low-speed and medium-speed digital signals such as data signals.

These networks provide various transmission rates (bearer rates) corresponding to various data rates.

For example, in our country's public data network, 3.2, 6.4, 1
A bearer rate of 2.8°64 Kb/s is available.

However, since there are various speeds, there are many types of line compatible equipment, making it difficult to achieve an economical ratio, and requiring multiple traffic processing at the exchange, resulting in complicated control and line capacity constraints. There's a problem.

In addition, digital telephone networks, digital data leased line networks,
In either case, a digital data exchange network is a digital integrated network that connects digital transmission lines and digital exchanges using digital signals, and requires network synchronization.

The need for network synchronization in this way imposes a constraint on the communication network.

Furthermore, all of the above communication networks transmit digital information continuously, and are not efficient communication systems for burst signals such as full-talk communication.

On the other hand, a packet communication network is a highly flexible communication system that transfers information asynchronously in units of packets.
Since one terminal is connected by a virtual circuit without a real line, if transfers occur from various locations all at once, the communication path will overflow.

Flow control is required as a countermeasure against this overflow, which has the drawback of increasing the throughput of the communication system.

Furthermore, since the multiplexing formats are fundamentally different between a circuit switching network where the basic multiplexing unit is octet (8 bits) multiplexing and a packet communication network where the basic multiplexing unit is packets,
Another major problem was that it was difficult to integrate various services.

In order to solve the drawbacks of the conventional communication system, the present invention aims to improve the speed of various information signals, that is, the information signals of each channel (by packet multiplexing and transmitting them at a predetermined information speed). It is an object of the present invention to provide a digital communication system that is flexible and can configure a communication network that does not require flow rate control.

For example, in FIG. 1, each channel, that is, each input terminal A1
．． A2. ..., various signals from AN correspond to circuit C1
, C2, . . . , CNt are input, and these corresponding circuits C1 to CN are connected to the multiplex highway H.

Among the input signals, A1 and AN are, for example, packetized input signals as shown in FIG.
is the unpacketed input signal.

(FIG. 2), PKT represents each packet, ■ represents continuity information, and PKTn represents a packet corresponding to the input signal AN4 in the multiplexed packet.

In this invention, if the input signal is packetized, it is multiplexed in units of packets, and if the input signal is not packetized (in contrast, the multiplexer assembles the packets and multiplexes them in units of packets). be converted into

In FIGS. 1 and 2, the first and Nth terminals represent packet terminals, and the second terminal represents a non-packet terminal.

In this way, information from all terminals is multiplexed in packet units as shown in FIG. 2H.

In this case, in order for the input signals to be multiplexed without any loss of information, it is necessary that the sum of the information speeds of the input signals does not exceed the transmission speed of Highway H.

Conventionally, in the case of multiplexing continuous signals, the information rate of each input signal is defined and specific bits in the multiplexed frame structure are assigned, so the amount of information never exceeds the transmission capacity.

However, conventional packet communications are asynchronous (as incoming packet information is multiplexed), so there is no guarantee that the amount of information will not exceed the transmission capacity, and some kind of flow control is required.

The communication system of the present invention enables multiplexing without overflow of information by specifying a constant inversion speed not only for continuous information but also for burst signals such as packet terminals.

That is, by specifying the number N of bits transmitted per unit time T for a bursty signal, the equivalent speed N/T can be defined.

In this case, the information does not have to arrive continuously (it does not need to arrive in bursts), and the amount of information per unit time (number of bits)
It stipulates only the following.

In other words, the packet terminal also transmits its information at a predetermined equivalent information rate.

In this way, equivalent speeds are predetermined for both continuous signals and burst signals, and by setting the transmission speed faster than the sum of the information speeds of all channels in one way H, multiplexing can be performed without overflow. be converted into

FIG. 3 shows the configuration of a circuit that performs this multiplexing.

The figure shows a multiplexing circuit for packetized input signals, and the output side of the input interface circuit 11 is connected to the input side of a memory 12 and a flag detection circuit 13, and the memory 12 temporarily stores the input signal.

The flag detection circuit 13 detects the flag of the packet, that is, the beginning and end of the packet.

Writing and reading of the memory 12 is controlled by a memory control circuit 14.

The memory control circuit 14 sends the arrival status of each input information to the common control circuit 17 through an address bus 15 for specifying inputs to be multiplexed and an answer bus 16 that monitors the occupancy rate of the memory 12 and responds with the result. Connected.

The common control circuit 17 commonly controls the multiplexing devices.

Information multiplexed in packet units is transferred to the highway bus 18.
connected to.

The beginning of the input signal from the interface circuit 11 is detected by the plug detection circuit 13, and the input signal is sequentially written into the memory 12 from a predetermined address in the memory 12 in accordance with the detection result.

The common control circuit 17 scans each channel and stores its memory 1.
The signals of the channels written in packet units to 2 are read out to the highway bus 18 in packet units to be multiplexed.

When each channel is scanned, if the input signal has not yet been written to the memory 12 in packet units during writing, for example, the response signal is sent to the common control circuit 17c via the response bus 16I.

The common control circuit 17 uses this response signal as a trigger to scan the next channel.

By the above operations, the signals of each channel are multiplexed in units of packets.

In the above explanation, the packet input signal G is multiplexed, but in the case of a non-packet continuous signal, flag detection is not necessary, and the flag detection is determined based on the above-mentioned equivalent information rate from the control circuit G of the multiplexer. The signal buffered in the memory 12 is divided and read out in units of packet length, and packetized with a packet header signal attached.

The common control circuit 17 may scan this for each channel and multiplex it.

In this way, in the present invention, input signals are multiplexed in units of packets, whether they are burst signals or continuous signals.

In the case of multiplexing and demultiplexing, it is possible to separate each packet into each channel by detecting the channel number given to the header of each packet, and it is sufficient to buffer the packet in an appropriate buffer memory and output it.

When multiplexing data in units of packets, it is also possible to use a bursting circuit to create multiple bursts for each same route.

An example is shown in FIG. In the same figure, A1 to AN1H are the same as those in FIG. 2, and Aij is Ai? The third packet signal that arrives here, F is a burst flag, and C is burst control information.

It is also assumed that information A1 and Ak are destined for station P, and information A2 and AA are destined for station Q.

At this time, multiplexing on highway H collects packets destined for the same station, multiplexes them, bursts them, puts them before and after with a flag F, and puts the destination P in the control information C. Include.

Similarly, when multiplexing packets destined for the O and Q stations, they are similarly bursted by the G bursting circuit.

The burst length can be arbitrarily selected depending on the amount of arriving traffic and the occupancy rate of the waiting memory.

By multiplexing these packets and displaying the destination in a burst,
The packet distribution process at the intermediate station (at the intermediate station) no longer needs to be done on a packet-by-packet basis, but can be done on a burst-by-burst basis, and the processing part can also be wired, greatly increasing the amount of processing that can be done at the intermediate station. It is possible to reduce the

The highway on which digital signals multiplexed in packet units as described above are transmitted may be set as a dedicated line, or one or more of the plurality of channels multiplexed in packet units may be set as a dedicated line. good.

Further, signals multiplexed in packet units can be transmitted between terminals and exchanges, and between exchanges.

As explained above, the method of the present invention allows each channel to receive continuous information, burst information, etc. (even if it gets difficult, etc.) It predefines an economical information rate and multiplexes it in packet units, so it has the following advantages. .

(1) By setting the equivalent speed, the transmission of multiplexed signals is set to the same speed as the sum of the respective equivalent speeds before multiplexing, or faster than that, thereby controlling the flow rate as a network. control) is no longer required, simplifying control.

(2) Since the equivalent speed is determined and burst multiplexing is performed, information is not blocked during communication on the terminal side, and the update speed of the terminal can be made variable.

(3) Since multiplexing is performed in packet units, network synchronization is not required.

(4) Packet or burst multiplexing allows circuit switching, packet switching, and leased lines to be handled in a unified manner.

[Brief explanation of the drawing]

Fig. 1 is a system diagram of a digital communication system according to the present invention, Fig. 2 is a time chart of multiplexing in Fig. 1, and Fig. 3 is a circuit configuration diagram showing an example of a multiplexing device used in the inventive system. , FIG. 4 is a time chart showing another example of multiplexing.

Claims (1)

[Scope of Claims] 1. A plurality of channels through which human power signals are respectively transmitted, a plurality of memories provided between the plurality of channels and the highway, and a plurality of memories provided respectively corresponding to the plurality of memories, The packetized input signal among the human input signals is packetized in units of packets, and the non-packetized input signal is packetized based on an equivalent information rate set with N being the effective number of bits transmitted per unit time T, and then stored in the memory (this). A control circuit that scans the plurality of channels and writes the human signals written in packet units to the plurality of memories at a speed equal to or equal to the sum of their information speeds or the transmission speed of the highway. A digital communication system characterized by having a common control circuit that multiplexes signals so as to transmit signals to the highway. A plurality of memories are provided, and a plurality of memories are provided corresponding to the plurality of memories, and among the input signals, the packetized input signal is transmitted in units of packets, and the non-packetized input signal is transmitted in units of time Tl. a control circuit that packetizes the packets based on an equivalent broadcast speed set with the number of bits being set as N and writes the packets into the memories; a common control circuit that multiplexes the input signals such that the sum of their information speeds is equal to or lower than the transmission speed of the highway, and sends the multiplexed input signals to the highway;
A digital communication system characterized by comprising a burst multiplexing circuit for burst multiplexing the signals multiplexed by the common control circuit for each same route and adding a flag and a control signal to the bursts.