JPS586252B2 - Manufacturing method of cathode ray display panel - Google Patents

Description

[Detailed description of the invention] The present invention relates to a method of manufacturing a cathode ray display panel.

Conventionally, an MIS as shown in FIG.
(Metal Insulator-Semicondu
-ctor) A device using a transistor is known.

Here, MIS transistor refers to a field effect transistor that has an MIS structure, that is, a structure in which a voltage is applied to a metal electrode to control the semiconductor surface via an insulator, and a channel formed between the source and drain. An insulated gate field effect transistor is an insulated gate field effect transistor in which a metal electrode is provided on the top via an insulating layer, and the channel current is controlled by the voltage applied to the transistor.
A typical example is a transistor.

First, in FIG. 1a, each display element 1 is arranged in a matrix and has, for example, a 5.times.7 dot display surface.

As shown in FIG. 1b, each of the display elements 1 has semiconductor layers 3 and 4 of a conductivity type different from that of the semiconductor substrate 2 formed at a distance from each other on the main surface of the semiconductor substrate 2.

An insulating film 5 and an electrode 6 are sequentially formed on the semiconductor substrate 2 between the semiconductor layers 3 and 4 to constitute a MIS transistor. A light layer 8 is formed.

It should be noted that an insulating coating 9 is formed on the main surface of the semiconductor substrate 2 which has been surface-processed in this way except for the region where the phosphor layer 8 is formed.

In each display element 1 configured in this way, as shown in FIG.
a to 7e are formed, and the electrodes 6 in each row are commonly connected to form X electrode groups 6a to 6g.

A filament (not shown) is stretched above the display surface, and a grid (not shown) is provided between the filament and each display element to diffuse electrons emitted from the filament. It is being

Incidentally, when manufacturing such a cathode ray display panel, an electrodeposition method is used to form the phosphor layer 8 on the semiconductor layer 4, and this method has been performed as follows.

That is, as shown in FIG. 2, the electrode plate 1.1 and the display element 1 are immersed in a phosphor suspension 10, and the electrode plate 11 is charged with a positive voltage by a power source 12. 7a to 7e are connected by wire bonding, and a negative voltage is applied to these electrode groups 7a to 7e. When the MIS transistor constituting the display element 1 is a P channel, the electrode 4 is the source electrode and the electrode 7 is the drain. The electrode, electrode 6, serves as a gate electrode, and a negative voltage is applied to the gate electrode (electrode 6) with respect to the drain electrode (electrode 7) by the power supply 13, thereby making the MIS transistor conductive and performing electrodeposition.

When the MIS transistor is an N-channel, the source electrode and drain electrode are opposite to those for a P-channel, and therefore voltage application by the power source 13 is also performed in the opposite direction for electrodeposition.

Note that the electrode groups 6a to 6g are also connected by wire bonding and a voltage is applied thereto, similarly to the electrode groups 7a to 7e.

However, such an electrodeposition method is complicated by the need to apply a voltage to each electrode 6, 7 of the display element, and the phosphor adheres to the electrode connection part (bonding wire, etc.). However, there was a drawback that the subsequent removal work was complicated.

In particular, when such electrodeposition work is performed in a state where each display element 1 is integrated, the above-mentioned complexity becomes even more serious.

Therefore, an object of the present invention is to provide a method for manufacturing a cathode ray display panel in which a phosphor can be electrodeposited in a simple process.

The present invention will be explained in detail below using Examples.

FIG. 3 is an explanatory diagram showing an embodiment of the method for manufacturing a cathode ray display panel according to the present invention.

First, it is assumed that the MIS transistor, which is a component of each display element 1 of the cathode ray display panel, is a P-channel MIS transistor.

That is, on the main surface of an N-type semiconductor substrate, P-type semiconductor layers are formed spaced apart from each other, and an insulating film and an electrode are sequentially formed on the N-type semiconductor substrate between the P-type semiconductor layers.

As shown in FIG. 3, in the MIS transistor having such a configuration, an electrode 7 is formed on one P-type semiconductor layer 3, and an insulating coating is formed with the surface of the other P-type semiconductor layer 4 exposed. 9 and together with the electrode plate 11, a phosphor solution 10 is formed.
Soak in.

Then, by the power supply 12, the electrode plate 11 has a positive,
A negative voltage is applied to the N-type semiconductor substrate 2 of the display element 1.

In this way, the P-type semiconductor layer 4 and the N-type semiconductor substrate 2
A forward bias is applied between the P-type semiconductor layer 4 and
The voltage at is approximately equal to the negative voltage at the N-type semiconductor substrate 2.

Therefore, the phosphor molecules in the solution 10 will be electrodeposited on the surface of the P-type semiconductor layer 4 to form the phosphor layer 8.

According to such a method, it is only necessary to apply a voltage to the N-type semiconductor substrate 2 to the display element 1, and the electrode group 6a
It is possible to eliminate the complexity of wiring work such as connecting 5g and 7a to 7e by wire bonding.

This is particularly true when the display elements 1 are integrated on one N-type semiconductor substrate, and the phosphor layer 8 in each display element 1 can be formed by simply applying a voltage to the N-type semiconductor substrate. It is possible to achieve extremely great effects.

Further, since no voltage is applied to the electrodes 6 and 7 of each display element 1, there is no need to wire bond the electrode connection portions, and therefore the phosphor is attached to the electrodes 6 and 7.
and 7 can be masked with an insulating coating to avoid adhesion.

Therefore, the troublesome work of removing the adhered phosphor is eliminated.

In this embodiment, a case has been described in which a display element without a memory function is used, but the MI
For example, M-NOS (Metal
-Nitride-Oxide-Semic-.

Of course, a device having a memory function such as a transistor may also be used.

Here, the M-NOS transistor is a transistor whose insulated gate has a two-layer structure using an oxide film and a nitride film instead of the oxide film of a MOS transistor, and there is a gap between the threshold voltage and the gate voltage. Since a hysteresis relationship exists, a type of nonvolatile memory can be realized by making this hysteresis characteristic correspond to "1" and "'0".

As described above, according to the method for manufacturing a cathode ray display panel according to the present invention, a phosphor can be electrodeposited through a simple process.

[Brief explanation of drawings]

1a and 1b are block diagrams showing an example of a conventional cathode ray display panel, FIG. 2 is an explanatory diagram showing an example of a method of manufacturing a conventional cathode ray display panel, and FIG. 3 is a cathode ray display panel according to the present invention. FIG. 2 is an explanatory diagram showing an example of a manufacturing method. 1...Display element, 2...Semiconductor substrate,
3, 4... Semiconductor layer, 5... Insulating film,
6, 7... Electrode, 8... Fluorescent material, 9.
...Insulating coating, 10...Solution, 11...
... Electrode plate, 12.13 ... Electrode plate.

Claims (1)

[Claims] 1 Consisting of a plurality of display elements arranged in a matrix and a filament stretched over the display elements, each of the display elements includes a semiconductor substrate and the semiconductor substrate formed on the main surface of the semiconductor substrate at a distance from each other. A phosphor layer is formed by electrodeposition on one semiconductor layer surface of an MIS type transistor consisting of a semiconductor layer of a conductivity type different from that of the substrate, an insulating film and an electrode sequentially formed on the semiconductor substrate between the semiconductor layers, and , the other semiconductor layer of each display element arranged in the X-axis direction is commonly connected, and the electrodes of each display element arranged in the Y-axis direction are commonly connected. In manufacturing the element, the MIS type transistor is a P channel type, and this M
The IS type transistor is immersed together with an electrode plate in a solution containing a phosphor, and a phosphor is electrodeposited on the surface of the one semiconductor layer by applying a positive voltage to the electrode plate and a negative voltage to the semiconductor substrate of the display element. A method for manufacturing a cathode ray display panel, characterized in that the cathode ray display panel is formed by: