JPS587056B2 - Microfabrication method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a microfabrication method that is effective when applied to, for example, the manufacture of semiconductor devices.

It is well known that in recent years, especially in the semiconductor industry, all objects have been aimed at miniaturization, and many microfabrication methods have been proposed and implemented for this purpose.

In particular, recently, excellent manufacturing equipment such as electron beam exposure equipment and X-ray exposure equipment has been developed and put into practical use, and along with this, photoresist materials are being actively developed.

However, even in the case of these manufacturing facilities with excellent performance, at present, they are difficult to handle, have troublesome restrictions on the workpieces, and are too expensive.
At present, we have not reached the stage where it can replace the conventional ultraviolet exposure method.

The purpose of the present invention is to make it possible to easily and stably perform processing that was difficult to accomplish using conventional techniques, at the level of conventional ultraviolet exposure methods, that is, without using the expensive equipment mentioned above. , provides a microfabrication method.

Conventionally, in masking technology using an ultraviolet exposure method, the minimum value of the opening width of a workpiece that can be processed has been limited to 2 to 3 μm.

Therefore, there is a limit to the miniaturization of semiconductor devices.

However, in the present invention, a polyimide resin film is formed in advance before applying a photoresist film on the surface of the workpiece to be processed, and then the photoresist film is selectively applied on the polyimide resin film. The first consisting of
forming a second pattern made of the polyimide resin film by selectively removing the polyimide resin film using the first pattern as a mask;
Furthermore, by employing a microfabrication method characterized by etching the surface of the workpiece using this second pattern as a mask, the minimum opening width of the workpiece can be set to 1.0 μm or less. make it possible to

EXAMPLES Below, the contents of experiments that formed the basis of the present invention and examples of the present invention will be described in detail with reference to the drawings.

FIGS. 1 to 2 show the contents of basic experiments of the present invention, and FIGS. 3 a to 3 d show examples of the present invention.

FIG. 1a shows a state in which a Si02 film 2 is formed on the surface of a silicon substrate 1, and in this experiment, this Si02 film 2 is the workpiece.

Figure b shows a polyimide resin film 3 on the SiO2 film 2.
The state that formed? However, Figure C shows a state in which a striped pattern is formed using the photoresist film 4.

Figure C' is a partially enlarged view of Figure C, where the opening width of the photoresist is W1 and the photoresist width is W2.

Figure d shows a state in which the polyimide resin film 3 has been selectively removed using a hydrazine hydrate-based etching solution using the striped pattern as a mask.

Figure d' is a partially enlarged view.

The figure e shows the SiO2 film 2 exposed in the opening of the polyimide resin film 3 formed by the process shown in the figure d.
This figure shows the state of selective removal using an etching solution for O film.
/ is a partially enlarged view.

Is f in the same figure the same as e in the same figure? After processing, the photoresist film 4 and polyimide resin film 3 are removed.
is a partially enlarged view.

Furthermore, SiO. The opening width of the membrane 2 is W3.

Now, in the series of processes shown in FIG. 1, in this experiment, the film thickness t1 of the polyimide resin film 3 in FIG.
The correlation between the opening width W1 of the photoresist film 4 in the figure C and the opening width W3 of the SiO film 2 in the figure f was investigated.

The results are shown in FIG.

The processing conditions in this experiment are as follows.

■ As a polyimide resin film, commercially available product name PIQ (product of Hitachi Chemical Co., Ltd.) or commercial product name Trenice (product of Toray Industries, Inc.)
was coated using a spinner and baked at 350° C. for 30 minutes in the air.

The film thickness was controlled by the rotation speed of the spinner.

■ Commercial product name KMR7 5 as a photoresist film
2 (Negaquip; manufactured by Eastman Kodak Company),
The KMR 7 5 2 was formed by spin coating using a spinner.

(2) The photoresist film was exposed using a conventional ultraviolet exposure method.

■ Hydrazine hydrate (H2N-NH2-H20) is used as the etching solution for the polyimide resin film, and the specific etching method is to keep the etching temperature (liquid temperature) at 25°C and immerse and stir the workpiece. The etching progressed.

Etching was stopped by confirming the completion of etching using a monitor sample that was processed at the same time as the workpiece.

Note that etching is not unnecessarily prolonged and is stopped within 15 seconds after completion is confirmed by a monitor.

Stopping is done by immersing in a large amount of water.

The monitor for confirming the completion of etching uses a method in which a polyimide resin film is formed on a Si substrate under the same conditions as in (2), and the film is immersed in an HF aqueous solution diluted to 1/100.

If the polyimide resin film remains, the HF aqueous solution will remain attached to the entire surface of the monitor because it is hydrophilic, but if the polyimide resin film is completely removed and the Si surface is exposed. It becomes hydrophobic and the dilute HF aqueous solution is instantly eliminated.

Since the etching rate at 25° C. is 0.005 μ/SeC, the optimum etching time for a polyimide resin film of, for example, 0.7 μm is 140 seconds to 155 seconds.

The etching solution for the SrO2 film is a normal buffered etching solution (50% HF solution: 40% NH4F solution-1).
:6), and the workpiece was immersed in the liquid while keeping the temperature at 40°C.

As in the case of the polyimide resin film described above, the etching is stopped using the SiO2 film-coated SiO2 film that is processed at the same time as the workpiece.
Confirm completion by checking hydrophobicity on the substrate.

In this case as well, the etching is completed using a large amount of water within 15 seconds after confirming the completion on the monitor.

Since the etching rate at 40° C. is 25 Å/sec, the optimum etching time for a SiO2 film of 3000 people, for example, is 120 seconds to 135 seconds.

Figure 2 shows data taken according to the above conditions, and as seen in the results, PIQ, which is a polyimide resin film,
The thickness t1 of the membrane or trenice membrane 3 is 0.7 and 0.8μ
m, the opening width W1 of the resist 4 is 2.0 and 2.0, respectively. 5
In the case of μm, the processed dimensions of the S t 02 film 2, that is, the opening width W3, are 0.7 and 0.8 μm, respectively, which are much smaller than the limit values of the prior art.

The reason why such results are obtained is that in general polyimide resins such as the above-mentioned PIQ membrane and the commercially available product name TRENICE manufactured by Toray Industries, as shown in Figure 1 d',
This is thought to be due to the characteristic that etching progresses inside the opening width W1 at an angle θ with respect to a plane perpendicular to the etching depth direction.

In the case of PIQ film or Trenise film, according to experiments, the film thickness t
When 1 was approximately 2.5 μm or less, θ was 7 to 10 degrees, and when the film thickness was greater than that, θ was 10 to 15 degrees.

Here, according to a simple geometrical calculation, the width W2 of the photoresist film 4 in FIG. 1C is the undercut width W.
Since it requires at least twice as much as , its value is limited by equation (1).

For example, if the thickness of the polyimide resin film 3 is t,=0.4μ
m, resist opening width W1=2. 0 μm, Si
If the desired opening width of the 02 film 2 is W3 = 1.5 μm, and the angle θ of the etched surface is set to 8.5 degrees, the resist width W2 will be 4.9 μm or more, which is the minimum value for practical use. 7. It is approximately 0 μm.

In other words, it is possible to perform processing such that openings with a width of 1.5 μm can be formed at a pitch of 7.5 μm.

The above is the content of the basic experiments related to the present invention.

Next, as an embodiment of the present invention, an N-channel buried type static induction transistor (Static Inductor) is used.
onTransistor: Please refer to Figure 3 for the case where it is applied to the manufacturing process of a vertical junction field effect transistor exhibiting triode characteristics (hereinafter referred to as SIT).
I will explain.

FIGS. 3a to 3d are schematic cross-sectional views of each typical step of SIT employing the present invention, and FIGS. 3a' to 3d' are similar views according to the prior art.

FIG. 3a shows an N+ silicon substrate 5 based on the content of the present invention.
An N-drain layer 6 was formed by vapor-phase growth on the top of the SiO film 7a using a conventional method, and a commercially available product name PIQ was spin coated on the surface of the SiO film 7a formed on the entire surface using a spinner. Film thickness: 0.7μm by heating at 350℃ for 30 minutes
After forming a PIQ film, and further forming a striped photoresist pattern thereon, the S102 film 7a is selectively removed using a normal buffered etchant.

The width of the opening (corresponding to W1 in FIG. 1) of the photoresist pattern is 2.0 μm, and the remaining width (corresponding to W1 in FIG. 1) is 2.0 μm.
2) is 1 0. 0 μm, and S t
The width W3 of the opening 8 of the 02 membrane 7a is 0.8 toughness, and the remaining S
The width W4 of the iO2 film 7a is 11.2 μm.

The situation shown in Figure a is exactly the same as the content of the experiment described above.

Figure b shows that a P+ gate layer 9 is formed in the opening shown in figure a in the usual way.
Figure C shows a state in which an N source layer 10 is further grown in a vapor phase using a conventional method, and a P+ gate layer 9 is buried therein.

Figure d shows a state in which an electrode is taken out from the P+ gate 9 by etching and an N+ ohmic layer 11 of the source is formed to complete the basic structure of the SIT.

In addition, in the same figure d, W indicates the width of the channel, and t indicates the length of the channel, and the respective values are W = 5.2 μm and L = 8.
．． It is 0 μm.

Next, the conventional method will be described.

FIG. 3a' shows a conventional technique in which an N- drain layer 6' is formed and integrated on an N+ silicon substrate 5' by a normal vapor growth technique, and an S102 film 7a' is formed on the entire surface. , a striped pattern of photoresist is formed thereon, and the SiO2 film 7a' is selectively etched.

The photoresist pattern is exactly the same as that shown in Figure a above, and the width of the opening is 2.0 μm and the remaining width is 10.0 μm.
μm, the width W3' of the opening 8' of the Si02 film 7a/ is 2.0 μm, and the width W of the remaining Si02 film 7a/
4' is 10.0 μm.

Figures b', c' and d/ in the same figure show the state in which the process has proceeded in exactly the same way as in figures b, c and d, respectively.

In the figure d/, the channel width W' is 4.0 pm, and the channel length i is 8.0 pm. It is Oμm.

After all, when comparing d in the same figure and d/ in the same figure, the SIT shown in d in the same figure that adopts the present invention is 23% wider in channel width than the one shown in d', and the current can be reduced accordingly. A large amount of water can be passed, and the internal resistance of the SIT can be correspondingly reduced.

Furthermore, when comparing the embedded P+ gates 9 and 9',
Both have the same thickness of 8.0 μm, but the width of the former is about 20% narrower.

This reduces the capacitance between the gate and the source and between the gate and the drain, so that it is superior to the latter in terms of frequency characteristics.

Furthermore, in order to match the characteristics of the SIT made by the prior art to the SIT according to the present invention, the area of the active region, that is, the region constituting the channel must be increased by about 10%.

However, even in that case, the shape of the P+ gate does not change, so the above-mentioned capacitance is not improved.

As explained above, the present invention enables processing in a range that is difficult to achieve with conventional ultraviolet exposure methods without using expensive equipment.

It should be noted that the present invention can be applied to all other types of microfabrication that require an opening width of 2 μm or less, as in the case of the above-mentioned embodiments.

For example, in addition to manufacturing semiconductor devices other than SIT, surface wave filters (Sar
face AcousticWave - Filte
r) microfabrication and bubble memory element G. G. G.
(Gallium Gadolinium Garn
et) Needless to say, it is also effective for microfabrication of substrate elements, etc.

[Brief explanation of the drawing]

Figure 1 is a diagram prepared to explain the experimental content that is the basis of the present invention, a to f are cross-sectional views shown in the order of the steps, and c/ and fl are enlarged views of the main parts of c to f, respectively. FIG. FIG. 2 is a diagram showing the relationship between t1 and W3 in FIG. 1 for each W1. 3a to 3d are cross-sectional views shown in the order of steps prepared to explain an embodiment in which the present invention is applied to the manufacturing process of an N-channel buried gate type SIT.
'-d' are similar views according to the prior art. 1------Silicon substrate, 2, 7a, 7b, 7a'
,7b'-...S t 02 membrane, 3,3'...
...Polyimide resin film, 4...Photoresist film, 5, 5'...-N+ silicon substrate, 6
, 6'...N-drain layer, 8,8'...
...S s 02 membrane opening, 9,9'...
P+ gate layer, 10, 10'...N source layer, 11, 11'...N+ source ohmic layer.

Claims (1)

[Claims] 1 Form a polyimide resin film on the surface of the workpiece to be processed, selectively form a first pattern made of a photoresist film on the polyimide resin film, and use the first pattern as a mask. By selectively removing the polyimide resin, a second pattern made of the polyimide resin film having an opening width narrower than that of the first pattern is formed, and the second pattern is further removed. A microfabrication method characterized by etching the surface of the workpiece as a mask.