JPS588149B2 - Hand tie souchi - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a connection structure between a main surface and a support in a semiconductor device of a type in which a PN junction end is exposed on the main surface.

In such a semiconductor device, there are two conventional methods for connecting the main surface of a semiconductor element and a support body.

First, the first method will be explained by giving an example and referring to the drawings.

The semiconductor device in FIG. 1 shows a cross-sectional view of a triac, in which 1 is an N-type silicon substrate, 2 and 3 are P layers, 4 is an N-type gate layer, 5 is an N-type first anode layer, and 6 is N
shaped second anode layer.

In order to connect the main surface on which the P layer 3 and the second anode layer 6 are exposed to the support 13, an electrode metal 1 is applied to the main surface by a method such as vapor deposition, since silicon and solder do not adhere to each other.
1 is attached, and then the electrode metal 11 and the support 13 are bonded together by solder 12 by low-temperature heat treatment.

Therefore, the cross-sectional structure of the connection point in this case is
It takes the form of metal electrode-solder-support.

The second method is to connect the semiconductor element and the support so that a semiconductor alloy exists between them.

In this case, for example, if gold silicon is used as the semiconductor alloy, the cross-sectional structure is semiconductor element (silicon)-gold silicon-gold-support.

Now, comparing the two, the former allows the connection between the semiconductor element and the support body through low-temperature heat treatment than the latter, and furthermore, even if the PN junction end is exposed on the connection surface of the semiconductor element, this junction end can be connected. There is an advantage that the functions of the semiconductor device are not impaired because the parts are not destroyed.

However, in a semiconductor device like the one shown in FIG. 1, since silicon and solder do not adhere to each other, electrode metal 11 must be provided on the connection surface.
There are disadvantages in manufacturing, and these points cannot be ignored.

Therefore, if the second connection method described above is used, the electrode metal 11 shown in FIG. 1 is no longer necessary.

However, in this case, in the semiconductor device shown in FIG.
If the second connection method is used to connect a semiconductor device that lacks 1, the PN junction 7 will be destroyed, and the electrical characteristics of the semiconductor element will be adversely affected.

The structure of the semiconductor device according to the present invention was developed with the aim of eliminating this drawback, and the present invention eliminates this drawback and makes it possible to employ the second connection method.

The present invention will be described in detail below with reference to examples.

Although FIG. 2 is a cross-sectional view of an embodiment of the present invention, the general structure of the semiconductor element itself is almost the same as that of FIG. 1 showing a conventional example, so a description thereof will be omitted.

Only the differences between FIG. 2 and FIG. 1 will be explained.

Now, after manufacturing the same device as shown in FIG. 1, the end portion 7 of the PN junction exposed on the flat main surface at the bottom of the device is etched into a mesa shape, and an insulating film 14 is formed in this etched groove.
Cover.

Next, the connection to the support body 13 is performed, and there are two methods at this time.

One method is to apply gold plating or nickel plating to the surface of the support 13 made of Kovar or iron-nickel alloy, and to provide a thickness of, for example, 50 mm between the support 13 and the semiconductor element.
This is a method in which high-temperature heating is performed with a gold piece 16 of .mu. being interposed.

Another method is to apply relatively thick gold plating, for example, 5 μm thick, to the surface of the same support 13 as described above, place the semiconductor element directly on this, and heat it at a high temperature.

In both of the above two methods, heat treatment is performed at a high temperature of 380°C to 400°C, which is somewhat higher than 370°C, which is the eutectic melting point of gold silicon.

Through this treatment step, a gold-silicon eutectic layer 15 is generated between the gold layer 16 in FIG. 2 and the semiconductor element, and the semiconductor element is firmly fixed to the carrier.

Furthermore, since the end portion 7 of the PN junction is protected by the insulating coating 14 at this time, the end portion 7 is not destroyed by heat and the electrical characteristics are not affected in any way.

In the above description of the present invention, the case of a triax has been explained as an example, but the structure of the present invention has a PN junction end exposed on the main surface of the semiconductor, and any structure in which a support is connected to this main surface can be used. Needless to say, it can be effectively applied to semiconductor devices.

[Brief explanation of drawings]

FIG. 1 is a sectional view of a semiconductor device according to a conventional embodiment, and FIG. 2 is a sectional view of a semiconductor device according to an embodiment of the present invention. In the drawings, 1 is an N-type substrate, 2 and 3 are P layers,
4 is an N-type gate layer, 5 is an N-type first anode layer, 6 is an N-type second anode layer, 7 is a PN junction end, 8 is a bathivation layer, 9 is an electrode, 10 is a lead wire, 11 is a electrode, 12
1 is solder, 13 is a support, 14 is an insulating film, 15 is a gold silicon layer, and 16 is a gold layer.

Claims (1)

[Claims] 1. A first conductive type semiconductor layer formed to a certain depth from one main surface of a semiconductor substrate, and selectively formed within the first conductive type semiconductor layer from the one main surface to a depth shallower than the first conductive type semiconductor layer. In a semiconductor device having an opposite conductivity type region formed,
A main bonding surface between the first conductivity type semiconductor layer and the opposite conductivity type region is formed substantially parallel to the one main surface, and the first conductivity type semiconductor layer exposed on the one main surface and the opposite conductivity type region are formed substantially parallel to the one main surface. A mesa groove shallower than the depth from the one main surface to the main bonding surface is formed at the joining end with the mold region, a glass film is formed in the mesa groove, and the first part exposed on the one main surface is formed with a glass film. 1. A semiconductor device, wherein the one conductivity type semiconductor layer and the opposite conductivity type region are connected to a support via a semiconductor alloy.