JPS588663B2 - Failure detection device for thyristor conversion equipment - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to failure detection of a control device that supplies load current through a thyristor, such as an inverter device or a chopper device, and particularly has a function of determining the cause of commutation failure failure. The present invention relates to a failure detection device for a thyristor conversion device.

Control devices such as inverter devices or chopper devices that use thyristors (hereinafter simply referred to as inverter devices) are used in a wide range of areas because they have no wear parts and can be expected to have a long life. When the device is used as a power source for driving a continuous processing system such as a textile industry system or a paper manufacturing industry system, if the inverter device breaks down, the product will be defective or raw materials will be wasted.

When applying an inverter device to this continuous processing system, it is necessary to prevent the occurrence of failures as much as possible, but even if a failure occurs, early failure recovery is required.

On the other hand, the most serious failure of an inverter device is failure due to commutation failure, and the causes of this commutation failure include overcurrent, deterioration of the main thyristor itself,
This may be caused by a defect in the control circuit or an abnormality in the commutation circuit or its auxiliary power source.

However, the conventional fault detection device for inverter equipment is
Although commutation failure can be detected, it does not have a function to determine the cause, so it takes a considerable amount of time to investigate the cause.

Therefore, not only does the operating rate of the system decrease accordingly, but also the number of defective products increases, and depending on the situation, raw materials may be wasted.

For this reason, there is a strong desire to suppress the occurrence of failures as much as possible, and to be able to immediately identify the cause of failures should they occur.

Therefore, an object of the present invention has been made to satisfy the above-mentioned needs, and it monitors the function of the commutation circuit and also monitors the operating status of the main circuit, control circuit, etc. Failure detection of a thyristor converter device that makes it possible to know the cause of commutation failure failure based on the above, and controls the load etc. according to the function of the commutation circuit as necessary to suppress the occurrence of commutation failure as much as possible. The goal is to provide equipment.

Hereinafter, an example in which an embodiment of the present invention is applied to an inverter device will be described with reference to FIG.

In FIG. 1, a thyristor 1 is connected in series with the illustrated polarity between a DC positive power supply bus 10 and a DC negative power supply bus 11.
21 and 122 are main thyristors that allow current to flow through a load (not shown) connected to the load terminal 13;
Flywheel diodes 141 and 142 are connected in antiparallel to 1 and 122, respectively.

15 is a commutation circuit, which includes commutating thyristors 161 and 162 connected in series between the positive and negative buses 10 and 11 with the polarity shown, and a series connection point between the commutation thyristors 161 and 162 and a series connection point between the main thyristors 121 and 122. It consists of a commutating capacitor 17 and a commutating reactor 18 connected in series between the two.

19 is a current detector that detects the current of the commutation circuit 15; 20
2 is a current detection device for detecting the load current, and 21 and 22 are rectifier circuits to which the outputs of the current detection devices 19 and 20 are applied, respectively.

23 is a control circuit that controls the inverter by giving a firing signal to the main thyristors 121, 122 and commutation thyristors 161, 162; The ignition pulse given to 162 is 1 each.
61P and 162P, this pulse signal is given at the timing shown in FIG.

As shown in FIG. 2, the pulse signals 121P and 122P do not occur simultaneously, but the pulse signals 161P and 16
2P also does not occur at the same time.

However, since a failure may occur simultaneously with the occurrence of a failure in the control circuit 23, these pulse signals 121P,
122P, 161P, and 162P are applied to the logic circuit 24, it is detected whether or not they occur simultaneously, and this detection signal is provided to the display device 25.

As will be described later, the determination device 26 to which the output of the rectifier circuit 21 is applied detects whether or not the current of the commutation circuit 15 is at a predetermined value, and generates an output signal when the current of the commutation circuit 15 does not reach a predetermined value, for example. Then, this signal is applied to the display device 25.

27 compares the outputs of the rectifier circuits 21 and 22 every sampling period using the sampling signal 28 applied from the control circuit 23, and
This is a sampling comparison circuit that compares the output of the inverter with a maximum output current reference signal 29, which is an electrical signal corresponding to the maximum output current that can be commutated by the commutation circuit 15 when the inverter is operating normally.

The operation of the present invention having the above configuration will be explained below.

Now, the main thyristor 12 is conducting and the load current I
Assuming that Q is flowing in the direction shown by the solid line, commutation of the main thyristor 121 is performed by firing the commutation thyristor 161 and discharging the commutating capacitor 17, which is charged with the polarity shown.

The relationship between the current Is flowing through the main thyristor 121 and the discharge current Ic of the commutating capacitor 17 at this time is as shown in FIG.

As shown in FIG. 3, the turn-off time T OF'F of the main thyristor 121 is a period that satisfies c≧IO.

On the other hand, if the capacitance of the commutation capacitor 17 is C [μF], the inductance of the commutation reactor 18 is L [μH], and the charging voltage of the commutation capacitor 17 is EC (V), and wiring intance is ignored, the discharge current Ic is The pulse width T is T=π√LC (μsec), and the peak value IP of the discharge current Ic is IP=EO√C/L(A), and T and IP are constant under normal conditions.

Therefore, if the device is normal, commutation can be achieved sufficiently even when the maximum output current is applied, but if an overload condition occurs and a current exceeding the maximum output current flows, the turn-off time T OFF becomes small and commutation fails.

Even if the current is less than the maximum output current, there is an abnormality on the commutation circuit side and the current IC of the commutation circuit 15 becomes less than a predetermined value, the turn-off time TOFF becomes small and commutation fails.

Also, a malfunction occurred on the control circuit 23 side, causing the main thyristor 121,
122 or commutation thyristors 161 and 162 are fired at the same time, a short circuit occurs as well as failure of commutation.

Furthermore, deterioration of the main thyristor itself can also cause commutation failure.

Therefore, the control circuit 23 generates a sampling signal 28 synchronized with the pulse signal 161P, for example, as shown in FIG.
is applied to the sampling comparison circuit 27, and during this sampling period Ts, the current IC of the commutation circuit 15 and the load current IO are compared, and the load current IO and the maximum output current reference signal 29 are further compared.

If the difference between the current IC and 10 during the sampling period is more than a predetermined value, commutation can be achieved sufficiently, but if the difference is less than the predetermined value, commutation will fail. generate.

Also, during this sampling period Ts, the load current IO is compared with the maximum output current reference signal 29, and if the load current IO becomes larger than the maximum output current reference signal 29, the signal F is
Generate 2.

In order to generate the signal F1, for example, the outputs of the rectifier circuits 21 and 22 are led to a subtraction circuit via a gate circuit opened by the sampling signal 28, and a comparison circuit checks whether the difference is less than a predetermined value. If the value is less than a predetermined value, a signal F1 is generated.

In addition, in order to generate the signal F2, a gate circuit is opened by the sampling signal 28 independently of the circuit that generates the signal F1, and the maximum output current reference signal 29 and the output signal of the rectifier circuit 22 are compared through this gate circuit. The maximum output current reference signal 29 is compared with the output signal of the rectifier circuit 22, and the signal F2 is generated under the condition that the maximum output current reference signal 29<the output signal of the rectifier circuit 22.

A technology that compares two signals within a predetermined time and determines whether the difference is less than a predetermined value, or a technology that compares two signals within a predetermined time and determines whether the difference is less than a predetermined value. Since the technique for generating the signal is a well-known technique, the detailed circuit of the sampling comparison circuit 27 will be omitted here.

Further, the output signal of the discriminating device 26 that is generated when the current IC of the commutation circuit 15 becomes less than a predetermined value is sent to F3, and further to the logic circuit 24.
If the output signal of is F4, each of these signals F1 to F4
When a commutation failure occurs, the cause can be determined.

That is, at the time of commutation failure failure, signals F1 and F2 are present, F3,
If there is no F4, commutation has failed due to overcurrent, and the signal F
If 1 to F4 are not present, the commutation has failed due to deterioration of the main thyristor itself. Furthermore, if F1 and F3 are present and F2 and F4 are not present, the commutation has failed due to an abnormality in the commutation circuit 15, and the signal F4 is present. In this case, it can be determined that the commutation has failed due to the main thyristors 121, 122 or the commutation thyristors 16, 162 firing at the same time.

Furthermore, since the load current IO that can be commutated is determined by the current IC of the commutation circuit 15, for example, the output signal of the rectifier circuit 21 is applied to the control circuit 23, and the current IC of the commutation circuit 15 is
For example, if the current reference value can be varied according to the current value, commutation failure can be prevented even if the current IC of the commutation circuit 15 decreases to some extent.

Further, such control can be carried out, for example, by applying currents IC and I to the discriminating device 26.
A signal may be generated according to the difference in O, and the current reference value may be controlled according to this difference.

Although the above explanation is an example applied to an inverter device, it can be similarly applied to a chopper device or a thyristor breaker equipped with a commutation circuit, and the commutation circuit is also limited to the configuration shown in FIG. Rather, it is possible to implement various design changes without changing the gist of the invention.

As explained above, the present invention monitors the commutation function from the current of the commutation circuit in a control device equipped with a commutation circuit provided to commutate the current of a thyristor that carries a load current, Furthermore, the operating status of the control circuit and the main circuit is monitored, and from these results, the cause of commutation failure can be determined.
In addition, since the output current of the control device can be controlled based on the current in the commutation circuit, it is possible to prevent commutation failures, so reliability is high, and failure recovery can be shortened in the event of a failure. It can be done in time.

Furthermore, by using a computer to maintain and monitor the status of the commutation function, main circuit, and control circuit, it is possible to save labor for maintenance personnel and reduce operating costs. This has excellent effects such as being able to operate the entire system efficiently by switching the load to another healthy device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a pulse signal applied to the main thyristor and commutation thyristor in FIG. 1, and FIG. 3 is a diagram for explaining the operation of the present invention. . 10. ...Positive power bus, 11. ...Negative power supply bus, 121
, 122...main thyristor, 13. ...Load terminal, 1
41,142...Flywheel diode, 15...
- Commutation circuit, 23... control circuit, 24. ...Logic circuit, 25. ...Display device, 26...Discrimination device, 27...
- Sampling comparison circuit.

Claims (1)

[Claims] 1. In a thyristor conversion device equipped with a commutation circuit consisting of a commutation thyristor, a commutation reactor, and a commutation capacitor, a first current detection device that detects the current of the commutation circuit, and a first current detection device that detects the current of the commutation circuit; a second current detection device for detecting, and the first and second current detection devices within a generation period of a sampling signal that has a constant pulse width and is generated in synchronization with the gate signal of the commutation thyristor with a certain time delay. means for comparing the output signals of and generating a first abnormal signal when the difference is less than a predetermined value; means for comparing the output signal of the second current detecting device with the output signal of the second current detecting device and generating a second abnormal signal when the output signal of the second current detecting device is large; means for generating a third abnormal signal when the gate signal of the thyristor conversion device is abnormal, means for generating a fourth abnormal signal when the gate signal of the thyristor conversion device is abnormal, and the abnormal signals of each of these means are applied, A commutation failure due to an abnormality in the commutation circuit is detected when the third abnormal signal is present and the second and fourth abnormal signals are not present, and a commutation failure due to an abnormality in the commutation circuit is detected when the third abnormal signal is present and the third and fourth abnormal signals are present. A failure detection device for a thyristor conversion device, which is equipped with means for determining commutation failure due to overcurrent in the absence of a signal.