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JPS5888934A - Communication equipment - Google Patents
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JPS5888934A - Communication equipment - Google Patents

Communication equipment

Info

Publication number
JPS5888934A
JPS5888934A JP56187599A JP18759981A JPS5888934A JP S5888934 A JPS5888934 A JP S5888934A JP 56187599 A JP56187599 A JP 56187599A JP 18759981 A JP18759981 A JP 18759981A JP S5888934 A JPS5888934 A JP S5888934A
Authority
JP
Japan
Prior art keywords
circuit
signal
digital
analog
receiving circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56187599A
Other languages
Japanese (ja)
Other versions
JPH0612881B2 (en
Inventor
Etsuo Yamane
山根 悦男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP56187599A priority Critical patent/JPH0612881B2/en
Publication of JPS5888934A publication Critical patent/JPS5888934A/en
Publication of JPH0612881B2 publication Critical patent/JPH0612881B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H60/00Arrangements for broadcast applications with a direct linking to broadcast information or broadcast space-time; Broadcast-related systems
    • H04H60/09Arrangements for device control with a direct linkage to broadcast information or to broadcast space-time; Arrangements for control of broadcast-related services
    • H04H60/11Arrangements for counter-measures when a portion of broadcast information is unavailable
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H60/00Arrangements for broadcast applications with a direct linking to broadcast information or broadcast space-time; Broadcast-related systems
    • H04H60/27Arrangements for recording or accumulating broadcast information or broadcast-related information

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Circuits Of Receivers In General (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明はラジオ受信機、テレビ受像機、その他の通信機
器に係り、簡単な構成で聞き取れなかった部分を再び繰
返して聞くことができる優れた通信機器を提供すること
を目的とするものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to radio receivers, television receivers, and other communication equipment, and an object of the present invention is to provide an excellent communication equipment that has a simple configuration and allows you to repeatedly listen to parts that you could not hear. This is the purpose.

一般にラジオ受信機、テレビジョン受像機等において、
天気予報、ニュース、投書やクイズ等の宛先などを聴取
している場合、その一部を聞き落して目的を達成できな
いことがよくある。
Generally, in radio receivers, television receivers, etc.
When listening to weather forecasts, news, mail addresses, quizzes, etc., it is often the case that a part of the information is missed and the objective cannot be achieved.

本発明はこのような問題に鑑みて成されたものであり、
聞き取れなかりた部分をすぐに繰返して聞くことができ
る優れた通信機器を提供するものである。
The present invention has been made in view of such problems,
To provide an excellent communication device that allows you to immediately repeat and listen to parts that you cannot hear.

以下、本発明の通信機器について一実施例の図面ととも
に説明する。図において、1はラジオ放送、テレビジョ
ン放送等を受信する放送受信回路、2は受信回路1によ
りて受信され検波された音声信号を増幅し図示し′Cい
ないスピーカ等を駆動する増幅回路、3は受信回路1に
よって受信され検波された音声信号をディジタル信号に
変換するアナログーディジタル変換回路(以下簡単にム
ーD変換回路という)、4ばA−D変換回路3によりて
変換されたディジタル信号を順次繰返し更新さレルアド
レスに記憶するランダム・アクセス・メモリー(以下面
?liにRAMという)、5はRAM4に記憶されたデ
ィジタル信号を順次読出し、アナログ@号に変換するデ
ィジタル−アナログ変換回路(以下簡単にD−直変換回
路という)、6はRAM4のアドレスを順次繰返し更新
するだめのアク七ヌデータを得るためのカウンタ、7は
ムーD変換回路3.RAM4.D−ム変換回路5.カウ
ンタ6をそれぞれ駆動するためのクロックパルス発生回
路、8はクロックパルス発生回路7によって得られるク
ロックパルスの周波数を制御するためのピッチコントロ
ール回路、Sl、S2はそれぞれ互に連動する切換スイ
ッチである。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A communication device according to the present invention will be described below with reference to drawings of an embodiment. In the figure, 1 is a broadcast receiving circuit that receives radio broadcasts, television broadcasts, etc.; 2 is an amplifier circuit that amplifies the audio signal received and detected by the receiving circuit 1 and drives a speaker, etc. (not shown); 3; 4 is an analog-to-digital conversion circuit (hereinafter simply referred to as a Mu-D conversion circuit) that converts the audio signal received and detected by the receiving circuit 1 into a digital signal, and 4 the digital signal converted by the A-D conversion circuit 3. 5 is a random access memory (hereinafter referred to as RAM) that stores the digital signals stored in the RAM 4 in sequentially and repeatedly updated real addresses; (simply referred to as a D-DC conversion circuit), 6 is a counter for obtaining data for sequentially and repeatedly updating the address of the RAM 4, and 7 is a MU-D conversion circuit 3. RAM4. D-me conversion circuit 5. Clock pulse generation circuits for driving the counters 6, 8 are pitch control circuits for controlling the frequency of clock pulses obtained by the clock pulse generation circuit 7, and S1 and S2 are mutually interlocking changeover switches.

上記実施例において切換スイッチs、 、 S2がそれ
ぞれ端子a側に投入されている場合には放送受信回路1
によりて受信され検波された音声信号がスイッチS1を
介して直接増幅回路2に印加されるため、通常のラジオ
受信機、テレビジョン受像機と同様にラジオ放送、テレ
ビジョン放送等を聞くことができる。そして、この場合
上記実施例によれば、クロックパルフ発生回路7により
て得られたクロックパルスがそれぞれム一り変換回路3
゜RAM4 、カウンタ6に印加されるため、これらの
回路3,4.6が動作し、放送受信回路1によって受信
され、検波された音声信号がム一り変換回路3によって
ディジタル信号に変換されこれがRA M ’4に順次
記憶される。RAM4は前述したようにカウンタ6の出
力によりてそのアドレスが順次繰返し更新されるように
構成されているため上記RAM4にはム一り変換回路3
によりて変換さ扛たディジタル信号が順次繰返し更新さ
れながら記憶されることになる。
In the above embodiment, when the changeover switches s, , and S2 are respectively connected to the terminal a side, the broadcast receiving circuit 1
Since the audio signal received and detected by is directly applied to the amplifier circuit 2 via the switch S1, it is possible to listen to radio broadcasts, television broadcasts, etc. in the same way as a normal radio receiver or television receiver. . In this case, according to the embodiment described above, the clock pulses obtained by the clock pulse generation circuit 7 are different from each other in the conversion circuit 3.
゜Since the voltage is applied to the RAM 4 and the counter 6, these circuits 3 and 4.6 operate, and the audio signal received and detected by the broadcast receiving circuit 1 is converted into a digital signal by the digital conversion circuit 3. The data is sequentially stored in RAM '4. As mentioned above, the RAM 4 is configured so that its address is sequentially and repeatedly updated by the output of the counter 6.
The converted digital signals are sequentially and repeatedly updated and stored.

スイッチS1y S2を端子す側に投入すると放送受信
回路1と増幅回路2とが切離され増幅回路20入力端は
スイッチS1を介してD−直変換回路6の出力端に接続
されることになる。そして、この★合にはスイッチS2
を介してD−直変換回路5にクロックパルス発生回路7
の出力が印加されるため、D−A変換回路6が動作状態
になり、RAM4に記憶された信号がI11@次読取ら
れこれがアナログ信号に変換されスイッチS1を介して
増幅回路26に印加される。したがって、通常の受信状
態において聞き取れなかりた部分はスイッチS1.S2
を端子す側に投入することにより再びこfを繰返し聴取
することができる。
When the switches S1y and S2 are turned to the terminal side, the broadcast receiving circuit 1 and the amplifier circuit 2 are disconnected, and the input terminal of the amplifier circuit 20 is connected to the output terminal of the D-DC converter circuit 6 via the switch S1. . In this case, switch S2
The clock pulse generation circuit 7 is connected to the D-DC conversion circuit 5 via
Since the output of is applied, the D-A conversion circuit 6 becomes operational, and the signal stored in the RAM 4 is read out by I11, which is converted into an analog signal and applied to the amplifier circuit 26 via the switch S1. . Therefore, parts that cannot be heard under normal reception conditions are recorded by the switch S1. S2
You can listen to the song repeatedly by inserting it into the terminal.

この場合、クロックパルス発生回路7にはピッチコント
ロール回路8が接続されているため、このピッチコント
ロール回路8によりてRAM4に記憶された@号の読取
り速度を任意に選ぶことができる。仮にピッチコントロ
ール回路8によりてRAM4に記憶された信号を読取る
速度をRAM4にディジタル信号を記憶する速度より遅
くしたとすると、通常の受信状態において聞き取れなか
った部分を通常の受信状態のときよりよりゆっくりと繰
返し聴取することができる0 以上、実施例より明らかなように本発明の通信機器によ
れば簡単な構成で聞き取nなかった部分、あるいは聞き
落した1%分を即座に繰返し聴取することができ、実用
上きわめ゛〔有利なものである。
In this case, since the pitch control circuit 8 is connected to the clock pulse generation circuit 7, the reading speed of the @ symbol stored in the RAM 4 can be arbitrarily selected by the pitch control circuit 8. If the speed at which the pitch control circuit 8 reads the signal stored in the RAM 4 is made slower than the speed at which the digital signal is stored in the RAM 4, then the part that cannot be heard in the normal reception condition will be read more slowly than in the normal reception condition. As is clear from the examples above, according to the communication device of the present invention, with a simple configuration, it is possible to immediately and repeatedly listen to the portion that was not heard or the 1% portion that was missed. This is extremely advantageous in practical terms.

特に、本発明によれば音声18号をディジタル信号に変
換しRAMを用いてここに記憶するように構成し°Cい
るため、全体を年債回路化し′C小型にまとめることが
でき、コスト的にもきわめて有利なものである。
In particular, according to the present invention, since the audio signal No. 18 is converted into a digital signal and stored therein using RAM, the entire circuit can be made into an annual bond circuit and can be made compact, reducing costs. It is also extremely advantageous.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明の通信機器における一実施例のブロックダイ
ヤグラムである。 1・・・・・・放送受信回路、2・・・・増幅回路、3
・・・・・・アナログ・ディジタル変換回路、4・・・
・・・ランダム・アクセス・メモリー、6・・・・・・
ディジタル・アナログ変換回路、6・・・・・・カウン
ター、7・・・・・・クロックパルス発生回路、8・・
・・・・ピッチコントロール回路。
The figure is a block diagram of an embodiment of a communication device according to the present invention. 1...Broadcast receiving circuit, 2...Amplification circuit, 3
...Analog-digital conversion circuit, 4...
...Random access memory, 6...
Digital/analog conversion circuit, 6... Counter, 7... Clock pulse generation circuit, 8...
...Pitch control circuit.

Claims (1)

【特許請求の範囲】[Claims] 受信回路の出力をディジタル信号に変換するアナログ・
ディジタル変換回路、アナログ・ディジタル変換回路に
よりて変換されたテ゛イジタル耐号を順次繰返し更新し
ながら記憶するランダム・アクセスeメモリー、ランダ
ムΦアクセヌ・メモリーに記憶された信号を読取り、ア
ナログ信号に変換するディジタル・アナログ変換回路を
iえ、受信回路によって受信された信号を聴取している
間中、上記受信回路の出力をアナログ・ディジタル変換
回路によってディジタル信号に変換し、ランダム・アク
セス・メモリーに順次繰返し更新しなから記憶するよう
に構成すると共に任意の時間に上記ランダム・アクセス
・メモリーに記憶された信号を読取り、ディジタル・ア
ナログ変換回路によってアナログ信号に変換し、これを
聴取できるように構成した通信機器。
An analog converter that converts the output of the receiving circuit into a digital signal.
A digital converter circuit, a random access e-memory that stores the digital code converted by an analog-to-digital converter circuit while repeatedly updating it, and a digital converter that reads the signal stored in the random Φ access memory and converts it into an analog signal.・While listening to the signal received by the receiving circuit, the output of the receiving circuit is converted into a digital signal by the analog-to-digital converting circuit, and the result is sequentially and repeatedly updated in the random access memory. A communication device configured to store the signal from above, read the signal stored in the random access memory at any time, convert it to an analog signal by a digital-to-analog conversion circuit, and listen to the signal. .
JP56187599A 1981-11-20 1981-11-20 Communication equipment Expired - Lifetime JPH0612881B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56187599A JPH0612881B2 (en) 1981-11-20 1981-11-20 Communication equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56187599A JPH0612881B2 (en) 1981-11-20 1981-11-20 Communication equipment

Publications (2)

Publication Number Publication Date
JPS5888934A true JPS5888934A (en) 1983-05-27
JPH0612881B2 JPH0612881B2 (en) 1994-02-16

Family

ID=16208924

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56187599A Expired - Lifetime JPH0612881B2 (en) 1981-11-20 1981-11-20 Communication equipment

Country Status (1)

Country Link
JP (1) JPH0612881B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5930691A (en) * 1995-11-28 1999-07-27 Nec Corporation Radio receiver capable of easily adjusting a reproduction speed of a speech signal
JP2000194399A (en) * 1998-07-06 2000-07-14 Omnivoice Corp Method and device for reproducing voice in paging system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5355906A (en) * 1976-10-29 1978-05-20 Itt Receiver

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5355906A (en) * 1976-10-29 1978-05-20 Itt Receiver

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5930691A (en) * 1995-11-28 1999-07-27 Nec Corporation Radio receiver capable of easily adjusting a reproduction speed of a speech signal
JP2000194399A (en) * 1998-07-06 2000-07-14 Omnivoice Corp Method and device for reproducing voice in paging system

Also Published As

Publication number Publication date
JPH0612881B2 (en) 1994-02-16

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