JPS5910593B2 - Method of manufacturing photovoltaic device - Google Patents

Description

[Detailed description of the invention] The present invention relates to a method for manufacturing a photovoltaic device.

Photovoltaic devices such as solar cells and photodetectors can directly convert sunlight into electrical energy, but the biggest problem with these devices is that they are expensive compared to other means of generating electrical energy. It is said to be extremely large. The main reasons for this are the low utilization efficiency of the semiconductor materials that constitute the main body of the device, and the large amount of energy required to manufacture such materials. However, recently, as a technique to partially solve these drawbacks, it has been proposed to use amorphous silicon as the semiconductor material.

That is, amorphous silicon can be formed inexpensively and in large quantities by glow discharge in an atmosphere of a silicon compound such as silane or fluorosilicon (that is, the atmosphere becomes a plasma state). In amorphous silicon (hereinafter abbreviated as GD-aSi), the average localized state density within the width of the forbidden 15 band is as small as 10""2-0 or less, and like crystalline silicon, P-type and N-type This makes it possible to control impurities. FIG. 1 shows a typical conventional solar cell using GD-aSi, in which 1 is a glass 20 substrate that transmits visible light, 2 is a transparent electrode formed on the substrate,
3, 4 and 5 are GDs formed sequentially on the transparent electrode 2, respectively.
-aSl()) P-type layer, GD-aSi non-doped (impurity-free) layer, and GD-aS1 N-type layer, and 6 is an electrode for ohmic contact provided on the N-type layer.

In the above solar cell, when light enters the P-type layer 3, non-doped layer 4 and N-type layer 5 made of GD-aSi through the glass substrate 1 and transparent electrode 2, free-state electrons and Or, 30 holes are generated, which are attracted and moved by the PIN junction electric field created by the above-mentioned layers, and are then collected at the transparent electrode 2 or the ohmic contact electrode 6, and a voltage is generated between the two electrodes.

By the way, since the photovoltaic voltage of such a solar cell is about 0.8 V, the solar cell cannot be used as it is as a power source for equipment that requires a larger power supply voltage.

Fig. 2 shows a photovoltaic device that has already been proposed in view of the above points, where 7 is a flat insulating substrate made of glass or the like that can transmit visible light, and 8, 9, and 10 are films on the insulating substrate. These are the first, second, and third power generation areas formed.

Each of the power generation areas is composed of a GD-ASl layer 11 and a first electrode 12 and a second electrode 13 facing each other with the layer interposed therebetween. Although not shown, the GD-ASl layer 11 consists of three layers, a P-type layer, a non-doped layer, and an N-type layer, deposited sequentially from the substrate 7 side, similar to the structure shown in FIG.
The layer 11 extends continuously into the first to third power generation areas.

In each of the above layers constituting the GD-ASl layer 11, the P-type layer has a thickness of 40 to 1000 mm and a doping amount of 0.01 to 1.7 mm.
01 non-doped layer has a thickness of 0.5 to 2 μM. The N-type layer has a thickness of 200 to 1000, and a doping amount of 0.1 to 370.
The formation temperature of each layer is 200 to 400°C. First electrode 1
2 has visible light transmittance, and contains tin oxide, indium oxide, indium tin oxide (In2O3+XsnO2, x≦0.
1), etc., but indium oxide, etc.
Tin is particularly preferred.

The second electrode 13 is made of aluminum, chromium, or the like. The first electrode 12 and the second electrode 13 of the first to third power generation areas 8 to 10 have extensions 14 and 15 extending outside the respective power generation areas on the substrate 7, and the extension 14 of the first electrode 12 of the second power generation zone 9 are also connected to the second electrode 1 of the second power generation zone 9.
The extension part 15 of No. 3 and the extension part 14 of the first electrode 12 of the third power generation area 10 overlap each other and are electrically connected.

Further, the extension part 14 of the first electrode 12 of the first power generation area 8 has a second
A connecting portion 16 made of the same material as the electrode 13 is attached in an overlapping manner. Briefly explaining the manufacturing method of the above device, in the first step each of the first electrodes 12 including the extension portions 14 is formed on the substrate 7 by selective etching or selective sputter deposition, and in the second step GD-AS consecutively in the 1st to 3rd power generation areas! Layer 11 is formed.

At this time, since this layer must not exist in the extension parts 14 and 15, the GD-A made of the three layers is completely covered on the substrate 7.
After forming the Si layer, the GD-ASi consisting of the three layers described above is formed only in the desired portions by removing unnecessary portions by selective etching or using a mask to cover the unnecessary portions. In the subsequent final step, the second electrode 13 including the extension portion 15 and the connection portion 16 are formed by selective vapor deposition or the like. In the above device, the substrate 7 and the first electrode 12
When light enters the GD-ASi layer 11 through the
In each of the power generation zones 8 to 10, an electromotive force is generated in the same way as in the case of FIG. are added in series, with the connection part 16 connected to the first power generation area 8 being the + pole, and the extension part 15 connected to the second electrode 13 of the third power generation area 10 being one pole, and added between the two poles as described above. A voltage is generated.

In the above device, it is difficult to connect an external lead wire to the extension part 14 connected to the first electrode 12 by ultrasonic buttoning etc. due to the properties of the electrode material.
The presence of 6 facilitates this.

According to the above-described device, a plurality of power generation areas are connected in series on the same substrate using amorphous silicon, and a device can be made compact and generate any desired electromotive voltage. The device was realized because it uses amorphous silicon, and its manufacturing process is almost the same as the conventional manufacturing process shown in Figure 1, with only a simple film formation process, making mass production possible. It is also extremely excellent.

By the way, in the above device, if the distance between adjacent power generation areas is small, a phenomenon in which current flows directly between the first electrodes 12 or between the second electrodes 13 in the adjacent areas, that is, leakage current occurs. The present invention provides a structure that can substantially suppress such leakage current. FIG. 3 shows an embodiment of the present invention, and its features are as follows:
At least a portion of the GDaSl layer 11 in an area adjacent to each power generation area is transformed into an insulating layer 20 after the second electrode 13 is formed.

The other configurations are the same as in FIG. 2. That is, according to this embodiment, due to the presence of the insulating layer 20, the GD-AS in the adjacent section
Since the substantial thickness of the L layer 11 is reduced, the resistance between the first electrodes 12 or the second electrodes 13 in adjacent areas increases, and leakage current between the electrodes is suppressed. A specific example of the method for forming the insulating layer 20 is to selectively implant oxygen or nitrogen into the region by ion implantation using the already formed second electrode 13 as a mask, and convert the GD-ASl in the region into an insulator. It is to become At this time, when the implanted atoms are oxygen, GD-ASi is transformed into SiOx, and when nitrogen is implanted, the GD-ASi is transformed into SiNx. This fluorine element can also be used as the implanted atom. Another method for forming the above insulating layer is
This means converting the region into an oxide by thermal oxidation in an atmosphere of oxygen gas, water vapor, etc., or converting the region into a nitride by heating in a nitrogen gas or ammonia gas atmosphere.

In these cases as well, the second electrode 13 can be used as a mask for region selection. Yet another method for forming the insulating layer is to expose the device to a plasma atmosphere containing oxygen gas or nitrogen gas.

Similarly in these cases, GD-ASl changes into oxides and nitrides. Similarly, the second electrode 13 serves as a mask for region selection. The depth of the insulating layer 20 is determined as necessary,
In some cases, the depth may reach the substrate 7.

However, since the impurity concentration of the N-type layer 5 of the GD-ASl layer 11 is high, a depth that cuts this layer is sufficiently effective. Below, N of the GD-ASi layer 11 with high impurity concentration as described above is shown.
An example of manufacturing conditions for transforming the mold layer 5 into the insulating layer 20 will be described.

The impurity concentration of the N-type layer 5 oxidized under the above conditions was PH3/SlH4-170, and the film thickness was 500.

Next, when the leakage current was measured when the N-type layer 5 was transformed into the SlOX insulating layer 20, the leakage current was reduced from 2.5 μA to 1 nA or less.

As is clear from the above description, according to the present invention, after forming the second electrode essential to the structure, at least a portion of the amorphous semiconductor layer located between adjacent second electrodes is transformed into an insulating layer. Therefore, such an insulating layer is reliably disposed in the adjacent spacing portions of the power generation area, and leakage current in the adjacent spacing portions can be effectively suppressed, thereby improving power generation efficiency.

[Brief explanation of the drawing]

Figure 1 is a side view showing a conventional device, Figure 2A is a plan view showing an already proposed device, and Figures 2B and C are respectively Figure 2A.
FIG. 3 is a cross-sectional view of essential parts showing an embodiment of the present invention. 7... Insulating substrate, 8, 9, 10... First, second, third power generation areas, 11... Amorphous silicon layer, 20... ...Insulating layer.

Claims (1)

[Claims] 1. It has a plurality of film-like power generation areas formed on an insulating substrate, and each of the areas is sandwiched between an amorphous semiconductor layer that generates electrons and/or holes that contribute to power generation when irradiated with light. A method for manufacturing a photovoltaic device including a first electrode on the substrate side and a second electrode on the front side facing each other, the method comprising forming an amorphous semiconductor layer continuously in each of the plurality of power generation areas, and . A method for manufacturing a photovoltaic device, characterized in that at least a portion of the semiconductor between the power generation areas is transformed into an insulating layer after forming the second electrode.