JPS5916315B2 - Optimal level selection device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION This invention optically scans a two-dimensional figure, such as a character written on a letter, and converts the scanning signal to obtain a multilevel digital signal. The present invention relates to a device for selecting the optimum level of a binarization standard in a graphic scanning device which obtains a binarized digital signal according to shading.

Printed characters, handwritten characters, and other figures written on the surface of blank paper can, in principle, be detected as two types of signals: "chichi" and "black." Due to various factors such as the uniqueness of the type (non-uniformity of the character shape), partial cuts, blurring, etc., the digital signals obtained by optically scanning and converting these are naturally multi-valued. For example, it is difficult to accurately reproduce and restore characters, etc., only by outputting them as simple average values.

Therefore, in such a case, in order to simplify the figure scanning information by comparing it with a certain reference value, for example, the multivalued value obtained from the figure by the threshold value given from the density level selection device is This method employs a method of binarizing the gray level digital information of 0. However, the quality of the information from the figures binarized in this way is extremely influenced by the selection of the threshold value. It is known to be a thing.

The present invention has been made in view of the above-mentioned conventional points, and by processing graphic scanning processing information5, it is possible to select the optimum binarization standard. The purpose is to provide a binarization mechanism that is optimal for the postal code OCR output system in a processing system, and more specifically, it divides multivalued grayscale digital information obtained by optically scanning a figure into grayscale levels. a plurality of adders that count the frequency of occurrence of each level, a selection circuit that sequentially reads out the added values of a pair of adjacent adders, and a comparator that compares and subtracts a pair of outputs from the same selection circuit. , a ternarization circuit that receives the output of the comparator, compares it with 25 different threshold values, and outputs three outputs depending on how the count value of the adder changes, and a ternarization circuit that receives the output of the ternarization circuit and converts it into two values. An optimal level selection device characterized by comprising a logic circuit that generates timing corresponding to a threshold value for determining the optimum level. ”
0 The present invention will be described in detail below with reference to an embodiment shown in the attached drawings. FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 shows a configuration of the logic circuit section in FIG. 1. The block diagram illustrating an example, Figures 3a and 3b, is a diagram showing the density distribution of each adder in Figure 1, where a indicates the case of good character quality and b indicates the case of poor character quality, and the vertical axis is the appearance frequency of each unit, and the horizontal axis shows the concentration level.

In these figures, a scanner 1 consisting of an optical scanning device such as a flying spot scanner scans characters written on materials 2 such as documents and mail that are transported in a fixed direction by a conveying means (not shown). The optical information obtained by scanning the document 2 is converted into an electrical signal by a photoelectric converter 3 such as a solar cell, and then sent via an A-D converter 4. The data is supplied to the storage device 5, and the storage device 5 stores the graphics written in the document 2 as multivalued digital information corresponding to the shading of the graphics. In addition, the above A-
A plurality of adders Al, A2, . corresponds to the maximum level of dark color (black), and divides it into levels at a certain interval between them, divides the multivalued digital information into a maximum of n pieces, and uses each adder for each division. The number of occurrences of the category (Leveno (c)) is added.

Furthermore, the control unit 6 connected to the scanner 1 via the control system F connects the plurality of adders A through the control input system A'.
l, A2...An-1, An, respectively, and are also connected to the selection circuit 7 and the counter 8 via the control path S, and adders Al, A2...An- 1.An
1 selection circuit 7 and counter 8 are operated at predetermined timing, and the adders Al, A2
・・・． An? 1 and An are each connected to a selection circuit 7, and a pair of adjacent adders, e.g., Al7A2)A2FA3)100A
n-1? An-]FA[1 addition contents can be sequentially read out and sent to the comparator 9, and the counter 8
is designed to count the number of times the control signal is generated and sent, and at the same time send this counted value D to the reproduction output register 12.

The comparator 9 compares and subtracts the contents 7A and 7B of adjacent adders sent from the selection circuit 7, and sends 7B-7A to the ternary circuit 10.

The ternary circuit 10 has two thresholds, and depending on when the input is smaller than the first threshold, between the first and second thresholds, and larger than the second threshold, Outputs 101, 102, and 103 are output. Here the first
The threshold value is set to a negative value with a certain size, and the second threshold value is set to a positive value with a certain size. Therefore, when 7B-7A becomes a large negative value, the output is 10
When 1 and 7B-7A become large positive values, output 103 is output, and during that time, output 102 is output. The output of the ternary circuit 10 is sent to the logic circuit 11.

The configuration of the logic circuit 11 is shown in FIG. As shown in FIG.
I am receiving 02. Now, the logic circuit will be explained by considering the change in the addition value with respect to the concentration level as shown in FIG. 3a. At point P1 in FIG. 3A, the value of 7B-7A becomes significantly negative, a large negative slope is detected, and output 101 is generated from the three-value circuit 10, and the flip-flop F
Set Fl. Thereafter, depending on the progression of the generation of the control signal from the counter 8 (FIG. 1), an output 102 is output from the three-value circuit 10 at point P2 in FIG. The set output from flip-flop FF1 and output 102 are multiplied by an AND gate to set flip-flop FF2. The output of the flip-flop FF2 is sent to the reproduction output register 12 as the output of the logic circuit 11. To explain the meaning of the timing at which the output is output from the logic circuit 11, in the case of FIG. The quality is relatively good. Therefore, it can be seen that in this case, if binarization is performed using the threshold value of the concentration level at the intermediate level, a good binary signal can be obtained.
The output timing of the logic circuit 11 represents this appropriate concentration level, and if the count value D of the counter 8 is set in the register 12 at this output, this value represents the threshold value for binarization. Next, a case where the quality of the scanning object is poor as shown in FIG. 3b will be explained.

In this case, the density of the characters is low, and many of them are close to the ground color level, so there is no maximum value corresponding to the character part, and it is difficult to distinguish it from the intermediate level. However, in this case as well, it can be expected that a relatively flat slope will appear in the character portion, and an appropriate threshold level can be found in the same manner as in FIG. 3a.
That is, the output 101 is output from the three-value circuit 10 at point P3, and P
4, the output 102 is output and the threshold value is determined. Therefore, the reproduction output register 12 sets the count value D of the counter 8 using the output pulse of the logic circuit 11, and calculates a predetermined threshold value. It is possible to binarize multi-value shading digital information based on the figures stored in 5. In this case, the threshold value is the multi-value shading digital information based on the figure obtained by scanning each individual figure. Since it is set based on digital information, it is possible to obtain the optimum level for each figure that can perform the optimal binarization recognition for the multivalued gray scale digital information, and is of high quality and high reliability. It is possible to obtain a binary signal of

For this reason, in the concentration distribution map shown in Figure 3, which shows the appearance frequency of each level on the vertical axis and the concentration level on the horizontal axis, in the case of good graphic quality (the same Diagram a)
In addition, even in the case of poor graphic quality where the density distribution is not clear (see figure b), it is possible to set a threshold that corresponds to the graphic quality, so it is possible to obtain a good binarized signal. becomes possible.

As detailed above, in the selection device of the present invention,
Since the information is binarized using a threshold value selected and set based on the multivalued grayscale digital information obtained by optically scanning the figure, even if the figure has a force deviation or partial cut, Regardless of the shape, the optimal threshold for the shape is set each time, and high-quality and highly reliable binarized information can be obtained for any shape, especially if the shape quality is poor. It is effective as an optimal level selection device in a graphic scanning device that targets uniform materials.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing one embodiment of the present invention, Fig. 2 is a partial block diagram thereof, and Fig. 3 is a distribution diagram of multivalued grayscale digital information obtained by scanning, and the vertical axis is the density. The frequency of appearance for each level is shown, and the horizontal axis shows the concentration level. 1...Scanner, 2...Document, 3...
...Photoelectric converter, 4...A-D converter, 5.
...Storage device, 6...Control unit, 7...
...Selection circuit, 8...Counter, 9...
・Comparator, 10...Thinarization circuit, 11...
...Logic circuit, 12...Reproduction output register, A
l, A2, . . . An-1, An . . . Adder.

Claims (1)

[Claims] 1. A selection of a plurality of adders that add the number of occurrences of multivalued grayscale digital information obtained by optically scanning a figure for each grayscale level division, and a selection of sequentially reading out the added values in a pair of adjacent adders. a comparator that subtracts a pair of outputs from the selection circuit; a logic circuit that receives the output of the comparator and outputs an output when the subtraction result becomes a predetermined value; An optimal level selection device comprising: means for determining a threshold value based on timing.