JPS5917845B2 - Manufacturing method of semiconductor device - Google Patents
Manufacturing method of semiconductor deviceInfo
- Publication number
- JPS5917845B2 JPS5917845B2 JP52005332A JP533277A JPS5917845B2 JP S5917845 B2 JPS5917845 B2 JP S5917845B2 JP 52005332 A JP52005332 A JP 52005332A JP 533277 A JP533277 A JP 533277A JP S5917845 B2 JPS5917845 B2 JP S5917845B2
- Authority
- JP
- Japan
- Prior art keywords
- diffusion
- oxide film
- zinc
- silicon oxide
- diffusion layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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Description
【発明の詳細な説明】
本発明は高濃度でかつ浅い不純物拡散層を得る半導体装
置の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device that obtains a highly concentrated and shallow impurity diffusion layer.
従来、□−V族化合物半導体に、亜鉛Zn拡散する際に
は、例えば発光ダイオードの製造の場合、発光効率をあ
げるため、次のことが行なわれてい 一る。Conventionally, when zinc is diffused into a □-V group compound semiconductor, for example in the manufacture of light emitting diodes, the following steps have been taken to increase luminous efficiency.
まず、シリコン酸化膜を通しての不純物拡散により、低
濃度で、かっ深い拡散層をつくる。つぎに電極金属との
接触抵抗、および拡散層のシート抵抗を減するために、
シリコン酸化膜を除去して直接不純物拡散を行なつて、
表面に浅く高濃度の追加拡散層を形成する。しかしなが
ら、こ5 の方法には、以下にあげる欠点がある。第1
に、追加拡散層を浅くするためには、シリコン酸化膜を
介さない拡散は、拡散速度が大きく拡散時間を非常に短
くしなければならず、制御が困難である。第2に、裸の
ままでの直接高濃度拡散であるので、10表面が損傷を
受ける。追加拡散層には、浅くするため、また表面の損
傷を除くために化学エッチングを抱さねぱならないので
あるが、化学エッチングによる追加拡散層の厚さ決定に
は、大きなバラツキが生ずる。15本発明は、上述の問
題を解決する方策を与えるものである。First, a deep, low-concentration diffusion layer is created by diffusing impurities through a silicon oxide film. Next, in order to reduce the contact resistance with the electrode metal and the sheet resistance of the diffusion layer,
By removing the silicon oxide film and directly diffusing impurities,
Forms a shallow, highly concentrated additional diffusion layer on the surface. However, this method has the following drawbacks. 1st
Second, in order to make the additional diffusion layer shallow, diffusion that does not involve the silicon oxide film has a high diffusion rate and requires a very short diffusion time, which is difficult to control. Second, the 10 surface is damaged due to direct high concentration diffusion in the bare area. The additional diffusion layer must be subjected to chemical etching in order to make it shallow and to remove damage to the surface, but the determination of the thickness of the additional diffusion layer by chemical etching causes large variations. 15 The present invention provides a solution to the above-mentioned problems.
以下図面とともに本発明を説明する。半導体基板1の表
面に酸化膜2を形成し(第1図)、これを水素を含む気
圏中で熱処理した後(第2図)、該酸化膜2を通して不
純物を拡散する。3は拡散・o 層である(第3図)。The present invention will be explained below with reference to the drawings. An oxide film 2 is formed on the surface of a semiconductor substrate 1 (FIG. 1), and after this is heat-treated in an atmosphere containing hydrogen (FIG. 2), impurities are diffused through the oxide film 2. 3 is the diffusion/o layer (Figure 3).
あるいは、あらかじめ低濃度に不純物拡散した層に、こ
の方法でさらに不純物拡散する。本発明によれば水素気
流中での熱処理により、酸化膜中の不純物拡散速度が大
きくなる結果、酸化膜を通した拡散法でも、十分高い表
・5 面濃度を得ることができる。この場合には、酸化
膜を被せているため、表面損傷が少ない。また2〜40
時間の長時間拡散となるため、浅い拡散層の厚さ制御は
容易である。さらにこのことにより、表面拡散層の化学
エッチングは、必要がなくなる。0 なお、熱処理温度
は、あまり低くすると酸化膜中での不純物の拡散が行な
われなく、また高すぎると酸化膜との界面が破壊し、不
純物拡散速度の制御が困難となる。Alternatively, this method is used to further diffuse impurities into a layer in which impurities have been previously diffused to a low concentration. According to the present invention, the impurity diffusion rate in the oxide film is increased by heat treatment in a hydrogen stream, so that a sufficiently high surface concentration can be obtained even by the diffusion method through the oxide film. In this case, since it is covered with an oxide film, there is little surface damage. 2 to 40 again
Since the diffusion takes a long time, it is easy to control the thickness of the shallow diffusion layer. Furthermore, this eliminates the need for chemical etching of the surface diffusion layer. Note that if the heat treatment temperature is too low, the impurity will not diffuse into the oxide film, and if it is too high, the interface with the oxide film will be destroyed, making it difficult to control the impurity diffusion rate.
従つて、その温度範囲は600℃〜1000℃が最適で
ある。■5 以下に本発明の実施例を述べる。Therefore, the optimum temperature range is 600°C to 1000°C. (5) Examples of the present invention will be described below.
実施例 l
硅素ドープのn形GaAs(不純物濃度6×1017個
/Cd)基板の表面に酸化硅素膜を1000人の厚さに
形成し、これを800℃で水素気流中51/Mm、1時
間処理を施した後、石英アンプル中に砒化亜鉛ZnAs
2の拡散源と共に真空封じする。Example l A silicon oxide film was formed on the surface of a silicon-doped n-type GaAs (impurity concentration 6 x 1017/Cd) substrate to a thickness of 1,000 mm, and was heated at 800°C in a hydrogen stream at 51/Mm for 1 hour. After the treatment, zinc arsenide ZnAs is placed in a quartz ampoule.
Vacuum-seal the container together with the second diffusion source.
850℃、4時間の拡散により、半導体中に2μのp形
領域が得られた。Diffusion at 850° C. for 4 hours resulted in a 2 μm p-type region in the semiconductor.
酸化硅素膜を除去した後、p形領域の表面に、直径10
0μの金電極を中央につけ、0.5m1L×0.5mm
の大きさのメサ形赤外発光ダイオードを作製した。ビジ
コンで調べた発光の模様は、入力電流20mAから80
mAまで、ほぼ全面均一に発光していた。このことから
、この拡散によるp形層のシート抵抗は十分小さく、注
入電流は、ダイオード全面に均一に分布していることが
わかる。従来、Zn/Ga(亜鉛とガリウムの合金)を
拡散源として、酸化硅素膜を通しての亜鉛拡散を行なつ
てきたが、この拡散層では、電極からの注入電流が、ダ
イオード全面に分布せず、電極付近に集中する。After removing the silicon oxide film, a diameter of 10 mm is placed on the surface of the p-type region.
Attach a 0μ gold electrode to the center, 0.5m1L x 0.5mm
We fabricated a mesa-shaped infrared light emitting diode with a size of . The pattern of light emission examined with the vidicon is 80 mA from an input current of 20 mA.
Up to mA, light was emitted almost uniformly over the entire surface. From this, it can be seen that the sheet resistance of the p-type layer due to this diffusion is sufficiently small, and the injected current is uniformly distributed over the entire surface of the diode. Conventionally, zinc has been diffused through a silicon oxide film using Zn/Ga (an alloy of zinc and gallium) as a diffusion source, but in this diffusion layer, the current injected from the electrode is not distributed over the entire surface of the diode. Concentrates near the electrode.
それに対し、この方法により形成された亜鉛拡散層は、
シート抵抗を小さくするための十分高濃度な層となつて
いることがわかる。実施例 2硅素ドープn形GaAs
(不純物濃度6×1017個/Cril)基板表面に、
酸化硅素膜を形成し、Znん,(亜鉛とガリウムの合金
)と共に石英アンプル中に真空封じする。On the other hand, the zinc diffusion layer formed by this method is
It can be seen that the layer has a sufficiently high concentration to reduce the sheet resistance. Example 2 Silicon-doped n-type GaAs
(Impurity concentration 6×1017/Cril) On the substrate surface,
A silicon oxide film is formed and vacuum sealed together with Zn (an alloy of zinc and gallium) in a quartz ampoule.
850℃、16時間拡散を行なつた後、酸化硅素膜をつ
け直して、実施例1と同様に、水素処理を悔した酸化硅
素膜を通しての亜鉛拡散を行ない、メサ形赤外発光ダイ
オードを得た。After performing the diffusion at 850°C for 16 hours, the silicon oxide film was reattached, and in the same manner as in Example 1, zinc was diffused through the silicon oxide film that had undergone hydrogen treatment to obtain a mesa-shaped infrared light emitting diode. Ta.
ダイオードの特性は、実施例1の結果と同様に、全面均
一発光であつた。従来では、Zn/Ga(亜鉛とガリウ
ムの合金)を拡散源としての亜鉛拡散を行なつた後、酸
化硅素膜を除去し、基板裸のまま、砒化亜鉛を拡散源と
して亜鉛拡散を行ない、高濃度拡散層を形成し、ダイオ
ードを得ていたが、この場合には、高濃度拡散の時間が
短いため、拡散層の厚さ制御が困難であつた。The characteristics of the diode were similar to the results of Example 1, with uniform light emission over the entire surface. Conventionally, after zinc diffusion is performed using Zn/Ga (alloy of zinc and gallium) as a diffusion source, the silicon oxide film is removed, and zinc diffusion is performed using zinc arsenide as a diffusion source while the substrate is bare. A diode was obtained by forming a concentration diffusion layer, but in this case, it was difficult to control the thickness of the diffusion layer because the time for high concentration diffusion was short.
そこで所望の厚さを得るために、化学エツチングを用い
ていたが、これにはバラツキが生じ、エツチングをしす
ぎると電極付近の極部発光、エツチングが不足すると高
濃度拡散層での光の吸収といつた問題が発生した。実施
例 3
実施例2と同様に、硅素ドープのn形GaAs(不純物
濃度6×1017個/Cd)に、まず窒化膜と酸化硅素
膜を拡散マスクとして選択的にZn/Ga(亜鉛とガリ
ウムの合金)で亜鉛拡散を行なつた後、酸化硅素膜をつ
け直して、水素処理を施し、砒化亜鉛を拡散源としてさ
らに亜鉛拡散を行ない、プラナ一形赤外発光ダイオード
を得た。In order to obtain the desired thickness, chemical etching was used, but this resulted in variations; too much etching led to light emission in the local area near the electrode, while insufficient etching led to light absorption in the highly concentrated diffusion layer. A problem occurred. Example 3 As in Example 2, Zn/Ga (zinc and gallium) was first selectively deposited on silicon-doped n-type GaAs (impurity concentration: 6 x 1017 impurities/Cd) using a nitride film and a silicon oxide film as diffusion masks. After performing zinc diffusion using a silicon oxide film (alloy), a silicon oxide film was reapplied, hydrogen treatment was performed, and zinc arsenide was used as a diffusion source to further perform zinc diffusion to obtain a planar type infrared light emitting diode.
ダイオードは、入力電流20mA〜80mAまで、ほぼ
全面均一発光であつた。は上説明したように本発明によ
れば、水素気流中での熱処理により、酸化膜中の不純物
拡散速度が大きくなる結果、酸化膜を通した拡散法でも
、十分高い表面濃度を得ることができる。The diode emitted light almost uniformly over the entire surface up to an input current of 20 mA to 80 mA. As explained above, according to the present invention, the impurity diffusion rate in the oxide film is increased by heat treatment in a hydrogen stream, so that a sufficiently high surface concentration can be obtained even by the diffusion method through the oxide film. .
さらに、酸化膜を被せているため、表面損傷が少なく、
また2〜40時間の長時間拡散となるため、浅い拡散層
の厚さ制御は容易である。従つて、このことにより、表
面拡散層の化学エツチングは、必要がなくなる。Furthermore, since it is covered with an oxide film, there is less surface damage.
Furthermore, since the diffusion is for a long time of 2 to 40 hours, it is easy to control the thickness of the shallow diffusion layer. This therefore eliminates the need for chemical etching of the surface diffusion layer.
第1図〜第3図は本発明の一実施例を示す工程断面図で
ある。
1・・−・・・n形GaAs基板、2・・・・・・酸化
硅素膜、3・・・・・・p+形拡散領域。1 to 3 are process sectional views showing one embodiment of the present invention. 1...N-type GaAs substrate, 2...Silicon oxide film, 3...P+ type diffusion region.
Claims (1)
気圏中で熱処理した後、前記酸化膜を通して気相から不
純物を拡散することを特徴とする半導体装置の製造方法
。1. A method for manufacturing a semiconductor device, which comprises heat-treating a semiconductor substrate having an oxide film formed on its surface in an atmosphere containing hydrogen, and then diffusing impurities from a gas phase through the oxide film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52005332A JPS5917845B2 (en) | 1977-01-19 | 1977-01-19 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52005332A JPS5917845B2 (en) | 1977-01-19 | 1977-01-19 | Manufacturing method of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5390784A JPS5390784A (en) | 1978-08-09 |
| JPS5917845B2 true JPS5917845B2 (en) | 1984-04-24 |
Family
ID=11608275
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP52005332A Expired JPS5917845B2 (en) | 1977-01-19 | 1977-01-19 | Manufacturing method of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5917845B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100870837B1 (en) | 2008-03-04 | 2008-11-28 | 한국철강 주식회사 | Water removal method of zinc oxide thin film |
-
1977
- 1977-01-19 JP JP52005332A patent/JPS5917845B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5390784A (en) | 1978-08-09 |
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