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JPS5917894B2 - pulse width signal converter - Google Patents
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JPS5917894B2 - pulse width signal converter - Google Patents

pulse width signal converter

Info

Publication number
JPS5917894B2
JPS5917894B2 JP52143652A JP14365277A JPS5917894B2 JP S5917894 B2 JPS5917894 B2 JP S5917894B2 JP 52143652 A JP52143652 A JP 52143652A JP 14365277 A JP14365277 A JP 14365277A JP S5917894 B2 JPS5917894 B2 JP S5917894B2
Authority
JP
Japan
Prior art keywords
circuit
pulse width
transformer
width signal
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52143652A
Other languages
Japanese (ja)
Other versions
JPS5476055A (en
Inventor
珪紀 山口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Hokushin Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Hokushin Electric Corp filed Critical Yokogawa Hokushin Electric Corp
Priority to JP52143652A priority Critical patent/JPS5917894B2/en
Publication of JPS5476055A publication Critical patent/JPS5476055A/en
Publication of JPS5917894B2 publication Critical patent/JPS5917894B2/en
Expired legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)
  • Manipulation Of Pulses (AREA)

Description

【発明の詳細な説明】 本発明は、微少な入力直流信号を電気的に絶縁するとと
もに、この入力直流信号に対応するパルス幅信号を得る
パルス幅信号変換器に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse width signal converter that electrically isolates a minute input DC signal and obtains a pulse width signal corresponding to the input DC signal.

本発明の目的は、簡単な構成で微小な直流信号を電気的
に絶縁し、微小信号の大きさに関連した2種のパルス幅
信号を得ることのできる装置を実現しようとすることに
ある。
SUMMARY OF THE INVENTION An object of the present invention is to realize a device that can electrically insulate minute DC signals with a simple configuration and obtain two types of pulse width signals related to the magnitude of the minute signal.

第1図は本発明の一実施例を示す接続図である。FIG. 1 is a connection diagram showing one embodiment of the present invention.

図において、lL12は入力直流信号Eiが印加される
入力端子、Cは入力端子11,12間に接続したコンデ
ンサ、Dl、D2は互に逆極性に並列接続したダイオー
ドで、これらは並列ダイオード回路りを構成している。
In the figure, lL12 is an input terminal to which input DC signal Ei is applied, C is a capacitor connected between input terminals 11 and 12, Dl and D2 are diodes connected in parallel with opposite polarities, and these are like a parallel diode circuit. It consists of

TRは一次巻線n1゜二次巻線n2および三次巻線n3
を有するトランス、21.22は二次巻線n2の両端
に接続された出力端子、O8は三次巻線n3に接続され
たパルス発生器である。
TR is primary winding n1, secondary winding n2 and tertiary winding n3
21 and 22 are output terminals connected to both ends of the secondary winding n2, and O8 is a pulse generator connected to the tertiary winding n3.

トランスTRの一次巻線n1 は、並列ダイオード回路
りを介して入力端子11,12に接続され、これらは入
力回路を構成し、また二次巻線n2は出力回路を構成し
ている。
The primary winding n1 of the transformer TR is connected to input terminals 11 and 12 via a parallel diode circuit, and these constitute an input circuit, and the secondary winding n2 constitutes an output circuit.

第2図は並列ダイオード回路りの特性線図で、加わる電
圧e1 と流れる電流11 とは図示するように非
線形の関係をもっている。
FIG. 2 is a characteristic diagram of a parallel diode circuit, and as shown, the applied voltage e1 and the flowing current 11 have a nonlinear relationship.

このように構成した装置において、トランスTRの一次
巻線n1 と二次巻線n2 との巻数比を1=1とし
、三次巻線n3に正負対称のパルス信号i。
In the device configured in this manner, the turns ratio between the primary winding n1 and the secondary winding n2 of the transformer TR is set to 1=1, and a pulse signal i having positive and negative symmetry is applied to the tertiary winding n3.

を与えるものとすればその等価回路は第3図に示す通り
となる。
, the equivalent circuit is as shown in FIG.

第3図の等価回路において、スイッチSはダイオードD
1.D2のスイッチング動作を表示したものであって、
パルス発生器O8から正極性のパルスが印加されると、
スイッチSが接点a側に接続され(ダイオードD1が導
通)、負極性のパルスが印加されるとスイッチSが接点
す側に接続される(ダイオードD2が導通)。
In the equivalent circuit of Figure 3, the switch S is a diode D
1. This shows the switching operation of D2,
When a positive pulse is applied from the pulse generator O8,
The switch S is connected to the contact a side (diode D1 is conductive), and when a negative pulse is applied, the switch S is connected to the contact side (diode D2 is conductive).

ダイオードD1゜D2は、いずれも順方向電圧Δで表わ
される。
The diodes D1 and D2 are both expressed by a forward voltage Δ.

いま、パルス発生器O8から正極性のパルス+Io、が
印加されている状態では、スイッチSは接点aに接続さ
れたのと等価(ダイオードD1が導通)となり、トラン
スTRを代表するコイルのインダクタンスをLlそこを
流れる電流をiLとするとパルスの立上り時には(1)
式が成立する。
Now, when the positive pulse +Io is being applied from the pulse generator O8, the switch S is equivalent to being connected to the contact a (diode D1 is conducting), and the inductance of the coil representing the transformer TR is LlIf the current flowing there is iL, then at the rise of the pulse (1)
The formula holds true.

同様に、パルス発生器O8から負極性のパルス−Ioが
印加されている状態では、スイッチSは接点すに接続さ
れたのと等価(ダイオードD2が導通)となり、パルス
の立下り時には(2)式が成立する。
Similarly, when a negative pulse -Io is applied from the pulse generator O8, the switch S is equivalent to being connected to the contact point (diode D2 is conductive), and at the falling edge of the pulse (2) The formula holds true.

(1)式において、iLが一■oから■。In formula (1), iL is from 1■o to ■.

に達するまでの時間t1 を求めると(3)式で表わす
ことができる。
The time t1 required to reach this point can be expressed by equation (3).

また、(2)式において、iLか■。Also, in equation (2), iL or ■.

から−Ioに達するまでの時間t2を求めると(4)式
で表わすことができる。
The time t2 from t2 to -Io can be expressed by equation (4).

したがって、二次巻線n2(出力回路)の出力端子21
,22間には、コイルを流れる電流(it、)が変化し
ている時間だけ電圧信号が生ずることとなり、この電圧
信号eは、(3)式、(4)式に示すような入力直流信
号Eiに関連したパルス幅(時間幅)tl、t2を有す
る2種のパルス幅信号となる。
Therefore, the output terminal 21 of the secondary winding n2 (output circuit)
, 22, a voltage signal is generated only during the time when the current (it, ) flowing through the coil is changing, and this voltage signal e is an input DC signal as shown in equations (3) and (4). There are two types of pulse width signals having pulse widths (time widths) tl and t2 related to Ei.

第4図は、第3図回路の動作波形図である。FIG. 4 is an operational waveform diagram of the circuit of FIG. 3.

パルス発生器O8から、第4図イに示すようなIo、−
I。
From the pulse generator O8, Io, - as shown in FIG.
I.

に変化するパルス信号を与えるものとすると、ダイオー
ド回路りと入力端子11゜12側の入力回路には、第4
図口に示すような電a11 .12がパルスの立上り時
、パルスの立下り時に流れ、また、インダクタンスLに
は第4図ハに示すような電流ILが流れる。
Assuming that a pulse signal that changes as shown in FIG.
Electron a11 as shown in the figure opening. 12 flows at the rising edge of the pulse and at the falling edge of the pulse, and a current IL as shown in FIG. 4C flows through the inductance L.

ここで、11゜12が零になるまでの時間t1.t2は
、(3)式および(4)式で表わされる。
Here, the time t1. until 11°12 becomes zero is t1. t2 is expressed by equations (3) and (4).

インダクタンスLに、第4図ハに示すような直線的に上
昇又は下降する電流iLが流れると、出力端子21,2
2間には、第4図二に示すようなパルス幅t1.t2の
信号eを得ることができる。
When a linearly rising or falling current iL as shown in FIG. 4C flows through the inductance L, the output terminals 21 and 2
2 has a pulse width t1.2 as shown in FIG. A signal e at t2 can be obtained.

第5図および第6図は本発明の他の実施例を示す接続図
である。
FIGS. 5 and 6 are connection diagrams showing other embodiments of the present invention.

第5図の実施例は、複数個(ここでは2つの入力につい
てのみ示す)の入力直流信号Ei2. Ei2を並列的
にパルス幅信号に変換できるようにしたものであって、
各トランスTRの三次巻線n3を互に直列に接続し1.
これにパルス発生器O8から駆動用のパルス信号i。
The embodiment of FIG. 5 has a plurality of (here, only two inputs are shown) input DC signals Ei2. Ei2 can be converted into a pulse width signal in parallel,
The tertiary windings n3 of each transformer TR are connected in series.1.
In addition, a driving pulse signal i is supplied from a pulse generator O8.

を与えるようにしたものである。It was designed to give

ここで、パルス発生器O8は、矩形波発振器OSC,こ
の発振器からの出力信号を入力するダイオードブリッジ
回路、FETの定電流性を利用した定電流素子Qとを含
む正負極性定電流源C8で構成したものである。
Here, the pulse generator O8 is composed of a positive and negative polarity constant current source C8 including a square wave oscillator OSC, a diode bridge circuit that inputs the output signal from this oscillator, and a constant current element Q that utilizes the constant current property of the FET. This is what I did.

第6図の実施例は、一次巻線n1.二次巻線n2を有す
るトランスTRを用い、パルス発生器O8を二次巻線n
2の両端に接続したものである。
In the embodiment of FIG. 6, the primary winding n1. A transformer TR having a secondary winding n2 is used, and the pulse generator O8 is connected to the secondary winding n2.
It is connected to both ends of 2.

この場合も動作は第1図回路と全く同様である。In this case as well, the operation is exactly the same as that of the circuit shown in FIG.

なお、パルス発生器O8は一次巻線n1の両端A。Note that the pulse generator O8 is connected to both ends A of the primary winding n1.

B間に接続するようにしてもよい。It is also possible to connect between B and B.

第7図〜第9図は並列ダイオード回路りの他の例を示す
接続図である。
7 to 9 are connection diagrams showing other examples of parallel diode circuits.

第7図は複数個のダイオードを直列に接続したものを並
列接続して構成したものである。
FIG. 7 shows a structure in which a plurality of diodes connected in series are connected in parallel.

直列に接続されるダイオードの数を変えることによって
順方向電圧Δを調整できる。
The forward voltage Δ can be adjusted by changing the number of diodes connected in series.

第8図はトランジスタをダイオード接続し、これを逆極
性に互に並列接続して構成したものである。
FIG. 8 shows a structure in which transistors are diode-connected and connected in parallel with each other with opposite polarities.

第9図はツェナーダイオードを並列接続して構成したも
のである。
FIG. 9 shows a configuration in which Zener diodes are connected in parallel.

なお、上記の実施例において、トランスTRの一次巻線
n1 と二次巻線n2 との比は1:1でなくともよい
In addition, in the above embodiment, the ratio between the primary winding n1 and the secondary winding n2 of the transformer TR does not have to be 1:1.

また、入力端子11,12間に接続したコンデンサCは
なくともよい。
Further, the capacitor C connected between the input terminals 11 and 12 may be omitted.

以上に説明したように、本発明によれば、次に列挙する
ような種々の特長をもった微小信号を絶縁し、かつパル
ス幅信号に変換する機能をもったパルス幅信号変換器が
実現できる。
As explained above, according to the present invention, it is possible to realize a pulse width signal converter having the function of insulating a minute signal and converting it into a pulse width signal and having various features as listed below. .

(1)全体をトランス、ダイオード回路で実現できるの
で構成が簡単でかつ小形にできる。
(1) Since the entire structure can be realized using a transformer and diode circuit, the structure can be simple and compact.

(11)機械的接点をもたないので長寿命、高信頼性が
期待できる。
(11) Since there are no mechanical contacts, long life and high reliability can be expected.

(曲トランスの三次巻線あるいは二次巻線側にパルス発
生器を接続すれば、一次巻線側に電源や制御信号等を必
要とせず、本質安全性が高い。
(If a pulse generator is connected to the tertiary or secondary winding of the curved transformer, there is no need for a power supply or control signal on the primary winding, resulting in high intrinsic safety.

【図面の簡単な説明】 第1図は、本発明の一実施例を示す接続図、第2図は本
発明に用いられる並列ダイオード回路の特性線図、第3
図は第1図回路の等両回路、第4図はその動作波形図、
第5図および第6図は本発明の他の実施例を示す接続図
、第7図〜第9図は並列ダイオード回路の他の例を示す
接続図である。 11.12・・・入力端子、2L22・・・出力端子、
D・・・並列ダイオード回路、TR・・・トランス、n
l・・・一次巻線、n2・・・二次巻線、n3・・・三
次巻線、O8・・・パルス発生器、C・・・コンデンサ
[Brief Description of the Drawings] Fig. 1 is a connection diagram showing one embodiment of the present invention, Fig. 2 is a characteristic diagram of a parallel diode circuit used in the present invention, and Fig. 3 is a characteristic diagram of a parallel diode circuit used in the present invention.
The diagram shows both circuits of the circuit in Figure 1, and Figure 4 shows its operating waveform diagram.
5 and 6 are connection diagrams showing other embodiments of the present invention, and FIGS. 7 to 9 are connection diagrams showing other examples of parallel diode circuits. 11.12...Input terminal, 2L22...Output terminal,
D...Parallel diode circuit, TR...Transformer, n
l...Primary winding, n2...Secondary winding, n3...Tertiary winding, O8...Pulse generator, C...Capacitor.

Claims (1)

【特許請求の範囲】 1 一次巻線、二次巻線を有するトランス、印加電圧が
所定値以上になると電流か流れ出すような非線形の電圧
対電流特性をもった非線形回路、入力直流信号を前記非
線形回路を介してトランスの一次巻線に与える回路手段
、トランスの一次巻線。 二次巻線、該トランスに設けた三次巻線のいずれかに矩
形波状のパルス信号を与える手段を具備し、前記トラン
スの二次巻線から前記入力直流信号に対応したパルス幅
信号を得るようにしたパルス幅信号変換器。 2 非線形回路としてダイオードを互に逆極性に並列接
続した回路を用いた特許請求の範囲第1項記載のパルス
幅信号変換器。 3 非線形回路としてトランジスタをダイオード接続し
たものを互に逆極性に並列接続した回路を用いた特許請
求の範囲第1項記載のパルス幅信号変換器。 4 非線形回路としてツェナーダイオードを互に逆極性
に並列接続した回路を用いた特許請求の範囲第1項記載
のパルス幅信号変換器。 5 矩形波状のパルス信号を与える手段を、矩形波発振
器と、この矩形波発振器からの出力信号を入力とするダ
イオードブリッジ回路と定電流素子とを含む正負極性定
電流源とで構成した特許請求の範囲第1項記載のパルス
幅信号変換器。
[Claims] 1. A transformer having a primary winding and a secondary winding, a nonlinear circuit having a nonlinear voltage-to-current characteristic such that current flows when the applied voltage exceeds a predetermined value, and an input DC signal that is Circuit means that feed the primary winding of the transformer through the circuit, the primary winding of the transformer. A means for applying a rectangular wave pulse signal to either a secondary winding or a tertiary winding provided in the transformer is provided, and a pulse width signal corresponding to the input DC signal is obtained from the secondary winding of the transformer. Pulse width signal converter. 2. The pulse width signal converter according to claim 1, which uses a circuit in which diodes are connected in parallel with opposite polarities as the nonlinear circuit. 3. The pulse width signal converter according to claim 1, which uses a circuit in which diode-connected transistors are connected in parallel with each other with opposite polarities as the nonlinear circuit. 4. The pulse width signal converter according to claim 1, which uses a circuit in which Zener diodes are connected in parallel with opposite polarities as the nonlinear circuit. 5. A patent claim in which the means for providing a rectangular wave pulse signal is constituted by a rectangular wave oscillator, and a positive and negative polarity constant current source including a diode bridge circuit and a constant current element that receives an output signal from the rectangular wave oscillator. The pulse width signal converter according to range 1.
JP52143652A 1977-11-30 1977-11-30 pulse width signal converter Expired JPS5917894B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52143652A JPS5917894B2 (en) 1977-11-30 1977-11-30 pulse width signal converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52143652A JPS5917894B2 (en) 1977-11-30 1977-11-30 pulse width signal converter

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP23006983A Division JPS5946132B2 (en) 1983-12-06 1983-12-06 analog digital converter

Publications (2)

Publication Number Publication Date
JPS5476055A JPS5476055A (en) 1979-06-18
JPS5917894B2 true JPS5917894B2 (en) 1984-04-24

Family

ID=15343760

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52143652A Expired JPS5917894B2 (en) 1977-11-30 1977-11-30 pulse width signal converter

Country Status (1)

Country Link
JP (1) JPS5917894B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9052366B2 (en) 2000-03-27 2015-06-09 Midtronics, Inc. Battery testers with secondary functionality
US9201120B2 (en) 2010-08-12 2015-12-01 Midtronics, Inc. Electronic battery tester for testing storage battery
US9229062B2 (en) 2010-05-27 2016-01-05 Midtronics, Inc. Electronic storage battery diagnostic system
US10608353B2 (en) 2016-06-28 2020-03-31 Midtronics, Inc. Battery clamp

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9052366B2 (en) 2000-03-27 2015-06-09 Midtronics, Inc. Battery testers with secondary functionality
US9229062B2 (en) 2010-05-27 2016-01-05 Midtronics, Inc. Electronic storage battery diagnostic system
US9201120B2 (en) 2010-08-12 2015-12-01 Midtronics, Inc. Electronic battery tester for testing storage battery
US10608353B2 (en) 2016-06-28 2020-03-31 Midtronics, Inc. Battery clamp

Also Published As

Publication number Publication date
JPS5476055A (en) 1979-06-18

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