JPS5918856B2 - How to handle wafers - Google Patents
How to handle wafersInfo
- Publication number
- JPS5918856B2 JPS5918856B2 JP52090193A JP9019377A JPS5918856B2 JP S5918856 B2 JPS5918856 B2 JP S5918856B2 JP 52090193 A JP52090193 A JP 52090193A JP 9019377 A JP9019377 A JP 9019377A JP S5918856 B2 JPS5918856 B2 JP S5918856B2
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- dopant
- semiconductor wafer
- wafers
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Description
【発明の詳細な説明】
この発明は揮散拡散法により不純物を半導体ウェハに拡
散する段階で揮散拡散ソース用ウエ・・(以下ドーパン
トウェハと呼ぶ)と半導体ウェハとを取力扱う方法の改
良に関するものである。[Detailed Description of the Invention] This invention relates to an improvement in a method for handling a volatilization source wafer (hereinafter referred to as a dopant wafer) and a semiconductor wafer at the stage of diffusing impurities into a semiconductor wafer by a volatilization diffusion method. It is.
最近、半導体ウエ・・に不純物を拡散する方法として、
例えば窒化ホウ素(BN)などからなるドーパントウェ
ハと半導体ウェハとを交互に対向させて配置し、所定温
度の拡散炉に挿入し、上記ドーパントウェハより揮散す
る不純物を上記半導体ウ; エハに拡散させる揮散拡散
方法が広く用いられている。このように、揮散拡散法で
は、その拡散処理の段階において、半導体ウェハとドー
パントウェハとをそれぞれ保持具から取れ出し、これら
のウエo−ハを交互に対向させて拡散処理用支持台に配
置する作業と、拡散処理完了後上記拡散処理用支持台か
ら半導体ウェハとドーパントウェハとをそれぞれの保持
具へ移しかえる作業とが必要である。Recently, as a method of diffusing impurities into semiconductor wafers...
For example, dopant wafers made of boron nitride (BN) and semiconductor wafers are placed alternately facing each other and inserted into a diffusion furnace at a predetermined temperature, and impurities volatilized from the dopant wafer are diffused into the semiconductor wafer. Diffusion methods are widely used. In this way, in the volatilization diffusion method, at the stage of the diffusion treatment, the semiconductor wafer and the dopant wafer are each taken out from the holder, and these wafers are placed alternately facing each other on the support for diffusion treatment. It is necessary to transfer the semiconductor wafer and the dopant wafer from the support for diffusion treatment to their respective holders after completion of the diffusion treatment.
従来、このような作業には、ピンセットを用い5 て半
導体ウェハとドーパントウェハとを一枚づつはさんで取
力扱う方法が用いられていたので、上記ピンセットによ
ち上記ウェハの表面を汚染させるかもしくは破損させる
おそれがある上に、作業性が悪いという欠点があつた。
o この発明は、上述の欠点に鑑みてなされたもので、
半導体ウェハの外径とドーパントウェハの外径とを異な
らしめることによつて、この外径の差を利用して半導体
ウェハ群とドーパントウェハ群とをそれぞれ同時に配置
、移しかえの作業ができ、5 上記両ウェハの表面を汚
染もしくは破損させるおそれのない、作業性のよい上記
ウェハの取力扱い方法を提供することを目的とする。Conventionally, such work has been carried out by using tweezers to hold and handle the semiconductor wafer and dopant wafer one by one. In addition to the risk of damage or damage, there are also disadvantages of poor workability.
o This invention was made in view of the above-mentioned drawbacks,
By making the outer diameter of the semiconductor wafer and the dopant wafer different, the semiconductor wafer group and the dopant wafer group can be placed and transferred simultaneously by utilizing this difference in outer diameter. It is an object of the present invention to provide a method for handling and handling the above-mentioned wafers with good workability and without fear of contaminating or damaging the surfaces of the above-mentioned wafers.
以下、この発明による半導体ウェハとドーパントウェハ
とを取り扱う方法の一実施例を第1図〜0第5図につい
て説明する。An embodiment of the method for handling semiconductor wafers and dopant wafers according to the present invention will be described below with reference to FIGS. 1-5.
第1図は半導体ウェハを保持する保持具を示す平面図、
第2図は第1図の■一■線での横断面図である。FIG. 1 is a plan view showing a holder that holds a semiconductor wafer;
FIG. 2 is a cross-sectional view taken along line 1-2 in FIG. 1.
図において、1は例えば外径が501φ程度で、5 厚
さが200μm程度である半導体ウェハ、2は半導体ウ
ェハ1を第2図に示すように半分以上露出させて保持す
る半導体ウエ・・保持几 3は保持:−ー具2の両側内
壁部に設けられ複数個の半導体ウエ・・1(図面では1
枚だけ例示した)の主面が例えば4.8W11.程度の
間隔tをおいて互に対向して整列するように半導体ウエ
ハ1を保持する溝部を示す。In the figure, 1 is a semiconductor wafer with an outer diameter of about 501φ and 5 is about 200 μm thick, and 2 is a semiconductor wafer holding box that holds the semiconductor wafer 1 with more than half exposed as shown in FIG. 3 holds: - A plurality of semiconductor wafers are provided on both inner walls of the tool 2.
For example, the main surface of the 4.8W11. 2 shows grooves for holding semiconductor wafers 1 so as to be aligned and facing each other with an interval t of about 100 mm.
第3図はドーパントウエハを保持する保持具を示す平面
図である。図において、1aは例えば外径が5711φ
程度で、厚さが1n程度であるドーパントウエハで、こ
のドーパントウエハ1aの外径は第1図に示した半導体
ウエハ1の外径より大きくなるように設定されている。FIG. 3 is a plan view showing a holder that holds a dopant wafer. In the figure, 1a has an outer diameter of 5711φ, for example.
The dopant wafer has a thickness of about 1 nm, and the outer diameter of the dopant wafer 1a is set to be larger than the outer diameter of the semiconductor wafer 1 shown in FIG.
2aは第1図の半導体ウエハ保持具2と同様にドーパン
トウエハ1aを保持するドーパントウエハ保持凡 3a
は第1図の半導体ウエハ保持具2の溝部3と同様に、4
.8m1程度の間隔tを訃いてドーパントウエハ保持具
2aの両側内壁部に設けられドーパントウエハ1aを保
持する溝部である。2a is a dopant wafer holder 3a that holds the dopant wafer 1a similarly to the semiconductor wafer holder 2 in FIG.
4 is similar to the groove 3 of the semiconductor wafer holder 2 in FIG.
.. These grooves are provided on both inner walls of the dopant wafer holder 2a at an interval t of about 8 m1 and hold the dopant wafer 1a.
この溝部3aの深さは、ドーパントウエハ1aが半導体
ウエハ1より7u程度大きくなるように設定されている
ので、第1図の溝部3より3.511程度深くなつてい
る。また、ドーパントウエ・・保持具2aの横断形状は
第2図の半導体ウエハ保持具2の横断形状と同様である
ので、その横断形状の図示を省略した。第4図aは揮散
拡散処理時に用いる拡散処理用ウエハ支持台の一部を拡
大して示す部分拡大平面図、第4図bは第4図AONB
−NB線での縦断面図である。Since the depth of the groove 3a is set so that the dopant wafer 1a is about 7u larger than the semiconductor wafer 1, the depth of the groove 3a is about 3.511 mm deeper than the groove 3 in FIG. Further, since the cross-sectional shape of the dopant wafer holder 2a is similar to the cross-sectional shape of the semiconductor wafer holder 2 shown in FIG. 2, illustration of the cross-sectional shape is omitted. Fig. 4a is a partially enlarged plan view showing a part of the wafer support for diffusion processing used during volatilization and diffusion processing, and Fig. 4b is Fig. 4 AONB.
- It is a longitudinal cross-sectional view along the NB line.
図において、2bは例えば炭化ケイ素SlCからなb第
1図の半導体ウエハ1と第3図のドーパントウエハ1a
とを交互に対向させて整列支持し揮散拡散処理時に用い
られる拡散処理用ウエハ支持台である。In the figure, 2b is made of silicon carbide SlC, for example, and the semiconductor wafer 1 in FIG. 1 and the dopant wafer 1a in FIG.
This is a wafer support stand for diffusion processing used during volatilization and diffusion processing, in which wafers are aligned and supported alternately facing each other.
この拡散処理用ウエハ支持台2bの両側内壁部には、第
1図の溝部3に対応し半導体ウエ・・1を保持する溝部
3b,と第3図の溝部3aに対応しドーパントウエハ1
aを保持する溝部3b2とが交互に設けてある。また、
拡散処理ウエハ支持台2bの横断形状は第2図の半導体
ウエハ保持具2の横断形状と同様であるので、その横断
形状の図示を省略した。第5図は揮散拡散用ウエハの取
り扱いに用いる把持用具を示す斜視図である。On both inner walls of this wafer support stand 2b for diffusion processing, there are grooves 3b for holding the semiconductor wafer 1 corresponding to the grooves 3 in FIG. 1, and grooves 3b for holding the dopant wafer 1 corresponding to the grooves 3a in FIG.
Grooves 3b2 for holding the grooves 3b2 and 3b2 are provided alternately. Also,
Since the cross-sectional shape of the diffusion processing wafer support stand 2b is similar to the cross-sectional shape of the semiconductor wafer holder 2 shown in FIG. 2, illustration of the cross-sectional shape is omitted. FIG. 5 is a perspective view showing a gripping tool used for handling a wafer for volatilization and diffusion.
図において、4は把持用具で、この把持用具4は例えば
ペリリウム銅などの二枚の弾性板5がそれぞれ一端を相
対向するようにして他端を固定板6に取り付けたもので
ある。In the figure, reference numeral 4 denotes a gripping tool, and the gripping tool 4 is composed of two elastic plates 5 made of, for example, perylium copper, with one end facing each other and the other end attached to a fixed plate 6.
弾性板5の相対向面には柔軟性部材からなる緩衝板7が
取り付けてちる。このように構成された把持用具4を用
いることによつて、第1図に示した半導体ウエハ保持具
2の溝部3に挿入された複数個の半導体ウエハ1の端面
を同時にはさみ半導体ウエハ保持具2から取勺出すこと
ができる。A buffer plate 7 made of a flexible member is attached to the opposing surface of the elastic plate 5. By using the gripping tool 4 configured in this manner, the end surfaces of a plurality of semiconductor wafers 1 inserted into the grooves 3 of the semiconductor wafer holder 2 shown in FIG. It can be extracted from.
また、同様に、第2図に示したドーパントウエハ保持具
2aから複数個のド9−パットウェハ1aの端面を同時
にはさみ取力出すこともできる。次に、揮散拡散処理前
、半導体ウエハ保持具2に保持された複数個の半導体ウ
エハ1およびドーパントウエハ保持具2aに保持された
複数個のドτ −パットウェハ1aをそれぞれ第4図に
示した拡散処理用ウエ・・支持台2bに移しかえる段階
につ一いて説明する。Similarly, the end faces of a plurality of dopant 9-pad wafers 1a can be simultaneously pinched and removed from the dopant wafer holder 2a shown in FIG. Next, before the volatilization and diffusion treatment, a plurality of semiconductor wafers 1 held in a semiconductor wafer holder 2 and a plurality of dopant wafer wafers 1a held in a dopant wafer holder 2a are subjected to the diffusion process shown in FIG. The step of transferring the processing wafer to the support stand 2b will be explained one by one.
先ず、ドーパントウエハ1aより外径の小さい半導体ウ
エハ1の複数個を半導体ウエハ保持具21から把持用具
4を用いて同時に抜き出す。First, a plurality of semiconductor wafers 1 having an outer diameter smaller than the dopant wafer 1a are simultaneously extracted from the semiconductor wafer holder 21 using the gripping tool 4.
次に、抜き出された半導体ウエハ1をそのままの状態で
拡散処理用ウエハ支持台2bの溝部3b,に挿入する。
このとき、半導体ウエハ1が保持されている半導体ウエ
ハ保持具2の溝部3の間隔と溝部3b1の間隔とが同一
であるので、半導体ウエハ1を容易に溝部3b1に挿入
することができる。次いで、半導体ウエハ1のときと同
様に、複数個のドーパントウエハ1aをドーパントウエ
ハ保持具2aから把持用具4を用いて抜き出し、拡散処
理用ウエハ支持台2bの溝部3b2に挿入する。そのと
きも、ドーパントウエハ保持具2aの溝部3aの間隔と
溝部3b2の間隔とが同一である上に、ドーパントウエ
ハ1aの外径が半導体ウエハ1の外径が大きいので、半
導体ウエハ1が拡散処理用ウエハ支持台2bの溝部3b
1に挿入された状態でドーパントウエハ1aを挿入する
ことができる。また、揮散拡散処理後、拡散処理用ウエ
ハ支持台2bに挿入されている半導体ウエハ1およびド
ーパントウエハ1aをそれぞれ拡散処理用ウエハ支持台
2bから半導体ウエハ保持具2およびドーバントウエハ
保持具2aへ移しかえる段階でも、半導体ウエニ1の外
径とドーパントウエハ1aの外径との大きさの違いを利
用して、まず拡散処理用ウエハ支持台2bからドーパン
トウエハ1aを把持用具4ではさみ抜き取虱 ドーパン
トウエハ保持具2aへ移しかえることができる。Next, the extracted semiconductor wafer 1 is inserted as it is into the groove 3b of the wafer support base 2b for diffusion processing.
At this time, since the interval between the grooves 3 of the semiconductor wafer holder 2 holding the semiconductor wafer 1 and the interval between the grooves 3b1 are the same, the semiconductor wafer 1 can be easily inserted into the groove 3b1. Next, as in the case of the semiconductor wafer 1, a plurality of dopant wafers 1a are extracted from the dopant wafer holder 2a using the gripping tool 4, and inserted into the groove portion 3b2 of the wafer support base 2b for diffusion processing. At that time, the distance between the grooves 3a of the dopant wafer holder 2a and the distance between the grooves 3b2 are the same, and the outer diameter of the dopant wafer 1a is larger than that of the semiconductor wafer 1, so that the semiconductor wafer 1 undergoes the diffusion process. Groove 3b of wafer support stand 2b for
1, the dopant wafer 1a can be inserted. After the volatilization and diffusion processing, the semiconductor wafer 1 and dopant wafer 1a inserted into the wafer support 2b for diffusion processing are transferred from the wafer support 2b for diffusion processing to the semiconductor wafer holder 2 and the dopant wafer holder 2a, respectively. Even in the changing stage, the dopant wafer 1a is first pinched and removed from the diffusion treatment wafer support 2b using the gripping tool 4 by taking advantage of the difference in the outer diameter of the semiconductor wafer 1 and the outer diameter of the dopant wafer 1a. It can be transferred to the wafer holder 2a.
つづいてこれと同様に、半導体ウエハ1を半導体ウエハ
保持具2へ移しかえることもできる。なお、上記実施例
では、半導体ウエハ1とドーパントウエハ1aとを交互
に配列したが、必ずしも交互に配列する必要はなくこれ
らを所定順序に配列させても差支えない。Subsequently, the semiconductor wafer 1 can also be transferred to the semiconductor wafer holder 2 in the same manner. In the above embodiment, the semiconductor wafers 1 and the dopant wafers 1a are arranged alternately, but they do not necessarily need to be arranged alternately, and they may be arranged in a predetermined order.
以上、説明したように、この発明による方法によれば、
半導体ウエハの外径と揮散拡散ソース用ウエハの外径と
を異なるようにするとともに、上記半導体ウエハの主面
と揮散拡散ソース用ウエハの主面とが所定間隔を隔てて
相対向するように所定順序に整列させたウエハ列のうち
半導体ウエハ群もしくは揮散拡散ソース用ウエハ群毎に
当該群に属するウエハを端面に訃いて柔軟性部材からな
る緩衡板が相対向面に取勺付けられた把持用具を用いて
同時に挟み取勺扱うので、ピンセツトなどを用いて上記
両ウエ・・を一枚づつ取り扱う従来の方法に比べて、上
記両ウエハの表面を汚染もしくくは破損させる卦それも
なく、作業性の向上を図ることができる。As explained above, according to the method according to the present invention,
The outer diameter of the semiconductor wafer is different from the outer diameter of the wafer for volatilization diffusion source, and the main surface of the semiconductor wafer and the main surface of the wafer for volatilization diffusion source are set so as to face each other at a predetermined interval. For each semiconductor wafer group or volatilization source wafer group out of the wafer rows arranged in order, a wafer belonging to the group is placed on the end face, and a buffer plate made of a flexible member is attached to the opposing face. Since the wafers are simultaneously pinched and handled using a tool, there is no contamination or damage to the surfaces of the wafers, compared to the conventional method of handling the wafers one by one using tweezers or the like. Workability can be improved.
第1図はこの発明による半導体ウエハとドーパントウエ
ハとを取り扱う方法の一実施例に用いる半導体ウエハ保
持具を示す平面図、第2図は第1図の−H線での横断面
図、第3図は上記実施例に用いるドーパントウエハ保持
具を示す平面図、第4図aは上記実施例に用いる拡散処
理用ウエハ支持台の一部を拡大して示す部分拡大平面図
、第4図bは第4図aのNB−NB線での縦断面図、第
5図は上記実施例に用いる把持用具を示す斜視図である
。
図に卦いて、1は半導体ウエハ 1aはドーパントウエ
ハ(揮散拡散ソース用ウエハ)、2は半導体ウエハ保持
具、2aはドーパントウエ・・保持入 2bは拡散処理
用ウエ・・支持台、3,3a,3b1,3b2はそれぞ
れ溝部、4は把持用具、5は弾性板、6は固定板、7は
緩衝板を示す。FIG. 1 is a plan view showing a semiconductor wafer holder used in an embodiment of the method for handling semiconductor wafers and dopant wafers according to the present invention, FIG. 2 is a cross-sectional view taken along line -H in FIG. 1, and FIG. The figure is a plan view showing a dopant wafer holder used in the above embodiment, FIG. FIG. 4a is a vertical sectional view taken along the line NB--NB, and FIG. 5 is a perspective view showing the gripping tool used in the above embodiment. In the figure, 1 is a semiconductor wafer, 1a is a dopant wafer (a wafer for volatilization and diffusion source), 2 is a semiconductor wafer holder, 2a is a dopant wafer holding unit, 2b is a wafer for diffusion processing, a support stand, 3, 3a , 3b1 and 3b2 are grooves, 4 is a gripping tool, 5 is an elastic plate, 6 is a fixing plate, and 7 is a buffer plate.
Claims (1)
序に対向させて配列し上記半導体ウエハへ不純物を揮散
拡散させる方法において、上記半導体ウエハの外径と上
記揮散拡散ソース用ウェハの外径とを異なるようにする
とともに、上記半導体ウェハの主面と揮散拡散ソース用
ウェハの主面とが所定間隔を隔てて相対向するように所
定順序に整列させたウェハ列のうち半導体ウェハ群もし
くは揮散拡散ソース用ウェハ群毎に当該群に属するウェ
ハを端面において柔軟性部材からなる緩衝板が相対向面
に取り付けられた把持用具を用いて同時に挾み取り扱う
ことを特徴とするウェハの取り扱い方法。1. In a method of arranging a semiconductor wafer and a wafer for a volatilization diffusion source to face each other in a predetermined order and volatilizing and diffusing impurities to the semiconductor wafer, the outer diameter of the semiconductor wafer is different from the outer diameter of the wafer for a volatilization diffusion source. At the same time, among the wafer rows arranged in a predetermined order such that the main surface of the semiconductor wafer and the main surface of the wafer for volatilization and diffusion source face each other with a predetermined interval, a group of semiconductor wafers or a wafer for volatilization and diffusion source are arranged in a predetermined order. A method for handling wafers, comprising simultaneously holding and handling wafers belonging to each group of wafers using a gripping tool having a buffer plate made of a flexible member attached to an opposing surface of each wafer group.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52090193A JPS5918856B2 (en) | 1977-07-26 | 1977-07-26 | How to handle wafers |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52090193A JPS5918856B2 (en) | 1977-07-26 | 1977-07-26 | How to handle wafers |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5424575A JPS5424575A (en) | 1979-02-23 |
| JPS5918856B2 true JPS5918856B2 (en) | 1984-05-01 |
Family
ID=13991636
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP52090193A Expired JPS5918856B2 (en) | 1977-07-26 | 1977-07-26 | How to handle wafers |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5918856B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60254612A (en) * | 1984-05-31 | 1985-12-16 | Fujitsu Ltd | Transfer equipment for semiconductor wafer |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4913657U (en) * | 1972-05-08 | 1974-02-05 | ||
| JPS5644566B2 (en) * | 1973-07-25 | 1981-10-20 |
-
1977
- 1977-07-26 JP JP52090193A patent/JPS5918856B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5424575A (en) | 1979-02-23 |
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