JPS5918868B2 - semiconductor equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device in which a transistor in which a diode is electrically connected to the collector side is integrally formed on a single semiconductor substrate.

2. Description of the Related Art Conventionally, a circuit configuration as shown in FIG. 1 has been used as a part of a voltage regulator, for example, in a storage battery charging device for an automobile.

In the figure, 1 is an inductive load such as a field coil, 2 is an NPN transistor that controls on/off the current flowing through the inductive load 1, and the emitter side is grounded.

3 is a diode that absorbs the inductive energy generated in the inductive load 1 when the current flowing through the inductive load is controlled on/off by the NPN transistor 2; it is connected in parallel to the inductive load 1 as shown in the figure, and the anode side is connected to the NPN transistor 2. A positive voltage is applied to the cathode side.

FIG. 2 shows the circuit configuration shown in FIG. 1.

This figure shows the structure of a conventional semiconductor device in which an NPN transistor 2 and a diode 3 are thick-film integrated on a ceramic substrate. In the same figure. 10 is an N+ collector semiconductor, 11 is an N- collector + +N region, and 12 is a P
13 is a base region, 13 is an N emitter region, 14 is a silicon oxide film, 15 is a base electrode, 16 is an emitter electrode, 11
is the collector electrode, and the NPN transistor 2 shown in FIG. 1 is composed of these.

Further, 118 is an N cathode semiconductor substrate, 19 is an N cathode region, 20 is a pf anode region, and 14 is a silicon oxide film. 21 is an anode electrode, and 22 is a cathode electrode.

The diode 3 shown in FIG. 1 is composed of these. 23 is a ceramic substrate that constitutes a thick film integrated circuit including an NPN transistor 2 and a diode 3.

24 is a thick film electrode baked onto the ceramic substrate 23.

In this way, conventionally, the NPN transistor 2 and the diode 3 are separately configured on the ceramic substrate 23 as shown in FIG. Two elements of No. 3 were die-bonded onto thick film electrodes 24 on a ceramic substrate 23, respectively.

Then, the base electrode 156 emitter electrode 16 and anode electrode 21 are connected to a predetermined thick film electrode on the ceramic substrate 23.
For example, connections were made using gold wire or aluminum wire. However, in the past, as shown in FIG. 1, the NPN transistor 2 and the diode 3 were constructed as separate semiconductor elements, requiring two die bonding operations. Also, as shown in Figure 2, diode 3 is a cathode substrate. It was not possible to die bond the NPN transistor 2 and the diode 3 onto a thick film electrode having the same potential. Furthermore, an NPN transistor 2 and a diode 3
The power consumption of each element is large, and in order to lower the thermal resistance between each element and the ceramic substrate 23, a primary heat sink such as a copper plate is required. Since they were configured separately on the substrate 23, there was a drawback that two primary heat sinks had to be provided for each.

The present invention has been made to eliminate such drawbacks, and provides a novel semiconductor device that can be embedded in the collector region of a transistor to form a diode integrally with the transistor.

Below, the third embodiment of the semiconductor device according to the present invention will be described.
This will be explained in detail using figures. In the figure, 25 is an N1 collector semiconductor substrate made of, for example, furnace-shaped silicon;
a is an N-collector semiconductor region made of N-type silicon epitaxially grown on the semiconductor substrate 25! ),
These furnace-collector semiconductor substrate 256N-collector semiconductor region 26a and later-described N collector semiconductor region 26b
This constitutes the collector region of the NPN transistor 2 shown in FIG. 27 is a photolithographic process of a predetermined portion of the silicon dioxide SiO2 film. After removing a predetermined portion of the plate by chemical etching, an anode region 28 is formed by diffusing, for example, boron.
As will be explained in the manufacturing method described later, boron is applied in a ring shape from a predetermined portion of the silicon dioxide film to the N-collector semiconductor region 26b made of N-type silicon that is epitaxially grown again on the semiconductor region 26a. ni p
+p+ formed by diffusion until reaching the anode region 27
This is the anode area.

Here, the p+ anode regions 27, 28 form the anode region of the diode 3 shown in FIG. A p+ base region 29 forms the base region of the NPN transistor 2.

Reference numeral 30 forms the emitter region of the 6NPN transistor 2 by forming an N1 emitter region from a predetermined portion of the silicon dioxide film by diffusing, for example, phosphorus.

31 is an N-cathode region, and 32 is an N1 cathode region, forming the cathode region of the diode shown in FIG.

33 is an N cathode region 31. as shown in FIG. An electrical insulating film 634 such as a silicon dioxide film formed on the N collector semiconductor region 26b by thermal oxidation or vapor phase growth is a collector that is in ohmic contact with the entire bottom side of the semiconductor substrate made of N1 type silicon. electrode.
35, 35 is a base electrode electrically connected on the p+ base region 29, 36 is an emitter electrode electrically connected on the N+ emitter region, 37, 37 is a p+ anode region 27
, 28 are electrically connected to the anode electrode, 38 is N1
A cathode electrode is ohmic-contacted onto the cathode region 32.

Thus, the voltage applied to the anode electrodes 37, 37 of the diode 3 is applied to the collector electrode 3 of the NPN transistor 2.
4, the p+ anode region 27 is the 'region l) 6▼ and the f collector region 26
Since a, 25 is the N1 and signal region, the anode electrode 3
7, 37 and the collector electrode 34 will be biased in the forward direction.

Therefore, the anode side of the diode 3 is electrically connected to the collector side of the NPN transistor 2. Accordingly.
In the structure of the semiconductor device shown in FIG. 3, when the anode electrodes 37, 37 and the collector electrode 34 are forward biased, the diode 3 and the NPN transistor 2
and the circuit configuration as shown in Figure 1 (however, inductive load 1
except for.

) can be achieved. Next, a manufacturing method for manufacturing an embodiment of the present invention shown in FIG. 3 will be explained.

Figure 4 shows the process order. First, as shown in FIG. 4a, the substrate of the semiconductor device of the present invention and the NPN transistor 2
N1 collector semiconductor substrate 25 to be the collector substrate of
Prepare. Then, as shown in FIG. 4b, an N collector region 26a of a predetermined thickness is formed on this N+ collector semiconductor substrate 25 by epitaxial growth. After that, Figure 4c
A silicon dioxide film 14a is formed on the V)N collector region 26a by thermal oxidation or vapor phase growth as shown in FIG. A predetermined portion of this silicon dioxide film 14a is removed by well-known photolithography or chemical etching as shown in FIG. 4d. Next, using the predetermined portion A from which the silicon dioxide film 14a has been removed, a. For example, by diffusing boron, the p+ anode region 27
form. After that, the N-collector area 26a and the
The silicon dioxide film 14b formed on the anode region 27 is completely removed, and an N collector region 26b having the same resistivity as the N collector region 26a epitaxially grown in FIG. 4B is again formed by epitaxial growth. This state is shown in FIG. 4f. At this time.
The p+ anode region 27 of the diode 3 is buried in the N- collector regions 26a, 26b. Next, as shown in FIG. 4g, a silicon dioxide film 14c is formed over the entire surface of the N collector region 26b. Next, as shown in Figure 4h. ．． The p+ anode region 27 of the diode 3 is formed into a ring shape by removing a predetermined portion of the silicon dioxide film 14c from the p+ anode region 27 buried in the N collector regions 26a, 26b. Along with the eggplant to get it. Base region 2 of NPN transistor 2
8 can be formed by diffusion.

Then, at the same time, the p+ anode region 28 of the diode 3 is diffused into a ring shape. p of NPN transistor 2
+Diffusion molding the base region 29. At this time, the p+ anode region 28 of the diode 3 is diffused until it reaches the previously buried p+ anode region 27, and the state in which the diffusion of the anode region 28 reaches the anode region 27 is shown in FIG. shall be.・However. N collector area 26
It is in a state completely separated from the a&$N cathode region 31.

Next, as shown in FIG. 4J, in order to obtain an oscilloscope contact with the N cathode region 31 of the diode 3, the transmission cathode region 32 is diffusion-molded. Therefore, the predetermined portion 2 of the silicon dioxide film 14d and the NPN transistor 2
In order to diffusion mold the transmitter emitter region 36, predetermined portions of the silicon dioxide film 14d are selectively removed. Thereafter, as shown in FIG.
and simultaneously to the desired depth. Silicon dioxide film 1
4e Form on the entire surface. Next, as shown in FIG. 4t, the anode electrode 37, cathode electrode 38 and N
In order to form the base electrode 35 and emitter electrode 36 of the PN transistor 2, the holes, chips, and holes are selectively removed from predetermined portions of the silicon dioxide film 14e.

Thereafter, as shown in FIG. 4m, the anode electrodes 37 and 376 of the diode 3, the cathode electrode 38, and the base electrode 3 of the NPN transistor 2 are formed using vacuum evaporation, photolithography, etc.
5,356 emitter electrode 36 and further collector electrode 34 are formed. Here, the diode 3 is embedded in the N collector regions 26a and 26b of the NPN transistor 2 and is integrally constructed.

In addition, in FIG. 1, the diode 3 and the NPN transistor 2
Regarding the combination configuration shown in FIG. 3, the configuration shown in FIG. ．． Of course, the diode can be integrally constructed by being buried in the collector region of the PNP transistor.

At this time. The collector region of the PNP transistor and the cathode region of the diode become adjacent to each other. Further, the semiconductor device according to the present invention is particularly suitable for an inductive load switching circuit, and it is also possible to use a Darlington connection type transistor instead of the above transistor.

As explained above. A semiconductor device according to the present invention electrically connects a diode to the collector side of a transistor, and includes a collector region having a first conductivity;
A base region and a first region 6 formed separately from one another from one main surface side of the collector region and having a second conductivity.
An emitter region and a second region formed in the base region and the first region and having a first conductivity, a collector electrode electrically connected to the other main surface of the collector region, and the base region and a base electrode and an emitter electrode electrically connected to the emitter region, and 6 the above first
and a first and second electrode electrically connected to the second region, respectively, and the collector electrode and the first electrode are biased in the forward direction. By electrically connecting the diode with the collector region, the diode can be embedded in the collector region of the six transistors and integrally formed with the transistor.

Therefore, there is no need to handle two elements, a diode and a transistor, as in the conventional case. This makes it possible to handle the semiconductor elements as one single element, thereby reducing the number of semiconductor elements constituting a thick film integrated circuit. In this case, the transistor can be considered as the main component.

Furthermore, since the heat generated by the diode is dissipated through the collector region of the transistor, there is no need to use two primary heat sinks as in the conventional case. This has excellent effects such as being able to share a single primary heat sink. Note that the semiconductor device according to the present invention is particularly suitable for an inductive load switching circuit, and the above transistor can also be a Darlington connection type transistor.

[Brief explanation of drawings]

Fig. 1 is a circuit configuration diagram showing a conventional inductive load switching circuit using transistors. Fig. 2 is a structural diagram of a conventional semiconductor device in which the diode and transistor shown in Fig. 1 are thick-film integrated. The figure is a structural diagram showing an embodiment of a semiconductor device according to the present invention. FIG. 4 is a diagram showing the manufacturing process of a semiconductor device according to the present invention. Note that the same reference numerals in the figures indicate the same or equivalent parts. 2...NPN transistor. ．． 3...Diode,
25... Koichi collector semiconductor substrate. 26a, 26b・
...N- collector semiconductor region, 27, 28...p+ anode region. , 29...P+base area, 30°...
Furnace-emitter region, 31...N-cathode region 632
...Milk-cathode region, 33...Insulating film, 34...
-Collector electrode 635...Base electrode. 36...
Emitter electrode. 37... Anode electrode, 38... Cathode electrode.

Claims (1)

[Claims] 1. In a transistor in which a diode is electrically connected to the collector side of the transistor, a collector region having a first conductivity, a base region having a second conductivity formed separately from one main surface side of the collector region, and a base region having a second conductivity. a first region, an emitter region and a second region formed in the base region and the first region and having a first conductivity, and a collector electrode electrically connected to the other main surface of the collector region; , a base electrode and an emitter electrode electrically connected to the base region and the emitter region, and first and second electrodes electrically connected to the first and second regions, respectively.
an electrode, the transistor is embedded in the collector region of the transistor by forward biasing between the collector electrode and the first electrode and electrically connecting the first region and the collector region. A semiconductor device characterized in that the diode is formed integrally with the transistor.