JPS5919382B2 - signal generator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal generating device that generates a signal proportional to the logarithm of a hyperbolic function of time. The applicant of the present application has already proposed a device that utilizes the characteristics of a circuit formed by combining a capacitor and a semiconductor device having logarithmic characteristics.

The principle diagram is shown in Fig. 1. In FIG. 1, C1 is a capacitor, and TRI is a semiconductor device connected in parallel to a capacitor CI. Here, a diode-connected transistor (abbreviated as a log transistor) is shown as an example.

81 is a switch, and ES is a DC voltage.

In this circuit. If a DC voltage ES is applied to the capacitor C1 via the switch Sl (in this case, a constant current source may be used to apply the current) and the switch Sl is opened after charging the capacitor CI, the current flowing through the capacitor C1 ( i (here, the same as the current flowing through the log transistor TRI) and the voltage applied to the log transistor TRI (here, the same as the potential difference of the capacitor CI) vc are expressed by equations (1) and (2), respectively.

Vc i=-C・□ (1) t kT 1 vc=-・tn-(2) IS However, C: capacitance of capacitor CI : Boltzmann constant T: Junction temperature of log transistor (absolute temperature) q: electron charge I8: Reverse emitter of log transistor saturation current tn: natural logarithm symbol Equation (3) is obtained from Equation (1) and (2).

In equation (3), if j=io at 1=00, this singular solution is as follows.

In equation (4), since kTC/q and kTC/qio are both constant values, the current i flowing through the capacitor CI becomes a hyperbolic function with respect to time t.

The voltage VC applied to the log transistor TRI is obtained by substituting equation (4) into equation (2).

As is clear from equation (5), log transistor TRI
The voltage vc applied to is a signal proportional to the logarithm of a hyperbolic function of time.

In this way, a signal proportional to the logarithm of the hyperbolic function of time can be obtained, but as seen in equation (5),
T, which represents the temperature itself, and the log, which changes depending on the temperature.
The emitter reverse saturation current of the transistor TRI has two environmental change factors.

Therefore, when trying to perform temperature compensation in this circuit, it is relatively easy to perform temperature compensation for T, but there is a problem in that temperature compensation for (8) is extremely complicated and difficult.

In view of these points, an object of the present invention is to generate a signal proportional to the logarithm of a hyperbolic function of time that is completely independent of the reverse saturation current of a logarithmic transistor using a simple circuit configuration, and to achieve temperature compensation. The object of the present invention is to provide a signal generating device which has the possibility of being implemented very simply.

The apparatus of the present invention will be explained in detail below with reference to the drawings.

FIG. 2 is a circuit diagram showing one embodiment of the present invention.

In Figure 2, Sl, Sl, and S3 are switches, A1 is an amplifier, Io is a constant current source, CI and C2 are capacitors,
TR1 is a semiconductor device having logarithmic characteristics, and here is a constant current source I exemplifying a log transistor.

is connected to the negative input terminal of amplifier A1 via switch S1.

The collector and base of the log transistor TRI are commonly connected and connected to the negative input of the amplifier A1, and its emitter is connected to the other side of a capacitor C1 whose one side is connected to a common potential point. switch S
3 to the output terminal of the amplifier A1.

Capacitor C2 is connected between the input and output terminals of amplifier A1 via switch S2.

The operation of the apparatus of the present invention having such a configuration will be explained as follows.

When switch S1 is on, Sl is off, and S3 is on, a constant current source I is connected to the negative input terminal of amplifier A1.

As more current flows into the capacitor C1, the capacitor C1 is charged.

After capacitor C1 is charged, switch S1 is turned off,
Sl is on, S3 is off, and the log transistor T
The current i flowing through R1 is (4
) is expressed by the formula.

The current i expressed by equation (4) is integrated by an integrator consisting of a capacitor C2 and an amplifier A1, and the integrated value, that is, the voltage V at the output terminal of the amplifier A1 is as follows.

However, C1: capacitance of capacitor C2 log: common logarithm symbol As is clear from equation (6), voltage V is a value proportional to the logarithm of the hyperbolic function of time t.

In this way a signal proportional to the logarithm of the hyperbolic function of time can be obtained.

As described above, according to the device of the present invention, the emitter reverse saturation current I of the log transistor included in the device of FIG.
8, a signal proportional to the logarithm of the hyperbolic function of time can be obtained.

Therefore, when performing temperature compensation, it is only necessary to compensate for the temperature T, and there is an advantage that temperature compensation can be easily performed in degrees Celsius compared to the apparatus shown in FIG.

FIG. 3 is a circuit diagram illustrating another embodiment of the present invention, and is a circuit diagram of a device in which the signal generating device shown in FIG. 2 is applied to a circuit that converts a frequency signal into a voltage signal.

In the figure, the circuit HYP surrounded by a dashed line is a hyperbolic function signal generation circuit, S4 is a switch, SH is a sample hold circuit consisting of switch S5, capacitor C3, and amplifier A2, IN is an input terminal, CNT is a control circuit,
OUT is an output terminal.

The hyperbolic signal generating circuit HYP is the same as the circuit of the device shown in FIG. 2, and detailed explanation will be omitted here.

The switch S4 is for discharging the residual charge in the capacitor C2.

Sample hold circuit SH is hyperbolic function signal generation circuit H
It samples the output signal of YP, holds the sampled value until the next sampling point, and sends it to the output terminal OUT.

The control circuit CNT includes a switch 81. S2. S3. S4゜S
5, and its input terminal is the input terminal I.
Connected to N.

In such a configuration, a period t as shown in FIG. 4A is applied to the input terminal IN.

When a pulse train signal PT with a frequency f is applied, this pulse train signal PT is given to the control circuit CNT.

The control circuit CNT generates a pulse P1 having a time width Δt as shown at the beginning of FIG. 4 in response to the rise of this pulse train signal PT.

The switch S5 is driven and turned on by this pulse P1, and the sample hold circuit SH holds the output signal of the hyperbolic function signal generation circuit HYP.

Following the fall of the pulse P1, the control circuit CNT generates a pulse P2 having a time width Δt2 as shown in FIG. 4C.

This pulse P2 causes the switches S1, S2 . S3.
S4 is driven and switches Sl and S are activated as shown in FIG. 4C.
3 and 84 are turned on, and the switch S2 is turned off as shown in FIG. 4-2.

This works as a constant current source. is connected to the negative input terminal of amplifier A1, so that capacitor C1 is charged to a negative voltage as shown in FIG.

When the pulse P2 drops after a time Δt2, the switches Sl, S3, and 84 are turned off and S2 is turned on, and the integrator consisting of the capacitor C2 and the amplifier A1 becomes (4
) The current i flowing through the log transistor TRI is integrated, and the output voltage V of the amplifier A1 increases as shown by the curve ① in FIG. 4E.

In this way, integration continues until the next pulse of the pulse train signal PT arrives (.

When the next pulse is given to the control circuit CNT, the pulse P1
is generated, and the output voltage ~ of the amplifier A1 is sampled by this pulse P1.

At this time, the integration time is the period t of the HAS sequence signal PT.

The time (to
-Δt2), the integral value, ie, the output voltage V of the amplifier AI, is as follows by substituting (to-Δ12) for t in equation 6.

Therefore, assuming that the pulse width Δt2 and the initial current value io are set to appropriate values to satisfy the relationship Δt2=kTC/qio, equation (7) becomes as follows.

As is clear from equation (8), the output signal V of amplifier A1
is a value proportional to the logarithm of the frequency f to be converted.

The sample and hold circuit SH samples this signal V using a pulse P1 shown at the beginning of FIG.

A voltage signal E proportional to the logarithm of the frequency f as shown by the broken line in FIG. 4E is output from the output terminal OUT.

Output.

2 in Fig. 3, the hyperbolic signal generation circuit HYP
By adding a conversion circuit consisting of a level shifter g and an amplifier between the switch S5 and the switch S5 or iM at the output terminal OUT, Hg and b in equation (8) can be eliminated.

A voltage signal portion of = log f can also be obtained from the output end.

In addition, a feedback resistor is attached to the amplifier A1 so that the feedback loop formed by this resistor can be switched and connected to the loop formed by the series circuit of the capacitor C2 and the switch S2.
By switching the circuit connections, it is possible to easily obtain a signal proportional to the hyperbolic function of time when a resistor is connected, and a signal proportional to the logarithm of the hyperbolic function of time when a capacitor C2 is connected. .

As described above, according to the device of the present invention shown in FIG. 3, it is possible to convert a frequency signal into a voltage signal proportional to its logarithm with high accuracy using a simple circuit configuration, and to convert the frequency signal into a voltage signal proportional to its logarithm with high accuracy, Because it can perform conversion, it has a wide dynamic range (and can convert a frequency signal to a signal proportional to its logarithm at high speed and with high precision).

At the same time, the converted signal has no relation to the emitter reverse saturation current I8 of the log transistor TR1, which is a temperature fluctuation factor, so when temperature compensation is performed, the temperature T
(There is an advantage that temperature compensation can be easily performed.)

Therefore, this device is suitable for use as a tachometer.

In the apparatus of FIG. 2 or 3 described above, if a signal proportional to the logarithm of a long-term hyperbolic function, so-called low frequency, is to be obtained, a capacitor C1 with a large capacitance is required.

When a large capacity capacitor C1 is used, feedback from the amplifier A1 alone may cause the capacitor C1 to become uncharged or the amplifier A1 to oscillate.

Figure 5 shows a large capacity capacitor C1 that solves this problem.
This figure shows still another embodiment of the present invention suitable for use in the case of using the present invention.

FIG. 5 is a circuit diagram of an embodiment of a device for converting a frequency signal into a voltage signal using a method of precharging the capacitor C1.

In FIG. 5, HYP is a hyperbolic function signal generation circuit, S
H is a sample and hold circuit, which is the same as the circuit shown in FIG.

S6 is a switch, Es1 is a constant voltage source, INT is an interface, IN is an input terminal, CNT1 is a control circuit, OU
T indicates an output terminal, respectively.

The input terminal IN is connected to the input end of the control circuit CNT1.

The input end of the interface INT is connected to the connection point between the output of the hyperbolic function signal generation circuit HYP and the input end of the sample hold circuit SH, and the output end is connected to the control circuit CNT1.

The control circuit CNT1 generates a pulse P that drives the switch S5.
1. Pulse P2 that drives switch Sl, S2゜S4,
It generates a pulse P3 that drives the switch S6 and a pulse P4 that drives the switch S3.

The positive side of the constant voltage source Es1 is connected to a common potential point, and the negative side is connected to a connection point between the switch S3 and the capacitor C1.

Since the hyperbolic function signal generation circuit HYP and the sample hold circuit SH are the same as the circuit shown in FIG. 3, their explanation will be omitted here.

The operation of the apparatus shown in FIG. 5 having such a configuration is as follows.

A period t as shown in FIG. 6A is applied to the input terminal IN.

When a pulse train signal PT having a frequency f is applied, this pulse train signal PT is given to the control circuit CNT1.

The control circuit CNTl generates a pulse P1 having a time width Δt as shown at the beginning of FIG. 6 in response to the rise of this pulse train signal PT.

The switch S5 is driven by this pulse P1, and the sample hold circuit SH holds the output signal of the hyperbolic function signal circuit HYP.

The control circuit CNT1 generates a pulse P2 having a time width Δt2 as shown in FIG. 6 at the falling edge of the pulse P1.

The switches Sl and S4 are driven by this pulse P2 and are both turned on for Δt2 hours as shown in FIG. 6C, and the switch S2 is turned off for 622 hours as shown in FIG.

At this time, since the switch S3 is off, the amplifier A1 becomes open loop and its output voltage V changes downward to a negative potential as shown in FIG.

On the other hand, the control circuit CNT1 generates a pulse P3 shown in FIG. 6E with a delay of a minute time Δt3 from the rising edge of the pulse P2.

This pulse P3 turns on the switch S6, and the constant voltage source ESI starts charging the capacitor C1.

As charging progresses, the current flowing through the log transistor TRI is a constant current source ■.

At the same time, the output voltage V of the amplifier A1 rises from a negative potential to a positive potential as shown in FIG.

When this output voltage V reaches the level of the threshold voltage V8 of the interface INT as shown in FIG. 6G, the output signal of the interface INT is inverted.

At this time, charging of the capacitor C1 is almost completed.

Due to the inversion of the output signal of the interface INT, the control circuit CNT lowers the pulse P3 and raises the pulse P4.

This turns on the switch S3, turns off the switch S6, and the feedback of the amplifier A1 further turns on the capacitor C1.
The remaining amount of charging is performed.

After charging is completed, pulse P4 drops in synchronization with pulse P2, and switches S1, S3. S4. S5. Both S6 are turned off and switch S2 is turned on.

Therefore, the charge on the capacitor C1 begins to be discharged and this discharge current flows through the log transistor TRI.

Similar to the device shown in FIG.
The current i flowing through I is integrated, and the integral value V expressed by equation (8) is held in the sample-and-hold circuit SH, and the frequency f as shown by the broken line in FIG.
A voltage signal E proportional to the logarithm of E.

is output. As explained above, according to the device of the present invention shown in FIG. 5, when a large capacitance capacitor C1 is used to obtain a signal proportional to the logarithm of a long-term hyperbolic function, that is, a low frequency. It can prevent uncharging of capacitor C1 or rooting of amplifier A1, etc. that tend to occur, and can stably charge capacitor C1 with a simple circuit configuration, converting a wide range of frequency signals into a signal proportional to its logarithm with high precision. can be converted.

[Brief explanation of drawings]

Fig. 1 is a principle diagram, Fig. 2 is an embodiment of the present invention, Fig. 3 is another embodiment of the present invention, Fig. 4 is an operation waveform diagram of each part in Fig. 3, and Fig. 5 is an embodiment of the present invention. Yet another embodiment, No. 6
The figure is an operation waveform diagram of each part in B in FIG. CI, C2, C3... Capacitor, TR1... Log transistor, Sl, S2. S3. S4. S5゜S6
...Switch, E8...DC voltage, AI, A2...
・Amplifier, Io...constant current source, HYP...hyperbolic function signal generation circuit, SH...sample hold circuit, C
NT, CNT1...control circuit, INT...interface, Es1...constant voltage source, IN...input terminal, OUT...output terminal.

Claims (1)

[Scope of Claims] 1. A capacitor, a semiconductor device having logarithmic characteristics with at least one end connected to the capacitor, a switch means for applying a charging current to the capacitor, and a semiconductor device that charges the capacitor for a predetermined period of time by the switch means. A signal generating device further comprising an integrating means for integrating a current flowing through the semiconductor device, and obtaining a signal proportional to the logarithm of a hyperbolic function of time from the integrating means. 2. A capacitor, a semiconductor device having logarithmic characteristics with at least one end connected to the capacitor, a switch means for supplying a charging current to the capacitor every time a pulse train signal is input, and a switch means for charging the capacitor for a predetermined period of time. and an integrating means for integrating the current flowing through the semiconductor device, and a sample hold circuit for sampling the output of the integrating means and the integrating means in synchronization with the pulse input of the pulse train signal. A signal generator that generates a signal proportional to the logarithm of the frequency of a pulse train signal. 3. The signal generating device according to claim 2, wherein the capacitor is pre-charged within the predetermined period.