JPS592037B2 - Denshigatsuki - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic musical instrument, and more particularly to an improvement in a method for addressing a waveform memory in an electronic musical instrument that reads musical sound waveforms from a waveform memory.

Conventionally, as one method for forming musical tones, a waveform readout method is known in which a musical waveform to be generated is stored in a memory and read out at a predetermined speed (for example, US Pat. No. 3,515,792). In this waveform readout method, a memory (hereinafter referred to as
To address the waveform memory (waveform memory), there are two methods: (a) clock pulse selection method, and (b) frequency number addition method. In other words, (a) the clock pulse selection method, as shown in FIG. 1, selects and derives a clock pulse of a frequency corresponding to the operated key from the clock pulse generator 12 via the selector 11 according to the operation of the key 10. The waveform memory 14 is addressed by the output of the counter 13 to obtain a sample value output 15 according to the time series. However, in this method, the number of types of cycles of the clock pulses of the pulse generator 12 is required to be the same as the number of keys, and the clock pulse generator 12 not only becomes large-scale, but also the counter 13 becomes large-scale. However, in the case of time-division operation, an even larger scale is required, and in other words, it is extremely difficult to generate multiple tones. Incidentally, this method is employed in musical instruments described in the above-mentioned US Pat. No. 3,515,792 and others. In the frequency number addition method, as shown in FIG. The frequency number is read out and added repeatedly in the arithmetic unit 23, and the output of the arithmetic unit 23 is used to store the waveform memory 24 as a sample value output 25 according to the address time series.
This is what you get.

However, in this method, the configuration of the arithmetic unit 23 that repeatedly adds frequency numbers usually requires 16 to 20 bits, and not only does the scale increase, but the degree of complexity also increases. Furthermore, in order to obtain particularly sufficient frequency accuracy, it is necessary to increase the number of bits in the frequency number memory 22 and the adders, registers, etc. in the arithmetic unit 23, which aggravates the above-mentioned tendency. This method is described in U.S. Patent No. 374.
No. 3755. The present invention was made in an attempt to eliminate the drawbacks of the above-mentioned prior art, and an object of the present invention is to provide an electronic musical instrument that can read out periodic waveforms with different repetition periods from a single waveform memory with a simple configuration. do.

In order to achieve this object, the present invention includes a waveform memory that stores each function value of a function that becomes a musical sound waveform at each address, and a corresponding address and an address to be read next time corresponding to each address of this waveform memory. A directory memory (DirectOrymemOry) that stores values related to differences, that is, address changes for each pitch name, and a directory memory (DirectOrymemOry) that stores values related to differences, that is, address changes, for each note name. reading means for reading out the directory memory in accordance with the current value of the signal and the note name of the musical tone to be generated; and address signal calculation means for calculating the next current value of the address signal from the value and supplying the same to the reading means, and generating a musical tone based on the function value read from the waveform memory. I have to.

Embodiments of the present invention will be described below with reference to the accompanying drawings.

※※Embodiment 1 Fig. 3 shows an embodiment of the present invention, and shows the configuration 100 of the musical waveform generation section of an electronic musical instrument that can generate only a single note, and other components (DA converter). , timbre circuit, amplifier, etc.) can be applied to all known methods.

To outline this embodiment, when the keyboard 101 is operated, the output of the key address decoder 102 is output to the octave clock generator 10 which is operated by the master oscillator 105.
4 and also drives the selector 106 of the directory memory 107. Directory memory 107 output via selector 106
The contents of address register 112 are fed back through adder 108, gate 109, and address register 110 to waveform memory 112, while the contents of address register 110 are fed back to adder 108 and directory memory 107 through gate 111. Note that it is the output of the selector 103 that drives the gates 109 and 111 by 1. Next, the details of the configuration and operation of this embodiment will be clarified while explaining the main components.

First, the directory memory 107 will be explained.
Prior to this, a case will be considered in which the relationship between the frequency ratio and period between each note name of the scale is based on the F note. Here, a waveform memory having 1024 addresses corresponding to the maximum value 1024 (F note) of the relative approximation periods of each note name shown in the column of Table 1 is configured, and If you read only the number of addresses corresponding to the relative approximation period of each note name as shown in the column, that is, the F of each note name.
By skipping as many addresses as the number of period differences for notes (column . . . in Table 1) without reading, it is possible to obtain a musical tone having a period corresponding to each predetermined note name.

The directory memo January OT according to the present invention is constructed based on the above idea, and has the contents as shown in Table 2.

In other words, there are 12 pitch name series from 0 to 11 corresponding to the 12-tone equal temperament, and the relationship between the pitch name series number and pitch name for the F note (Table 2) with pitch name series number 11 is as follows. (same as those in the table), 1 from o1 to 1023
The bits for 024 addresses store a total of o''.

Here, bit o'' is information (indicator) informing that the address should be advanced by one. Also, note name series number 10
Regarding the number F# sound, in order of address number ゞ 0000
10・・・・・・・・・・・・01002 and 10
Store 24 bits. Here, this series has F
Contains 57 bits S1'' corresponding to the period difference 57 between the # note and the F note (column (e) in Table 1). In other words, the bit P
11'' is information (indicator) informing that the next address should be skipped (that is, advance two addresses).
In the same way, the directory memory is configured by storing the relative period difference (the number of bits Pl7 shown in Table 1 (column (1)) up to the E note of the 12th note sequence number 0. Note that bit S1'' is information that informs that the next address should be skipped, so bit P1'' is not stored consecutively in the directory memory.In reality, the bit P1'' is not stored consecutively in the directory memory For example, it can be configured by a read-only memory (ROM) using a MOS device or the like.

In the directory memory 107 configured in this way, the key address decoder 102 reads the note code NC (key address) corresponding to the operated key on the keyboard 101 and drives the selector 106, so that the directory memory 107 outputs each note name series separately. Among them, the output of the pitch name series corresponding to the operated key is selected and extracted.

Here, the key address decoder 102 that drives the selector 106 outputs two types of codes: a note code NC indicating the note name and an octave code 0C indicating the octave. The octave clock generator 104, which will be described, is activated.

Further, the decoder 102 outputs a clear signal CS for clearing all the address registers 110 to "O" at the moment the key is pressed (the (*) of the decoder 102 and the register 110 in the figure are connected). Note that the octave code 0C and note code NC are 3 bits and 4 bits, respectively.
It is sufficient to have bit information to correspond to each octave and pitch name. For example, as shown in Table 3, the number of octaves is sequentially (000), (001), (01
0), ......, (110), and the note name is 12 from 'F' to SE'.
As shown in Table 4, the sounds are sequentially (1011), (10
10), (1001), ・・・・・・・・・・・・・・・
, (0000).

Here, for example, the F6 note is the octave code (0
00) and note code (1011). The adder 108 adds the contents of the directory memory 107 transmitted via the selector 106 and the contents (address number) of the address register 110 transmitted via the gate 111, and adds the contents of the directory memory 107 transmitted via the selector 106 to the contents (address number) of the address register 110 transmitted via the gate 111. The information to which "1" is added is sent to the address register 110 via the gate 109.

Here, the reason why the adder 108 automatically adds the information "1" is to advance the address by one when the signal from the directory memory 107 is "0".The address register 110 has 10 bits. It constitutes an input, reads out the contents of 1024 addresses in the directory memory 107, and outputs the lower 7 bits as an address signal for the waveform memory 112.

The waveform memory 112 is a memory having 128 addresses from number O to number 127, and its address is specified by the address register 110 (10 bits).
This is done using the lower 7 bits of the bit. Therefore, when the address data changes from 0 to 1023, the waveform memory 11
The contents of 2 will be read out repeatedly 8 times. In other words, from the outside, it has an address of 0 to 1023,
This is equivalent to a memory in which the same waveform is stored repeatedly eight times. The format of this waveform memory 12 may be a digital memory. Gates 109 and 111 are driven by clock pulses from octave clock generator 104 sent through selector 103, opening gate 111 when the clock pulse is on 7 and opening gate 109 when the clock pulse is off 2. The gate 109 and the gate 111 are opened and closed alternately.

The octave clock generator 104 outputs seven types of clock pulses CPO-CP6 with octave sequence numbers 0 to 6 corresponding to each of 6 octaves + 1 note in a 73-key keyboard instrument, for example.

Frequency F of these seven types of clock pulses CPO to CP6
. −F6 are 2n times larger than each other, and the master oscillator 1
Based on the frequency of 05, a predetermined frequency is obtained by an appropriate one-frequency divider. That is, F6(-2f5)>F5
(-2f4)〉F4(=2f3)〉F3(2f2)〉F
2(-2f1)>f1(=2f0)>FO, and the frequency F. −T is the period corresponding to F6. If you display -T6, the size relationship is T. >T1>T2>T3>T4>T5>T6
It is. Therefore, for example, as shown in Tables 3 and 4, octave series number 0 is F. - Outputs the necessary clock pulse CPO corresponding to the F1 sound, and outputs the sequence number 1.
The octave sequence number 6 outputs the necessary clock pulse CPl corresponding to F1 to F2 notes, and in the same way, the octave sequence number 6 outputs the necessary clock pulse CP6 corresponding to F6 to E7 notes. . Note that the octave code 0 output from the key address decoder 102 corresponds to the key operated by the selected octave clock series Gζ.
Do it by C.

Above, an overview of the configuration and operation of the embodiment of the present invention has been explained.Next, as a specific example, note F6, note F5, and note E7 are pressed on the keyboard 101, and these musical tones are read from the waveform memory 112. Explain the situation.

(b) When the F6 note is pressed, the selectors 103 and 106 select the sixth series of clock pulses CP6. of the octave clock generator 104.
And pitch name series number 11 in directory memory 107 is selected.

Since the contents of the address register 110 are all set to "O" by the clear signal CS of the key address decoder 102 at the moment of key depression, the contents of the address O of the waveform memory 112 are first output. Next, clock pulse CP6
When turned on, gate 111 opens and address register 1
10 is transferred to the adder 108, and upon arrival of the address O signal, the contents of the address O of the pitch name series No. 11 in the directory memory 107 are sent to the adder 108. Here, directory memory 10
Since the content of address O of 7 is ゞ0'', adder 108
The output of will be "1". Subsequently, clock pulse CP6
When the adder 108 is turned off, the gate 109 is opened, the output "1" of the adder 108 is inputted to the address register 110, and the contents of the address 1 of the waveform memory 112 are outputted. Further, at turn 7 of the next cycle of the clock pulse CP6, address 1, which is the content of the address register 110, is transferred to the adder 108, and upon arrival of the address 1 signal, the content of address 1 of the directory memory 107 is transferred to the adder 108. 108. Here, directory memory address 1
Since the content of is 'O'', the output of adder 108 is '2
”. Next, when the clock pulse CP6 turns off 2, the output "2" of the adder 108 is input to the address register 110, and the output "2" of the adder 108 is inputted to the address register 110, so that the output "2" of the adder 108 is inputted into the address register 110. is output. In this way, the waveform memo I river 12 is sequentially addressed by the clock pulse CP6, but since the contents of the 1024 addresses in the directory memo 1 river 07 are all SO'', all the contents of the addresses in the waveform memory 112 are read out. .For this reason, 1 of the directory memory 107
Eight waves (=?) are formed and output while reading 024 addresses. Figure 4A shows this situation, and Figure 4C shows the pit time scale.

Also, the period T(F6) in this case is T(F6)=? T
6-128T6. (b) If you press the F5 note, the clock pulse is the 5th pulse CP in the octave series.
5 is selected, and pitch name series number 11 is also selected in the directory memory 107.

As can be seen from this, the operation is the same as that described in section (a) above, except that the period of the clock pulse is different.

Here, the period T3 of the clock pulse CP5 is T5=2
T6, the period T(F5) of the output waveform obtained for the F5 sound is T(F5)=128T5=2T(F6
). That is, a waveform with a period twice that of the F6 tone is obtained. (c) When the E7 note is pressed, the selectors 103 and 106 select the clock pulse CP6 of the sixth series of the octave clock generator 104,
Then, pitch name series number 0 in the directory memory 107 is selected.

First, the manner in which the contents of address O of the waveform memory 112 are output is the same as described in the previous section (a).

Also, the contents of the address in the directory memory 107 are '
The same applies to the case where the number is 0''. However, the pitch name series No. 0 in the directory memory 107 includes 481 ゞ1'' as the contents of the address. Here, the address of the waveform memory 112 is performed by the address register 110, the contents of this register 110 become m, and the contents of the address m of the directory memory 107 become S11''.
A case will be explained below.

The output of the address register 110 allows the waveform memory 1
At the same time, the contents of the address m of No. 2 are output, and the signal of this address m is transferred to the adder 108, and furthermore, this signal is used to output the address m of the pitch name series No. 0 of the directory memory 107.
The contents of are sent to adder 108. Here, since the content of the address m of the directory memory 107 is "'1", the output of the adder 108 is stored in the memory 10 at the address m.
Add 1'' to the contents of 7 and further add 1 to 1 by the operation of adder 108.
In the end, it becomes [m+2]. Therefore, the clock pulse CPO is turned off and the gate 109 is opened.
The output "m+2" of 08 is input to the address register 110, and the contents of address m+2 of the waveform memory 112 are output. As can be seen from this, since the content of address m in the directory memory 107 is S1'', address m+1 in the waveform memory 112 is skipped and the next address m+2 is read. In the same manner, Depending on the content of the address in the directory memory 107, a certain address in the waveform memory 112 is read or a certain address is skipped to obtain a musical tone waveform.

In other words, note name series number 0 in directory 107 has 481 addresses with the content '1', so there are actually 5 addresses.
It will have 43 valid addresses.

Therefore, the period T(E7) of the waveform obtained at this time is T
(E7)=? T6=? It becomes T (F6) (Figure 4 exit).

This value is a tone that is -1.77 cents off from the F6 note in 12-tone equal temperament. Furthermore, if the E6 note is pressed, the clock pulse CP5 is selected instead of the clock pulse CP6 for the E7 note, so a waveform with a cycle one octave lower is generated. Similarly, for other note names, waveforms with a period approximating equal temperament are generated according to the number of ``1'' in each note name series in directory memo 1 river 07, and for octave relationships, a predetermined clock pulse is generated. By selecting , all scale tones can be obtained by changing the period to 2 times, 4 times, and 8 times.As shown in the column (f) of Table 1, each note (F note) All pitch deviations from the average rate scale for notes (from notes F to E) are within ±2 cents, but if the pitch of each note (from notes F to E) is changed from this state to +
If you set it 0.5 cent higher, each note (F note ~
The pitch deviation of the E note) from the average rate scale is shown in Table 1 (G).
As shown in the column, it is approximately within ±1 cent. This can be easily achieved by changing the frequency of master oscillator 105. In addition, for F sound, the number of sample points of the waveform is 1 period 1
While the number of points is 28, the number of points for the E note is only about 68 in one cycle. However, the number of samples of 68 points is sufficient to form a musical sound waveform, and the difference in audibility as a musical sound is not a problem. Embodiment FIG. 5 shows another embodiment of the present invention, and shows the configuration of an electronic musical instrument that can produce multiple tones, unlike the single-tone electronic musical instrument of Embodiment 1.

This embodiment also includes a directory memory 505 and a waveform memory 507 similar to those described in the first embodiment.

However, in order to perform multiple operations on the directory memory 505 and waveform memory 507 in a time-division manner,
It includes a register 502 having stages for the maximum number of simultaneous sounds (for example, 12 notes), and a memory access controller 504 that controls addresses in a time-sharing manner. The outline of the configuration and operation of this embodiment will be clarified below while explaining the main components.

The shift register 502 has stages for the maximum number of sounds, and each stage has a busy bit memory (Busybit memory).
memOry), octave code memory (0cta
vec0demem0ry), note code memory (N
It consists of five memories: OtecOdememOry), time count memory (TimecOuntmemOry), and address memory (AddressmemOry). Regarding each memory of such register 502, for example, Japanese Patent Application No. 5080308,
A similar sound source register is described in Japanese Patent Application No. 50-84205, and will be briefly described below. In addition, in FIG. 5, the final stage of the shift register 502 is shown with reference numeral 503 inside the memory access controller 504 for ease of explanation.
This is not an essential problem. In short, data from the various types of memories mentioned above need only be sent to the controller 504. The busy bit BS is displayed as 1 bit and indicates whether the relevant stage is assigned to the key that is currently being sounded.

This output also controls the gate 508 following the waveform memory 507, so that the busy bit BS is set to S1'' (0N
1 (that is, the currently sounding key is assigned), the data in the waveform memory 507 is sent and the busy bit B is
If S is 'O'' (0FF, that is, there is no assignment to the relevant stage), data will not be sent.Octave code 0C and note code NC are each 3.
It is displayed in bits and 4 bits and indicates the code of the assigned key. Among these, the note code NC is read from the direct memory 505 via the selector 506. The time count bit TC is displayed as 7 bits and has a function equivalent to the octave clock generator 104 described in the embodiment of FIG. 3, and is used to determine whether or not to update the address of the memory. use As will be described later, this time count bit TC counts up by 1 in each cycle of the clock pulse that drives the memory access controller 504 in the memory access controller 504, and sets 1 to the signal Q1 obtained by decoding the octave code and the time count output. It is cleared when the added signal Q2 matches. Address memory AM consists of 10 bits and indicates the memory address to be read next time. Whether or not this address bit is updated as it passes through controller 504 is determined according to the contents of time count bit TC and octave code 0C. The shift register 502 having the contents as described above is controlled by the key assigner 501 to assign and send keys to each stage during sound generation.

The main functions in the memory access controller 504 are a decoder 510, a comparator 512, and two selectors 513 and 514.

The decoder 510 reads out the octave code 0C as a binary coded decimal signal shown in Table 5, for example. The signal Q1 read from the decoder 510 is compared in the comparator 512 with the output Q2 of the adder 511, which is the time count output plus "1".

This comparator 512 controls the selectors 513 and 514 by driving the drive signal Q3 if the values of the output signal Q1 and the output signal Q2 match.
of the inputs of the selectors 513 and 514, the data signals S2 and T2 on the right side in the drawing are sent to the key assigner 50.
1, and when the values of the signals Ql and Q2 do not match, the data signals Sl and Tl on the left side in the drawing among the inputs of the respective selectors 513 and 514 are transferred to the key assigner 501. Here, the data signal S1 corresponds to the contents of the time count memory TC, which increases by one count per cycle of a clock pulse (not shown) that drives the key assigner 501, shift register 502, and memory access controller 504.
The data signal S2 has a content in which [1] is added by the adder 511, and the data signal S2 is a signal in which the content separately given to update the data is all "0" (hereinafter referred to as an all-zero signal).
Clear time count memory TC. Further, the data signal T1 is an address signal Q4 for addressing the waveform memory 507, and the data signal T2 is an address signal Q4 for addressing the waveform memory 507.
The directory memory 505 is addressed with the current address Q4 for reading 7, the content Q5 of the directory memory 505 obtained via the selector 506 and the current address Q4 are added by the adder 515, and "1" is added. It has the following content. That is, the adder 515 outputs the data signal T2 by the same operation as the adder 108 described in the first embodiment (FIG. 3). As is clear from the above explanation, when the inputs Ql and Q2 of the comparator 512 match, the selector 513 outputs an all-zero signal S2 for each clock cycle, and the contents of the time count memory TC are output from the selector 513. is also "O". On the other hand, in this case, the output of the adder 515 is fed back from the selector 514 side via the key assigner 501 to the address memory AM of the final stage 503 of the shift register 502 and is stored therein. Since such feedback is performed every clock cycle, the directory memory 505 is addressed and the data in the waveform memory 507 is output in the same manner as described in the first embodiment. Also,
If the inputs Q, , Q2 of the comparator 512 do not match,
The output Q2 of the adder 511 increases by 1 every cycle of the clock, and the output signal Q2 is fed back to the time count memory TC in the final stage 503 of the register 502 until it matches the output Q1 of the decoder 510. During this time, selector 514 continues to output the same address value of address memory AM. Therefore, when the octave code shown in Table 5 is (001), the octave code is (001).
00), double the time count is required,
The waveform read from the waveform memory 507 has twice the period, and a tone one octave lower is produced. Similarly, the fifth
As the octave code in the table progresses from (010) to (110), the musical tones produced go down one octave at a time.
The above operation is shown in the parallel flowchart of FIG. The configuration and operation of the second embodiment of the present invention have been explained above, and next, as a specific example,
The manner in which the 'F5' and 'E7' tones are pressed on the keyboard 500 and these musical tones are read from the waveform memory 507 will be described.

Note that the mutual relationships among octave chords, note chords, and musical tone frequencies are indicated by the same symbols as explained in Example 1 (for example, see Tables 3 and 4). (b) When the F6 sound is pressed, the key assigner 501 changes to the shift register 50 depending on the key pressed.
Empty stage in 2 (busy bit BS is 0f)
, and write the data in Table 6 below into each memory of the stage.

When the data in Table 6 is sequentially shifted and reaches the final stage 503, the contents of the address O of the waveform memory 507 are outputted by the output Q4 of the address memory AM.

At this time, the decoder 510 output Q1 is (0000001
), and the output Q2 of the adder 511 is (00000
01), and the inputs of the comparator 512 match.

Therefore, the selector 513 sends the all zero signal S2 to the time count memory TC. On the other hand, note code NC
The selector 506 is driven by the output, and note name series number 11 in the directory memory 505 is selected.

Therefore, the selector 514 uses the output Q2 of the comparator 512 to field back the output T2 (existing address+directory value+1) of the adder 515 to the address memory AM, and uses it as a new address. The contents of the final stage 503 at this time are as shown in Table 7 below. Therefore, the contents of address 1 of waveform memory 507 are output by output Q4 (=1) of address memory AM.

In this way, the contents of the 1024 addresses of note series number 11 in the directory memory 505 are all set to 0.
'', the address memory output for each clock is [
1'' at a time, and the contents of all addresses in the waveform memory 507 are sequentially read out.

In this way, the musical sound waveform of the F6 note similar to that described in the first embodiment can be formed. 1) When the F5 note is pressed, the contents stored in the empty stage according to the key press are as shown in Table 8 below.

Therefore, when the data in Table 8 is sequentially shifted and reaches the final stage, the contents of address O of waveform memory 507 are outputted by output Q4 of address memory AM.

At this time, the output Q1 of the decoder 510 is (000001
0), and the output of the adder 511 is (000000
1), and the inputs of comparator 512 do not match.

Therefore, the selector 513 outputs the output S1 of the adder 511 (
=Q2) is fed back to the time count memory TC. On the other hand, the selector 514 feeds back the output T1 (=Q4: address 0) of the address memory AM to the address memory AM. Note that the selector 514 receives the input signal T
2 is not selected, the contents of adder 515 are not output. The contents of the final stage 503 at this time are as shown in Table 9 below. These data are sent to the memory access controller 5.
04, the output Q1 of the decoder 510 is (0
000010), and the output of adder 511 is also (0
000010), and the inputs of comparator 512 match.

Therefore, the selector 513 sends the all zero signal S2 to the time count memory TC. Below, in the same way, the final stage 5
Each time the data of 03 passes between the memory access controller 504 and the key assigner 501 twice, the contents of the address memory AM increase by S11'', and the contents of the waveform memory 50
7 outputs the contents of the same address twice.

Therefore, in the case of the F5 note, a waveform having a period twice as long as that of the F6 note is formed. When the E7 note is pressed, the contents that are first stored in the empty stage by pressing the key are as shown in Table 10 below.

In this case, as in the case of the F6 sound, the contents of the address memory AM are updated every time data 7 passes through the memory access controller 504.

However, the note name series number 0 in the directory memory 505 corresponding to the E note contains 481 S1'! Therefore, when the contents of the address in the directory memory 505 are SO'', the contents of the address memory AM are increased by 1'', and when the contents of the address in the directory memory 505 are 1'', the contents of the address memory AM are increased by 1''. Increase by 2″. The waveform memory 507 is addressed using the address memory AM updated in this manner, and the waveform of the E7 sound is read out. By the way, when the E1 note is pressed, the octave code of the E1 note is (110), so every time the data in the shift register 502 passes through the memory access controller 504 32 times, the contents of the address memory AM are changed. Updated.

The waveform obtained in this way is 32 times (-2
6). Similarly, according to this embodiment, musical sound waveforms with a period approximating equal temperament can be generated for other scales by operating the directory memory 505 and memory access controller 504.

Therefore, the key assigner 501, the shift register 502,
By appropriately selecting the cycle of the clock that drives the memory access controller 504, etc., it is possible to simultaneously produce multiple tones. In the first and second embodiments described above, the contents of the directory memory are written using 0'' and 1'', with each memory element being 1 bit, but other writing methods may be used.

For example, each 2 bits are ゞO'' ゞ1〃, S2'', S
With 3〃 as the entered numerical value, two addresses may be skipped in the case of も2'', and three addresses may be skipped in the case of S3''. In short, the same result can be obtained if the number of valid addresses in the waveform memory between each pitch name matches the relative approximation period in column (d) of Table 1. Furthermore, in each of the above embodiments, it has been explained that the necessary musical sound waveform itself is stored in the waveform memory, but it is also possible to prepare a sine wave, a triangular wave, etc. in the waveform memory, and use the output as the component of the musical tone. A musical tone may be constructed by transforming or superimposing these outputs.

As mentioned above, in this specification, the constituent elements of such musical tones are simply referred to as "musical tones." According to the present invention, as described above, the address for the waveform memory is used to read the memory that stores the value related to the difference from the address to be read next time, and the current address and the difference are added. By using a new address, it is possible to provide a high-performance electronic musical instrument that can generate complex periodic waveforms with a simple configuration and can also generate multiple tones.

Furthermore, since the electronic musical instrument according to the present invention can be implemented as an LSI, it is effective in achieving miniaturization and cost reduction.

[Brief explanation of the drawing]

1 and 2 are system diagrams for explaining a conventional waveform memory addressing method, FIG. 3 is a system diagram of a first embodiment of this invention, and FIG. 4 is a system diagram according to an embodiment of this invention. FIG. 5 is a system diagram of the second embodiment of the present invention.
FIG. 6 is a parallel flowchart illustrating the operation of the embodiment shown in FIG. 101,500...Keyboard, 102...
Key address decoder, 103, 106...゜゜゜゜selector, 104...Octave clock generator, 105...Master oscillator, 107,505...
...Directory memory, 108,511,51
5... Adder, 109, 111, 508...
... Gate, 110 ... Address register, 112, 507 ... Waveform memory, 501 ...
-...Key assigner, 502...Shift register, 503...Final stage of register 502, 5
04...Memory access controller, 506
, 513, 514...Selector, 507...
... Waveform memory, 510 ... Decoder, 51
2.゜゜... Upper mold.

Claims (1)

[Claims] 1 A waveform memory that stores each function value related to a musical sound waveform at each address, and corresponding to each address of this waveform memory, a value related to the difference between the address and the address to be read next time is stored for each note name. a directory memory for storing, and a reading means for reading the stored contents of the waveform memory in accordance with the current value of the address signal, and reading out the directory memory in accordance with the current value of the address signal and the note name of the musical tone to be generated. and calculating the next current value of the address signal from the current value of the address signal and the value related to the difference read from the directory memory corresponding to this current value, and transmitting this to the reading means. an address signal calculation means for supplying an address signal, the electronic musical instrument is configured to generate musical tones based on the function value read from the waveform memory.