JPS5922247B2 - Electronic circuit using field effect semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic circuit for a field effect semiconductor device, and particularly to an integrated circuit (MOS-IC) using field effect transistors formed on a common semiconductor substrate.

In order to operate at high speed, a MOS-IC usually requires an external power supply of a high voltage source of about +7 to 15V and a power supply of about +5V for coupling with peripheral circuits.

MOS-
The IC needs to be supplied with a single power supply of a low voltage of about +5V from the outside and to be operated at high speed. As described in Japanese Patent Application No. 48-16325, the prior art for realizing this method is to provide a power supply circuit in a MOS-IC separate from the original circuit function, and use this power supply circuit to supply external power. It generates a voltage higher than the power supply and realizes high-speed circuit functions. To increase the speed of circuit functions within a MOS-IC, it is necessary to generate a high voltage and at the same time to stabilize the voltage against transient currents accompanying the increase in the number of components within the MOS-IC. Therefore, an object of the present invention is to provide an internal power supply electronic circuit (power supply circuit) within a MOS-IC with a stable power supply voltage.

In the power supply circuit of the present invention, an inverter circuit is connected to two terminals VDD and GND of a power supply supplied from the outside, one terminal of a capacitive element Cs is coupled to the output terminal of the inverter circuit, and the other terminal of the capacitive element is connected to the output terminal of the inverter circuit. It is coupled to the output terminal of a charge pump type element Qc, provides a drive signal to the input terminal of the charge pump type element and the input terminal of the inverter circuit, and produces another power supply output VGG from the output terminal of the charge pump type element. It is something.

In the electronic circuit of the present invention, a charge pump type element is coupled to the output of an inverter circuit via a capacitive element, and a DC voltage output can be obtained from this coupling point.

This output boosts the voltage charged by the charge pump type element to the capacitive element by the switching action of the inverter circuit.The charge pump type element is a good current source element and is used to charge and discharge the accumulated charge in the capacitive element. Since it is efficient against voltage, it has extremely high voltage stability. Next, in order to better understand the characteristics of the present invention, embodiments of the present invention will be described using figures.

FIG. 1 is a circuit diagram of a first embodiment of the invention. In this embodiment, load transistors QL, . It has a bootstrap type inverter circuit including a capacitive element CB, and a drive transistor QD. The bootstrap type inverter circuit is cited in the specification of Japanese Patent Application No. 16325/1982, so the explanation will be omitted, but when a 100 KHz repetitive pulse drive signal φ is input to the gate electrode of the drive transistor QDl, +5V- is applied to the output terminal A. Generates an inverted pulse of 0V. One end of the capacitive element Cs is connected to this output end, and the other end is coupled to the output end B of the charge pump type element Qc. The gate electrode of the charge pump type element QCl is driven by the same drive signal φ as the inverter circuit. This embodiment includes another charge pump type element QC2 as an auxiliary circuit.
and a coupling transistor QT.

The charge pump type element QC2 connects the output to the reference terminal GND.
and connect the gate electrode to the drive signal φ. The transistors QLl, QL2, QD, QT and charge pump type elements QCl, QC2 of this embodiment are all N-channel field effect semiconductor devices, and since they share the same P-type semiconductor region as a base region, this base region The potential VSB of is biased negatively by the operation of another charge pump type element QC2. That is, the substrate potential is generated internally by driving another charge pump type element QC2, rather than by an externally supplied voltage. The coupling transistor QT has a gate electrode and a drain connected to an output terminal B of a charge pump type element Qc for high voltage generation, and a source connected to a high voltage output line V. Combines with G. A capacitive element C including parasitic capacitance such as inter-wiring capacitance and junction capacitance is provided between the output line VGG and the base region and the reference terminal GND. , CSB are provided for voltage stabilization. According to this embodiment, the inverter circuit and one charge pump type element QCl
Since the same drive signal φ is applied to both and the two output terminals A and B are coupled by the capacitive element Cs, the drive signal φ is +5
When the potential is as high as V, the capacitive element Cs is charged to about +4V.

That is, when a gate pulse (drive signal 5V) is applied to the charge pump type element QCl, electrons are extracted from the N-type region to the gate region, and when the pulse voltage is 0V, some of the extracted electrons are released to the semiconductor substrate side. The potential of the N-type region increases (charge pump effect).
Now, when the charge pump type element Qc, functions as a capacitive element, its threshold voltage can be considered to be about 1V, so while point A is at 0V potential, point B rises to about 5-1 = 4V. do. Also, at the same time, the N type region of QC7ll is connected to GND.
Since the charge pump element is forced to a level (0V), electrons escape to the substrate, thereby lowering the substrate potential in a negative direction. At this time, the potential at output terminal B is +4V1
Output terminal A is 0V. When the drive signal switches to a low potential of 0V, the drive transistor QD and the charge pump type element QCl become 11op5, and the output terminal A becomes the load transistor Q.
L2 causes the voltage to rise to +5, and the output terminal B is also simultaneously pushed up and rises to +9V, producing a high voltage output.
to charge. Since the coupling transistor QT is in the 11-of-11 state when the capacitive element C2 is charged, when the drive signal is given in a repetitive waveform such as a pulse or a pulsating current, the output line VGG
A stable DC high voltage output can be obtained. A charge pump type device is a current source device, and its charging efficiency increases against overload, so the output voltage stability is high. Further, in this embodiment, since the other charge pump type element QC2 generates a body bias by the drive signal φ, it is possible to reduce the voltage drop of the coupling transistor QT and to improve the efficiency of the output characteristics of the charge pump type element QC. can.

The reason for this is that the charge pump type element raises the potential of the N type region in a positive direction relative to the substrate potential.
Forcing D biases the substrate potential negatively. M.O.S.
The gate threshold voltage VT of the transistor is the base potential (V
suB), but since this increase ΔVT is proportional to f1, it gradually becomes smaller. Therefore, the voltage drop of the coupling transistor QT of this embodiment using the body bias is reduced. As mentioned above, according to this embodiment, +5V
A high voltage of +8.5 to 9V and a body bias of about -4V can be generated from the external power supply of MOS-1.
The MOS-1C can be housed together with other functional circuits to operate the functional circuits at high speed, and the MOS-1C can only be supplied with a single power source externally. FIG. 2 is a block diagram of a second embodiment of the invention.

This embodiment includes a self-excited oscillation circuit 202, a necessary power supply circuit 203, and a functional circuit 204 inside the MOS-1C, and connects two external radio wave terminals VDD, GND and input/output signal terminals 1n, 0ut to external terminals. have as. The input/output signal terminals 1n and 0ut are coupled to the functional circuit 204 and undergo predetermined signal processing. The self-excited oscillation circuit 201 oscillates a pulse drive signal φ by being supplied with an external power supply VDD. This drive signal drives the power supply circuit 203 similar to the previous embodiment, and the high voltage VGG
and body bias VSB. These voltages are applied to the functional circuit 204 together with an external power supply, and the circuit operation here can be made faster and more efficient. This embodiment not only reduces the number of lead-out terminals of the power supply system from the MOS-1C as in the previous embodiment, but also generates drive signals internally, thereby improving the usability of the MOS-1C. As the self-excited oscillator circuit, a link-on-letter circuit, an unstable multi-pipe radar circuit, a locking oscillator circuit, etc. are used. FIG. 3 is a circuit diagram of still another embodiment of the invention.

In this embodiment, the external power supply has two terminals V. A power terminal of an inverter circuit consisting of a load transistor QL3 and a drive transistor QD2 is connected to D and GND, one end of a capacitive element C's is connected to its output terminal N, and the gate electrode of the other end is connected to the gate electrode of the drive transistor. The output terminal B' of the charge pump type element QC3 is connected to the output terminal B' of the charge pump type element QC3. The gate electrode and drain of the coupling transistor QT2 are coupled to this output terminal, and the source is connected to the high voltage output line VGG. Output line V. A capacitor C7O exists parasitically between G and the reference terminal GND. The base regions of each transistor QL3, QO2, QT2 and charge pump type element QC3 are common and connected to a reference terminal GND, although not shown in the figure. In this embodiment, mutually complementary drive signals φ and φ are supplied to the gate electrodes of the load transistor QL3 and the drive transistor QD2 of the inverter circuit.

Charging of the capacitive element C7s occurs when one drive signal φ is at a high level, and when the other drive signal W is at a high level, the load transistor QL3 is activated to provide a high voltage output VGG. In this embodiment, since the load transistor QL3 is complementary to the drive transistor and is turned on by the other drive signal, the output generation efficiency is high and the power consumption of the inverter circuit can be reduced. . Although the embodiments of the present invention have been described above, the inverter circuits in the embodiments are not limited to those using field effect transistors, and it is also a matter of design that they may be replaced with inverter circuits using other active elements such as bipolar transistors. It is possible.

Further, the drive signals for the charge pump type element and the capacitive element are not necessarily the same, and the charge pump type element may be driven with a faster pulse than the drive transistor. Further, the coupling transistor may be a diode, and this circuit connection is not essential when an instantaneous value is required.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a first embodiment of the invention, FIG. 2 is a circuit diagram of a second embodiment of the invention, and FIG. 3 is a circuit diagram of a third embodiment of the invention.

Claims (1)

[Claims] 1. One terminal of a capacitive element is coupled to the output terminal of an inverter circuit that operates with an externally supplied power supply, the other terminal of the capacitive element is coupled to the output terminal of a charge pump type element, and the output terminal of the charge pump type element is An electronic circuit using a field effect semiconductor device that applies a drive signal to an input terminal and an input terminal of the inverter circuit, and generates a voltage output from an output terminal of the charge pump type element having a value different from that of the power supply.