JPS5923480B2 - Dummy pattern for inner layer of multilayer printed board - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a dummy pattern that can increase the interconnection capacitance of the outer layer of a multilayer printed board.

Generally, multilayer printed boards are known for mounting electronic components constituting electronic circuits and for interconnecting the electronic components. A multilayer printed board has printed wiring (hereinafter referred to as a pattern) on both sides with an insulating layer in between. FIGS. 1 and 2 illustrate the outer and inner layers, respectively, of a conventional multilayer printed board. As shown in FIG. 1, the multilayer printed board 1 has a connector part 2, a mounting part 3 occupied by electronic components, patterns, and through holes, and when the multilayer printed board 1 is inserted or removed, it is guided by guide grooves (not shown) and the multilayer It is formed from a mounting prohibition section 4 in which information specific to the printed board is written.

The connector section 2 is where input/output signals 6 are exchanged with the outside to the multilayer printed board 1. The mounting section 3 also includes a pattern (not shown) and a through hole 7 for connecting the leads of the electronic components mounted therein.
and is provided. The through hole 7 is arbitrarily arranged, for example, so as to be always located above the restricted 1/10 inch. Normally, by arranging through holes under the above constraints, even if the patterns formed on multiple multilayer printed boards are different, commonality in design and manufacturing can be achieved, and the aim is to reduce man-hours. It is frequently used by those skilled in the art. Further, the mounting prohibition section 4 is provided with a recording section 5 for recording information unique to each multilayer printed board, such as the results of adjustments, tests, and inspections in the manufacturing process. FIG. 2 shows the top surface of the inner layer of the multilayer printed board 1 shown in FIG. 1, in which the through holes of both are correspondingly overlapped under the plane of the outer layer.

In the multilayer printed board 1, which layer the signal pattern or the power supply pattern is placed on can be selected at the time of pattern design of the multilayer printed board, but in the figure, the outer layer 1a of the multilayer printed board is the signal pattern, and the multilayer printed A case is shown in which the inner layer 1b of the board is a power supply pattern. In general, when the electronic component incorporated in the multilayer printed circuit board 1 is a high-speed switching element such as an integrated circuit, the power supply pattern is made of an inner layer with one insulating layer sandwiched in between so as to have a low impedance in order to obtain good switching characteristics. Power system patterns are formed on both sides.

Another reason for forming the power supply pattern on the inner layer is to provide convenience, such as when the signal pattern is provided on the outer layer 1a of the multilayer printed board, the pattern can be easily changed. As described above, when a signal system pattern is provided on the outer layer 1a and a power system pattern is provided on the inner layer 1b, in order to insulate the through hole connecting the outer layers from the pattern on the inner layer 1b, the through hole in the inner layer pattern is A through-hole insulating hole 7a is formed by forming a peeled-off portion of an inner layer pattern that goes around the inner layer pattern.

Since the through-hole insulating holes 7a are formed under the above-mentioned restrictions on through-hole arrangement, they are arranged in a matrix on almost the entire surface of the inner layer pattern, for example, on a 1/10 inch grid. Normally, the multilayer printed circuit board 1 has as large a circuit density per unit area as possible in the mounting section 3,
If the multilayer printed board 1 can be miniaturized, the material cost of the multilayer printed board 1 will be reduced, so it is desirable to have a shape that is equal to or almost equal to the area occupied by the electronic components to be mounted.

However, if the circuit density is increased, a problem arises in that the electronic component leads are blocked by through-holes into which they are inserted, making it impossible to obtain a pattern clearance required for interconnecting the electronic components. As a solution to this problem, there is a method that does not rely only on patterns but mixes a small number of three-dimensional wiring to completely interconnect electronic components. FIG. 3 shows a specific example of using three-dimensional wiring. As shown in the figure, it is allowed to connect the input terminal 8 and the load terminal 8a and the output terminal 9 and the drive source terminal 9a located in the multilayer printed board 1 with the wiring 10, and the required number of the wiring 10 is If it is possible to compensate for all the interconnections that are not connected by patterns with 10 or less wires per multilayer printed board, it is possible to avoid increasing the area of the multilayer printed board 1 by giving up interconnections using all patterns. However, with this three-dimensional wiring method, not only is the reliability at the connection points at both ends of the three-dimensional wiring significantly lower compared to a complete pattern connection, but also a special It requires some ingenuity, and the appearance is not at all desirable.

In addition, as another method, instead of using the power supply system pattern alone on the inner layer 1b of the multilayer printed board, it is also possible to mix a signal system pattern in one part and use it as a substitute for the three-dimensional wiring part.

FIG. 4 shows a specific example that meets the above objective.

However, as is clear from the figure, the originally arranged power supply pattern 12 is replaced by the signal pattern 11 (in the inner layer 1b).
Hereinafter, this will be referred to as a dummy pattern. ) and the insulating gap 11a. between the dummy pattern 11. The land pattern is cut off by the through-hole insulating hole 7a and becomes a scattered land pattern, so that although it is a power supply system pattern, it no longer functions as a power supply. The present invention was created in view of the above-mentioned drawbacks of the prior art and to eliminate them. That is, an object of the present invention is to substantially increase the pattern arrangement capacity of the mounting section of a multilayer printed board. The next objective is to improve the noise resistance of the added pattern, which corresponds to the conventional three-dimensional wiring part, and at the same time to make the reliability of the connection part equivalent to that in the normal mounting part. Therefore, the present invention provides a multilayer printed board comprising an outer layer in which a mounting part and a mounting prohibited part are partitioned, and an inner layer having a pattern with through-hole insulating holes arranged in a matrix. a dummy pattern, which is connected to the through-hole of the outer layer and is provided on the plane of the inner layer that overlaps with the mounting prohibited portion, independently of the inner layer pattern and capable of increasing wiring capacitance between the mounting portions of the outer layer; This paper focuses on dummy patterns for printed circuit boards.

Hereinafter, embodiments of the present invention will be described in detail with reference to FIGS. 5 to 7.

In these drawings, the same symbols as those shown in FIGS. 1 to 4 mean the same thing or the same content. FIG. 5 shows the inner layer 1b of the multilayer printed board.

In the figure, 11 is a dummy pattern, and dummy pattern 11
is located in the mounting prohibited portion 4, and both ends thereof are necessarily connected to the through hole 7 provided near the mounting prohibited portion of the mounting portion 3. Although not shown, electronic components, such as integrated circuits, are arranged and mounted in the mounting section 3. Then, at any position on the outer layer except for the position where the through hole 7 is provided for inserting the electronic component lead, connecting the electronic component and the pattern, or connecting the pattern between different layers. A signal pattern is provided. The pattern on this outer layer 1a is always arranged between the through holes 7. The multilayer printed board 1 receives various signals and various power sources through the connector section 2, and vice versa. Therefore, the mounting section 3 located near the connector section 2 tends to be particularly crowded with the above-mentioned input/output signal system pattern, and the signal system for connection with the electronic component located at the farthest point from the connector section 2 tends to become overcrowded. Patterns are said to be the most difficult to arrange. For this reason, electronic components that require pattern placement with the connector section 2 are usually placed close to the connector section 2, while electronic components that require mutual wiring within the same mounting section 3 and the connector section 2
A pattern that requires an extremely small number of patterns is placed at an apogee from the connector portion 2. From the form of pattern arrangement on the outer layer 1a described above, the dummy pattern 11 of the present invention has great value when it is arranged side by side with a normal signal pattern from the nearest point to the farthest point of the connector part 2. I can say that there is. In addition, the dummy pattern 11 of the present invention can also be provided in the mounting prohibited part 4 that exists at the apogee in parallel with the connector part 2. Furthermore, it is also possible to form one dummy pattern by connecting one end of the former dummy pattern to one end of the latter dummy pattern located at the shortest position. FIG. 6 is a perspective view of the main parts in order to more clearly show the arrangement of the dummy patterns of the present invention.

In the figure, the multilayer printed board 1 has an outer layer 1a located at the top.
, an inner layer 1b in which the through holes of both layers correspond to each other under the plane of the outer layer 1a, and an inner layer 1b in which the through holes 7 of both the layers correspond to each other and overlap with each other below the plane of the inner layer 1b.
It has a four-layer structure consisting of an outer layer 1f which corresponds to the inner layer 1c and overlaps with the inner layer 1c in the same manner as described above, as shown in the figure, although the number of inner layers can be increased as needed. Also in FIG. 6, the outer layers 1a and 1f are used as signal system patterns, and the inner layers 1b and 1c are used as power supply system patterns. An electronic component, for example 1C in the figure, is provided on the outer layer 1a of the above-mentioned multilayer printed board.
When an integrated circuit marked with is placed in the mounting section 3 and no pattern can be placed in the length direction indicated by L, conventionally the pattern is placed using three-dimensional wiring. However, in the present invention, it is possible to send and receive various signals from the through holes 7 indicated by the input terminal 8 and output terminal 9 of the mounting section 3 to the load terminal 8a1 and the drive source terminal 9a via the dummy patterns 11 respectively. . In this way, a plurality of dummy patterns are arranged by utilizing the pattern surface of the inner layer formed in the band shape of the mounting inhibiting portion 4. FIG. 7 is a sectional view of a main part showing a dummy pattern arrangement structure that further improves suppression of induced noise between dummy patterns according to the present invention.

In the figure, the upper surface with the insulator 12 interposed therebetween forms one side of the power system pattern, that is, the ground line 13, and the bottom surface represents the inner layer pattern that forms the other side of the power system pattern, that is, the positive or negative voltage line 14. There is. and,
The dummy patterns 11 of the present invention are alternately arranged in parallel with any one of the power supply system inner layer patterns 13 and 14, and the dummy patterns 11 facing each other on the surfaces of the inner layers 1b and 1c are arranged in a staggered manner. They are arranged so that they do not face each other at the shortest distance across the insulating layer 12.

In this way, interference between the dummy patterns 11 is suppressed, and since each of the dummy patterns is shielded by the power supply pattern, the noise characteristics can be improved. As a result, the allowable length of the dummy pattern is much longer than that allowed for normal signal patterns without these anti-noise measures, making it possible to form a signal pattern path without any interference. As explained above, according to the present invention, the mounting-prohibited area at the outer periphery of a multilayer printed circuit board is filled with a single inner layer pattern or has no inner layer pattern at all, and can be replaced by a conventional power supply pattern, etc. Since a dummy pattern is provided that is independent of the inner layer pattern of the connector, it is easy to connect electronic components located at apogee from the connector part using a pattern, which was difficult to arrange even on multilayer printed boards with the same mounting area. Not only can this be done, but the pattern placement capacity has also been increased, and the noise characteristics of the dummy patterns themselves have been improved. This method has the remarkable effect of greatly improving pattern arrangement on a multilayer printed board because it does not reduce reliability or increase the mounting area.

[Brief explanation of the drawing]

FIG. 1 is a plan view illustrating the outer layer of a conventional multilayer printed board, and FIG. 2 is a plan view illustrating the inner layer of the conventional multilayer printed board. FIG. 3 is a plan view illustrating three-dimensional wiring in a conventional multilayer printed board. FIG. 4 is an explanatory diagram when signal patterns are arranged in the inner layer patterns (power supply system) of a conventional multilayer printed board. FIG. 5 is a plan view illustrating how signal patterns are provided on the inner layer of the multilayer printed board of the present invention. FIG. 6 is a perspective view of the main parts of the multilayer printed board of the present invention. FIG. 7 is a sectional view of the main part of the present invention. 1...Multilayer printed board, 1a,
1f...Multilayer printed board outer layer, 1b, 1c...
...Multilayer printed board inner layer, 2...Connector section, 3...Mounting section, 4...Mounting prohibited section, 5...Memorization section , 6... input/output signal,
7...Through hole, 7a...Through hole insulation hole, 11...Dummy pattern.

Claims (1)

[Claims] 1. In a multilayer printed board consisting of an outer layer in which a mounting part and a mounting prohibited part are partitioned, and an inner layer having a power system pattern with a matrix of through-hole insulation holes common to multiple multilayer printed boards, the mounting part A through hole is provided near the mounting prohibited area, a dummy pattern is provided on the inner layer plane that overlaps with the mounting prohibited area, independent of the power system pattern, and this dummy pattern and the through hole are connected to connect the mounting area to each other. A dummy pattern for a multilayer printed board that is characterized by its ability to increase wiring capacity.