JPS5924544B2 - Manufacturing method for chip carriers for integrated circuits - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a microcircuit corresponding to a finger lead for drawing out leads to the outside from a large number of electrodes of a semiconductor pellet constituting an integrated circuit, for example, a semiconductor integrated circuit, and an external electrode from the finger lead. By freely selecting the thickness of the lead frame with the desired pattern, it is constructed from a single conductive metal plate on top of a tape such as polyimide film, and is simultaneously bonded at multiple points with one alignment to ensure dimensional stability. This invention relates to a method for manufacturing a chip carrier for integrated circuits, which aims to significantly improve cost reduction, lead strength, and connection reliability through integration, as well as greatly contribute to process establishment and stability through automation.

As shown in Figures 1 and 2, for example, 125μ has chemical resistance, heat resistance, and appropriate elasticity and flexibility.
A heat-resistant adhesive 2 with a thickness of about 13 μm is applied to a polyimide film 1 of about
A coverlay composed of a predetermined slit width of 4
(generally 35m7 FI width), and then as shown in Fig. 3, there is a sprocket hole 5 that serves as a guide for the continuous feeding process and serves as the basis for positioning, and a semiconductor integrated circuit chip (hereinafter referred to as an IC chip). ) is formed by a known method such as chemical or mechanical treatment to continuously fix the device holes 6, and further, as shown in FIG. A foil (generally 35 μm thick) 1 is laminated continuously at the center using, for example, a roll press method.

At this time, a method is used in which the protective film 3 previously applied on the heat-resistant adhesive 2 is removed to prevent dust and protect the B-stage adhesive before bonding the copper foil 7. The greatest advantage of the chip carrier method is In the continuous feeding process, the so-called sprocket hole 5 is the basis for automatically aligning the sprocket hole 5 in one go based on the accuracy of the sprocket hole 5.
At present, mechanical processing is the mainstream method for perforation, but problems with this mechanical processing are clear in Figures 1 and 2. Because it forms a three-layer composite film,
Each material has a different viscoelastic coefficient, and exhibits complex behavior during drilling.

Next, the desired precision copper circuit patterns shown in FIGS. 5, 6, and 7 are formed using photoresist technology and etching technology. This system is characterized in that a finger-shaped lead 8 is projected into the device hole 6 as shown in FIG. 7, and thereby the IC chip 9 is aligned face-up and bonded. The thickness of the copper foil 7 is generally 35 microns (1 ounce), and the thickness of the finger lead 8 is
There is also a design with a width of 50 microns at the tip of the
Even with a line width of 0 microns, it is easily deformed by a small external force, and bending, twisting, etc. are likely to occur. In addition, the process includes resist coating, development, etching, resist peeling, plating, bonding, etc. under various conditions, and washing and drying are frequently repeated. For this reason, the carrier tape of the polyimide film 1 has problems in its dimensional stability against temperature, humidity, tension, etc. during movement during various processes, and in particular, dimensional changes in the sprocket holes 5. After bonding the IC chip 9 to the finger leads 8, ie, so-called inner lead bonding, the process moves on to an outer lead bonding process in which actual external terminals are connected to the so-called lead frame. Generally, a thermocompression bonding method or a solder welding method is used for outer bonding of the chip 9. This outer lead bonding is also I
From separation of the C chip 9 to bonding, feeding and positioning are performed using the sprocket hole 5 of the tape. In this way, the lead frame needs to have a certain thickness (for example, 250 μm) in order to maintain mechanical strength.On the other hand, the finger leads 8 to which the 1C chip 9 is directly bonded are formed by etching, so Compared to side etching, in which etching progresses, the thickness of the copper foil is required to be thinner in order to make the pitch at the tip smaller. In order to configure the structure further, there will be a big restriction on the pitch of the finger leads 8.
Mechanical connections between lead frames and finger leads are unavoidable in order to construct precision patterns with small pitches.

The present invention relates to a method for manufacturing a chip carrier for integrated circuits that eliminates the above-mentioned conventional drawbacks and ensures strict dimensional accuracy in each step.

An embodiment of the chip carrier according to the present invention will be described below with reference to FIGS. 8 and 9.

The electrode lead 10 according to the present invention is directly connected to the IC chip 11.
The finger lead 12 that is dropped and the lead frame 13 are integrated, and a sprocket hole 14 for feeding and positioning the carrier is also formed in the lead frame 13. The finger lead 12 protruding into the device hole has a thin wall thickness of 35 microns, and the portion of the lead frame 13 that requires mechanical strength has a thickness of 250 microns. The electrode lead 10 formed from a single 250 micron thick copper plate has a device hole and a portion that will become an external terminal of the lead frame 13, that is, a lead portion that will not be molded when the integrated circuit is packaged, and a sprocket hole 14. A polyimide film 15 is adhered except for the portion. Reference numeral 16 in FIGS. 8 and 9 indicates a stepped portion where the thickness of the copper foil changes. The chip carrier according to the present invention described above is constructed by the manufacturing method described below.

This will be described below in the order of the steps with reference to FIGS. 10 to 16. Note that the process sectional view in FIG. 16 is a partially enlarged sectional view taken at a position corresponding to the line XX/ in FIG. 11. First, as shown in FIG. 10, a metal plate roll, that is, a copper plate 17 of, for example, 250 microns, which will eventually become an external lead terminal, is prepared with a desired chip carrier width, for example, 35 m.

Thereafter, a desired lead pattern as shown in FIG. 11 and a negative pattern of etching resist 18 constituting the sprocket hole 14 at the same time are formed by a known method.
Thereafter, first etching is performed on the surface coated with the etching resist, so that a desired pattern is raised from the single copper plate 17 as shown in FIG. This etching is performed by a desired thickness in the final product, for example, a depth of 35 microns corresponding to the thickness of the finger leads 12 which protrude into the device hole and are bonded to the IC chip 11.

Thereafter, as shown in FIG.
The sprocket hole 14, the device hole 19, and the external terminal hole 20 exposed after being packaged as a final product in the lead frame 13 are coated with a heat-resistant adhesive and a protective film is applied to the so-called coverlay.
After removing the protective film, this coverlay is aligned and continuously adhered onto the first etched copper plate 17.

As is clear from the process, the perforation accuracy in the coverlay of the polyimide film 15 does not require particularly strict accuracy.

In other words, the sprocket hole 14 of this chip carrier is formed by simultaneously etching the copper plate 17 with the lead frame 13, and the polyimide film 15 mainly plays the role of holding and fixing the lead frame 13, and does not contribute to the alignment of the chip carrier. Not yet. Therefore, the sprocket hole 14 of the coverlay of the polyimide film 15 may be formed sufficiently large so that it does not protrude into the original sprocket hole 14 formed by the copper plate 17.

Next, as shown in FIG. 14, an etching resist pattern 21 is formed on the copper plate 17, which is only a pattern that requires thickness.
is formed on the exposed surface side of the resist, and then a second resist is formed from the resist forming side.
Etching is continued until the first etching pattern formed in FIG. 12 appears as shown in FIG. 15.

That is, in this case, etching is performed at 250-35:215μ. In this case, etching of 215 μm is performed only from one direction through the etching resist 21, so the influence of etching from the lateral direction, so-called side etching, must be taken into account. Configure. 1st
6A to 6G sequentially show cross sections of the above steps. As described above, according to the method of manufacturing a chip carrier for an integrated circuit according to the present invention, the finger leads and the lead frame are simultaneously constructed from a single copper plate, and the sprocket holes are also formed by etching. Processes such as outer bonding of the finger lead and finger frame are slightly reduced by 1, and the positional accuracy of the sprocket hole and pattern is ensured.
Positioning using conventional methods is no longer required, and the accuracy of the sprocket holes in the polyimide coverlay is not required, resulting in a significant reduction in process control and man-hours.

In addition, since the thickness of the lead pattern can be freely selected by etching, parts that require mechanical support can be made thicker.
Therefore, it is possible to form thin, fine patterns that you can imagine.

This is because the fine pattern, except for the finger lead pattern that actually protrudes into the device hole and is bonded to the chip, is held and fixed by polyimide, but the thick lead part maintains sufficient mechanical strength. be. Furthermore, after inner bonding the chip 11 as shown in FIG. By sandwiching the foil pattern with adhesive-coated polyimide film, the chip is completely protected and at the same time has many advantages in the subsequent packaging process. At this time, since the polyimide film is adhered so as to wrap around the chip after chip bonding, it is of course unnecessary to drill device holes.

[Brief explanation of drawings]

Fig. 1 is a perspective view of the carrier film material used in the conventional manufacturing method for chip carriers for integrated circuits, Fig. 2 is a cross-sectional view of the same, and Fig. 3 is a top view of the same film after processing.
Figure 4 is a top view of the same film with copper foil pasted on it, Figure 5 is a top view of the processed copper foil and Figure 6 is A-A of the same film.
7 is a top view showing an example of use of a chip carrier obtained by the conventional method, and FIG. 8 is a top view showing an example of use of a chip carrier obtained by the method of manufacturing a chip carrier for integrated circuits of the present invention. Figure 9 is a sectional view taken along line A-A in Figure 8;
10 to 15 are perspective views of each process according to an embodiment of the same manufacturing method, and FIGS. 16A to 16G are sectional views of the same. 10... Electrode lead, 11... C chip, 12... Finger lead, 13...
... Lead frame, 14 ... Sprocket hole, 15 ... Film, 17 ... Copper plate,
18... Etching resist, 19...
・Device hole, 20...External terminal hole, 21・
...Etching resist.

Claims (1)

[Claims] 1. A desired lead pattern for connection with an integrated circuit chip is etched to a certain thickness from one side of a conductive metal plate so as to be raised, and then a through hole or a hole is formed at a predetermined position in advance. An insulating film with cutouts is adhered to the pattern-forming side of the conductive metal plate, and then a pattern is placed on the other side of the conductive metal plate to correspond to the desired pattern formed on the insulating film adhesion side, and to correspond to that pattern. Applying etching resist only to the parts that require thicker walls,
Etching is performed only from this etching resist side,
A method for manufacturing a chip carrier for an integrated circuit, characterized in that the desired pattern is obtained by performing the process to a depth where the desired lead pattern is formed completely independently. 2. The chip carrier for an integrated circuit according to claim 1, wherein the external connection terminal portion of the integrated circuit as a completed product is simultaneously formed as a desired lead pattern by etching a single conductive metal plate. Manufacturing method. 3. The method of manufacturing a chip carrier for an integrated circuit according to claim 1, wherein guide holes for positioning the chip carrier and for feeding the chip carrier at constant intervals are formed simultaneously by etching a single conductive metal plate.