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JPS5927551B2 - Automatic waveform equalization control method for television signals - Google Patents
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JPS5927551B2 - Automatic waveform equalization control method for television signals - Google Patents

Automatic waveform equalization control method for television signals

Info

Publication number
JPS5927551B2
JPS5927551B2 JP54100173A JP10017379A JPS5927551B2 JP S5927551 B2 JPS5927551 B2 JP S5927551B2 JP 54100173 A JP54100173 A JP 54100173A JP 10017379 A JP10017379 A JP 10017379A JP S5927551 B2 JPS5927551 B2 JP S5927551B2
Authority
JP
Japan
Prior art keywords
signal
waveform equalization
pulse
circuit
equalization control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54100173A
Other languages
Japanese (ja)
Other versions
JPS5624881A (en
Inventor
寛 山田
耕司 青木
啓 時政
清博 山崎
徹 谷口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54100173A priority Critical patent/JPS5927551B2/en
Publication of JPS5624881A publication Critical patent/JPS5624881A/en
Publication of JPS5927551B2 publication Critical patent/JPS5927551B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/14Picture signal circuitry for video frequency region
    • H04N5/21Circuitry for suppressing or minimising disturbance, e.g. moiré or halo

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)
  • Details Of Television Systems (AREA)
  • Filters That Use Time-Delay Elements (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Description

【発明の詳細な説明】 本発明はテレビ信号の垂直帰線期間中に重畳されるテス
ト信号(以下VIT信号と称する)を用いて波形等化を
自動的に行う方式に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for automatically performing waveform equalization using a test signal (hereinafter referred to as a VIT signal) superimposed during the vertical blanking period of a television signal.

テレビ信号のVIT信号をサンプリングし、検出した波
形歪情報を用いてトランスバーサルフィルタのタップ制
御を行いテレビ信号の自動波形等化を行うようなシステ
ムにおいて、VIT信号の9 重畳されていないテレビ
信号を受信すると問題が生じる。即ち、放送局あるいは
番組の種類によつてはVIT信号がテレビ信号に重畳さ
れず、このような場合にVIT信号のサンプリング動作
を行つて波形等化を行おうとすると、等化器の制御系0
が発散してしまう。従つて、本発明は、従来技術の上
述の問題点を解決するものであり、VIT信号が重畳さ
れていないことをすばやく検出して自動等化の制御を停
止させ、VIT信号が復旧した場合は自動等化制5 御
を再び開始せしめてその制御の安定化を計るものである
In a system that samples the VIT signal of a television signal and performs tap control of a transversal filter using detected waveform distortion information to perform automatic waveform equalization of the television signal, A problem arises when receiving. That is, depending on the type of broadcasting station or program, the VIT signal is not superimposed on the television signal, and in such cases, if you try to perform waveform equalization by sampling the VIT signal, the equalizer control system
will emanate. Therefore, the present invention solves the above-mentioned problems of the prior art, and quickly detects that the VIT signal is not superimposed and stops automatic equalization control, and when the VIT signal is restored, the automatic equalization control is stopped. Automatic equalization control 5 This is to restart the automatic equalization control and stabilize the control.

以下図面を用いて本発明を詳細に説明する。The present invention will be explained in detail below using the drawings.

第1図は本発明の一実施例を示すブロック図であり、同
図において、10はトランスバーサル型’0 自動波形
等化器を表わしている。この波形等化器10には、線1
2を介して送り込まれる工F帯あるいはベースバンドの
テレビ信号を等化し、線14を介してその等化テレビ信
号を送り出すトランスバーサルフィルタとテレビ信号の
第1フィー’5 ルド第17水平同期期間(以下単に1
7Hと称する)に挿入されたVIT信号の所定部分、例
えば2Tパルス部分、をサンプリングするサンプリング
回路と、サンプリングしたVIT信号のレベルと正規の
レベルとを比較して波形歪のデジタル誤’0 差情報を
発生する識別回路と、この識別回路からの語差情報が送
り込まれるシフトレジスタと、シフトレジスタの各段よ
り送り込まれるデジタル誤差情報を積分し、トランスバ
ーサルフィルタの各タップ毎に利得の重みづけを行う利
得調整回路と15が備えられている。上述の如き波形等
化器の構成は周知であるため、第1図には図示されてな
い。また波形等化器10にはテレビ信号中の17Hの水
平同期信号を描出して線16を介して送り出す水平同期
信号描出回路と、線18を介して論理゛1゛の信号が送
り込まれた場合にゲートを開いて波形等化制御を行い、
論理“00の信号が送り込まれた場合にゲートを閉じて
波形等化制御を行うゲート回路が例えば前述のシフトレ
ジスタの入力部あるいは出力部に設けられている。上述
の水平同期信号描出回路は既に公知であり、また、上述
のゲート回路は当業者に極めて容易に実施することがで
きるため、第1図にはあえて記載されていない。第1図
において、さらに、20は線12を介して送り込まれる
テレビ信号がIF帯である場合にこれをベースバンドに
変飽する復調回路である。
FIG. 1 is a block diagram showing one embodiment of the present invention, in which numeral 10 represents a transversal type '0 automatic waveform equalizer. This waveform equalizer 10 has a line 1
A transversal filter equalizes the F-band or baseband television signal sent through the line 14 and sends out the equalized television signal through the line 14. The following is simply 1
A sampling circuit that samples a predetermined part of the VIT signal (for example, a 2T pulse part) inserted into the VIT signal (referred to as 7H) and compares the level of the sampled VIT signal with a normal level to obtain digital error '0' of waveform distortion. A discriminator circuit that generates a discriminator, a shift register to which the word difference information from the discriminator circuit is sent, and a shift register that integrates the digital error information sent from each stage of the shift register, and weights the gain for each tap of the transversal filter. A gain adjustment circuit 15 is provided for adjusting the gain. The configuration of a waveform equalizer as described above is well known and is therefore not shown in FIG. In addition, the waveform equalizer 10 includes a horizontal synchronization signal drawing circuit that draws the horizontal synchronization signal of 17H in the television signal and sends it out through the line 16, and when a logic signal of "1" is sent through the line 18. Open the gate to perform waveform equalization control,
A gate circuit that closes the gate and controls waveform equalization when a logic "00" signal is sent is provided, for example, at the input or output section of the shift register described above. Since the gate circuit described above is well known and can be implemented very easily by a person skilled in the art, it is purposely not shown in FIG. 1. In FIG. This is a demodulation circuit that modulates the received television signal to baseband when it is in the IF band.

ただしこの復調回路20は線12を介して送り込まれる
テレビ信号がベースバンドである場合は省略される。ま
た、第1図において、22はリミツタアンプ回路であり
、第2図Aに示す如く、テレビ信号の17Hに重畳され
ているVIT信号aはこのリミツタアンプ回路22の閾
値bによつて制限され、第2図Bに示す如き波形を有す
る信号cとなる。なお、第2図AにおいてA。はVIT
信号中の2Tパルスを表わしている。パルス発生回路2
4は、線16を介して送り込まれる第2図Eに示す如き
17Hの水平同期信号dから2種類のパルスを形成する
However, this demodulation circuit 20 is omitted if the television signal sent via line 12 is baseband. 1, 22 is a limiter amplifier circuit, and as shown in FIG. 2A, the VIT signal a superimposed on 17H of the television signal is limited by the threshold value b of this limiter amplifier circuit 22, and the second A signal c having a waveform as shown in FIG. B is obtained. In addition, A in FIG. 2A. is VIT
It represents a 2T pulse in the signal. Pulse generation circuit 2
4 forms two types of pulses from the horizontal synchronizing signal d of 17H as shown in FIG.

即ち、水平同期信号dからあらかじめ定めた時間だけ遅
れて立上り、所定の持続時間を経過した後立下る、換言
すれば、2TパルスA。の周辺だけ論理゛1゛となる第
2図cに示す如き2Tパルス取り出しパルスeと、水平
同期信号dからあらかじめ定めた時間だけ遅れて発生す
る、換言すれば、2TパルスAOの存在すべき時期と次
の水平同期信号との間の時期に発生する第2図Gに示す
如き読み出しクロツクパルスfとを形成する。このよう
なパルスは水平同期信号dからカウントを開始するカウ
ンタ回路と単安定マルチバイブレータ回路との組合せに
より容易に形成することができる。形成された2Tパル
ス取り出しパルスeは線26を介してナンド回路28の
一方の入力端子に読み出しクロツクパルスfは線30を
介してD型フリツプフロツプ32のクロツク入力端子に
それぞれ送り込まれる。パルス発生回路24はさらに水
平同期信号dをそのまま線34を介してS−R型フリツ
プフロツプ36のりセツト入力端子に送り込む。リミツ
タアンプ回路22の出力信号cがナンド回路28の他方
の入力端子に送り込まれることにより、2Tパルスを除
く情報が全て除去された第2図Dに示す如き出力信号g
がナンド回路28から得られ、この出力信号gの立下り
エツジでS−R型フリツプフロツプ36がセツトされる
。このフリツプフロツプ36は17Hの水平同期信号d
でりセツトされており、従つてそのQ出力hは第2図F
に示す如き波形となる。フリツプフロツプ36のQ出力
hがD型フリツブフロツプ32のD入力端子に送り込ま
れることにより、読み出しクロツクパルスfの時点でQ
出力hの論理゛1− ゛O゛が判別され、第2図Hに示
す如きD型フリツプフロツプ32の出力信号iが得られ
る。
In other words, the 2T pulse A rises after a predetermined time delay from the horizontal synchronization signal d and falls after a predetermined duration. The 2T pulse extraction pulse e as shown in FIG. 2c, where the logic becomes ``1'' only around A read clock pulse f as shown in FIG. Such a pulse can be easily formed by a combination of a counter circuit that starts counting from the horizontal synchronizing signal d and a monostable multivibrator circuit. The formed 2T pulse take-out pulse e is sent via line 26 to one input terminal of NAND circuit 28, and the readout clock pulse f is sent via line 30 to the clock input terminal of D-type flip-flop 32, respectively. The pulse generating circuit 24 further sends the horizontal synchronizing signal d directly to the reset input terminal of an S-R flip-flop 36 via a line 34. By sending the output signal c of the limiter amplifier circuit 22 to the other input terminal of the NAND circuit 28, the output signal g as shown in FIG.
is obtained from the NAND circuit 28, and the S-R flip-flop 36 is set at the falling edge of the output signal g. This flip-flop 36 receives a horizontal synchronizing signal d of 17H.
Therefore, its Q output h is as shown in Fig. 2F.
The waveform will be as shown in . The Q output h of the flip-flop 36 is sent to the D input terminal of the D-type flip-flop 32, so that the Q output h of the flip-flop 36 becomes
The logic ``1-''O'' of the output h is determined, and the output signal i of the D-type flip-flop 32 as shown in FIG. 2H is obtained.

即ち、2Tパルスが存在する場合はS−R型フリツプフ
ロツプ36がセツトされるため、D型フリツプフロツプ
32の出力信号1は論理゛1”となり、2Tパルスが存
在しない場合は論理”0゛となる。この出力信号1が線
18を介して波形等化器10に送り込まれることにより
、テレビ信号上に2Tパルスが重畳されている場合は波
形等化制御が行われ、2Tパルスが重畳されていない場
合は直ちに波形等化制御が停止し、発散を防止すること
ができる。この波形等化制御の停止動作は、次の17H
において2Tパルスの重畳されていることが検出される
まで継続する。なお、以上の実施例においては、VIT
信号の重畳の有無を2Tパルスの重畳の有無によつて検
出しているが、これはその他のVIT信号であつても良
い。以上詳細に説明したように、本発明の方式によれば
、VIT信号が重畳されていない場合は自動波形等化動
作を停止するようにFIil脚されるため、VIT信号
が重畳されてないテレビ信号を不要な波形等化動作によ
り歪ませる恐れがなくなり、従つてどのような放送局、
番組からのテレビ信号に対しても共通に適用できる自動
波形等化システムを形成することができる。
That is, when a 2T pulse exists, the S-R flip-flop 36 is set, so the output signal 1 of the D-type flip-flop 32 becomes a logic "1", and when a 2T pulse does not exist, it becomes a logic "0". This output signal 1 is sent to the waveform equalizer 10 via the line 18, so that waveform equalization control is performed when a 2T pulse is superimposed on the TV signal, and when a 2T pulse is not superimposed on the TV signal. Waveform equalization control immediately stops and divergence can be prevented. This waveform equalization control stopping operation is performed in the next 17H.
The process continues until it is detected that a 2T pulse is superimposed at . In addition, in the above embodiment, VIT
Although the presence or absence of signal superimposition is detected by the presence or absence of 2T pulse superimposition, this may be any other VIT signal. As explained in detail above, according to the method of the present invention, the automatic waveform equalization operation is stopped when the VIT signal is not superimposed, so that the TV signal on which the VIT signal is not superimposed is This eliminates the risk of distortion due to unnecessary waveform equalization operations, making it possible to
An automatic waveform equalization system can be formed that can be commonly applied to television signals from programs.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例のプロツク図、第2図は第1
図の各部の信号波形図である。 10・・・・・・トランスバーサル型自動波形等化器、
20・・・・・・復調回路、22・・・・・・リミツタ
アンプ回路、24・・・・−・パルス発生回路、28・
・−・・サンド回路、32・・・・・・D型フリツプフ
ロツプ、36・・・・・・S−R型フリツプフロツプ。
Fig. 1 is a block diagram of one embodiment of the present invention, and Fig. 2 is a block diagram of an embodiment of the present invention.
FIG. 3 is a signal waveform diagram of each part in the figure. 10... Transversal type automatic waveform equalizer,
20... Demodulation circuit, 22... Limiter amplifier circuit, 24... Pulse generation circuit, 28...
...Sand circuit, 32...D type flip-flop, 36...S-R type flip-flop.

Claims (1)

【特許請求の範囲】[Claims] 1 テレビ信号の垂直帰線期間に挿入されたテスト信号
を用いて該テレビ信号の波形歪を検出し自動波形等化を
行う方式において、前記テスト信号がテレビ信号に重畳
されているか否かを検出し、該テスト信号が重畳されて
いない場合は前記自動波形等化動作を停止するようにし
たことを特徴とするテレビ信号の自動波形等化制御方式
1. In a method of detecting waveform distortion of a television signal using a test signal inserted in the vertical blanking period of the television signal and performing automatic waveform equalization, detecting whether or not the test signal is superimposed on the television signal. An automatic waveform equalization control method for television signals, characterized in that the automatic waveform equalization operation is stopped when the test signal is not superimposed.
JP54100173A 1979-08-08 1979-08-08 Automatic waveform equalization control method for television signals Expired JPS5927551B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54100173A JPS5927551B2 (en) 1979-08-08 1979-08-08 Automatic waveform equalization control method for television signals

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54100173A JPS5927551B2 (en) 1979-08-08 1979-08-08 Automatic waveform equalization control method for television signals

Publications (2)

Publication Number Publication Date
JPS5624881A JPS5624881A (en) 1981-03-10
JPS5927551B2 true JPS5927551B2 (en) 1984-07-06

Family

ID=14266922

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54100173A Expired JPS5927551B2 (en) 1979-08-08 1979-08-08 Automatic waveform equalization control method for television signals

Country Status (1)

Country Link
JP (1) JPS5927551B2 (en)

Also Published As

Publication number Publication date
JPS5624881A (en) 1981-03-10

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