JPS5928067B2 - charge coupled device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a charge coupled device, and particularly to a charge coupled device with a simplified electrode structure.

Photoelectric conversion device and charge transfer device (hereinafter abbreviated as CTD)
Recently, an image sensor has been proposed in which both are integrated on the same semiconductor substrate.

Such an image sensor usually has one photoelectric conversion element per row.
Comes with one system or two systems of CTD, and
At least one gate electrode exists between the photoelectric conversion element group and the CTD. In particular, in an imaging device used when the incident light from the imaging target is weak, that is, when imaging a dark imaging target, there are input gate electrodes, storage gate electrodes, and transfer (transfer) electrodes between the photoelectric conversion element group and the CTD.
There are three types of gate electrodes, and these gate electrodes must have different potentials and must be electrically independent from the transfer electrode of the CTD. This increases the number of busbars for voltage application, but also requires wiring for interconnecting the gate electrodes and transfer electrodes, which are attached to each row of each photoelectric conversion element, resulting in a significant increase in the pattern of the wiring layer. This increases the complexity, and in many cases, the interconnection wires intersect with the electrodes in three dimensions. This not only greatly complicates the manufacturing process, but also poses a problem in that if the wiring that transmits the pulses intersects with the electrodes, the pulses will be induced into the electrodes, which will adversely affect the operation of the device. In particular, since the input gate electrode must be kept at a sufficiently stable potential, the above-mentioned pulse induction must be prevented as much as possible.

Therefore, if we try to eliminate the crossover between the input gate electrode and the wiring, the wiring layer pattern becomes unreasonable, and if we make the shape of the input gate electrode too fine in an attempt to minimize the influence of crossover, the transfer conductance of the electrode will decrease. A problem arises in that the quantum efficiency decreases and the quantum efficiency appears to decrease. The present invention solves the above-mentioned problem by controlling the shape of the charge weir and the potential of the substrate surface layer under the electrode while always keeping at least a part of the transfer electrode and the gate electrode in the preceding stage at the same potential. It is an object of the present invention to provide a novel charge-coupled device capable of performing read operations.

An embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 1 shows a planar pattern of an impurity doped layer in one embodiment of the present invention, and for convenience it is assumed that the substrate is p-type silicon.

In order to make it easier to understand, in this figure, regions doped with impurities are shaded, and electrodes and the like, which will be described later, are shown removed. Although only a part of the device is shown in Figure 1, as is clear from the figure, all the patterns are X,
Since it has periodicity in both the y directions, the same pattern can be arranged periodically over any area, and there is no particular restriction on the number of unit patterns. In FIG. 1, small square regions 1, 2, 3, . . . 9 are island-like regions of the opposite conductivity type (ie, n-type) to the substrate, and are portions that generate signal charges.

Therefore, as in the conventional charge-coupled device, the above-mentioned opposite conductivity type region 1
9 is called the source region. All the impurity-doped regions other than the source regions are of the same conductivity type as the substrate and are formed by doping with donor ions by ion implantation.

Further, the narrow portions 11, 12, and 13 are channel stops (ChannelstOps), and are hereinafter referred to as charge weirs. Each charge weir has a shape similar to the letter "h" connected vertically, and from its vertical portion to an inverted L.
It is clear from a glance at the figure that the source regions 1 to 9 are located in the hook-shaped charge weir extending in the shape of a letter and that the input section is partitioned. Impurity doped layer 2 in the intermediate region
1, 22, 23, . . . 26 are regions having a lower impurity concentration than the charge weir and the substrate, and are hereinafter referred to as temporary storage regions. 80 and impurity doped layers 31 and 32 between charge weirs 11 and 12 and between charge weirs 12 and 13.
, 33, . . . , 38 are provided to determine the direction of charge transfer, so they are hereinafter referred to as guide layers, and as will be described later, the charges in each column follow the guide layers in numerical order. will be forwarded to. Each of these guide layers 31-38 also has a lower impurity concentration than the charge weirs 11-13. Next, FIG. 2 shows a planar configuration including the electrode shape of the charge transfer device according to this embodiment. In FIG. 2, the aforementioned impurity-doped regions are shown with diagonal lines. As is clearer from FIG.
A column channel is defined between 3 and 3, and each column channel is provided with an input section by hook-shaped charge weirs 11a, 12a, 13a surrounding the source regions 1, 2, . . . 9 in an inverted L shape. 1
1b, 12b, and 13b are divided.

Therefore, the area excluding these input sections in each column channel becomes a vertical transfer section. On the other hand, in this embodiment, all the electrodes provided on the substrate are insulated from the substrate and have a horizontally elongated strip shape.

That is, a first gate electrode 101 is provided adjacent to the lower open end of the hook-shaped charge weir in each row and extends in the horizontal direction so as to communicate the input section and the transfer section. Second to fifth gate electrodes extending in the direction are sequentially arranged. Each gate electrode commonly covers the input section and the transfer section, and in the transfer section, the above-mentioned impurity doped regions correspond under the second and fourth gate electrodes 102 and 104, and each electrode width is set approximately equal. ing. Further, in the input section, the electrode width is widened so that the impurity doped region corresponds to the bottom of the third gate electrode 103a,
The width of the second gate electrode 102a is narrowed accordingly. The fourth gate electrode 104a is connected to the source region of the input section and the third gate electrode 104a.
The fifth gate electrode 105 extends between the gate electrode and the fifth gate electrode 105.
A is arranged in the horizontal direction in a pattern that avoids the source region. For convenience, the electrode part corresponding to the input part is marked with the subtitle a.
Shown with. Five gate electrodes in each row are commonly connected to those of the same rank and connected to terminals Zl, (/T, S, respectively).
G, G, Z2 are derived. Now, in the above configuration, a predetermined DC voltage is always applied to the third and fourth gate electrodes 103 and 104 through the terminals SG and IG, and the third A deep well is formed under the gate electrode 103a, and in the transfer section, a deeper well is formed under the fourth gate electrode doped with impurities than under the third gate electrode. Therefore, charges generated in each source region 4 etc. are temporarily accumulated in the well under the third gate electrode 103a via the well under the fourth gate electrode 104a of the input section.
After a predetermined accumulation time, the charge accumulated in the well under the third gate electrode is transferred to each column channel transfer section.
To do this, a voltage is applied from the terminal Zt to the second gate electrode 102 to form a deep well below it, and then the first
If a voltage is also applied to the gate electrode 1 from the terminal Z1, the signal charge passes under the second gate electrode 102a at the input portion and is transferred into the well under the first gate electrode 101.

That is, the electrode 102 corresponds to a transfer gate electrode. However, since there is an impurity doped region by donor ion implantation on the substrate surface below the transfer portion of the transfer gate electrode 102, the well formed at this location is extremely deep. Therefore, the charge once transferred under the first gate electrode 101 immediately flows into the well under the second gate electrode in the transfer portion corresponding to the impurity doped region and is accumulated there. In this case, the well of the second gate electrode 102 as a transfer gate electrode is unnecessary, so if the voltage is returned to zero, the charge is transferred to the third gate electrode 103.
The process automatically moves to the lower well and then to the deeper well below the fourth gate electrode 104 corresponding to the impurity doped region.

Next, a voltage is applied to the fifth gate electrode 105 to transfer charge under the fifth gate electrode. In this way, charges are transferred between the charge weirs in the order of electrode numbers, that is, in the direction of arrow A in the figure. As can be understood from the explanation up to this point, each electrode in Figure 2 has the roles of temporary storage, transfer, etc., as well as the role of the CTD transfer electrode, which was conventionally separated from the electrodes that had these roles. .

Furthermore, all CTDs, which conventionally required at least one system for each column or row of photoelectric conversion elements, are not classified in this embodiment. In other words, each electrode corresponds to each CT
It also serves as the transfer electrode of D and a connection line that connects the electrodes of CTDs of different systems. The above operations and functions of the electrodes are the same for all electrodes as for electrodes 101 to 105.

Therefore, it can be seen that the embodiment shown in FIG. 2 operates essentially the same as the conventional two-dimensional photoelectric conversion device. Furthermore, the shapes and structures of the electrodes and wiring are extremely simple. In other words, since there is no need for connection lines between electrodes, there is virtually no crossover between electrodes and connection lines, and furthermore, the input gate electrode, temporary storage electrode, transfer gate electrode, etc. are integrated with the transfer electrode, and in the end, all the electrodes are Apart from the fact that there are some narrow and wide sections, the structure as a whole is made up almost entirely of band-shaped parts, making it an extremely simple structure. Although the above description has been made regarding the case of a buried channel, the present invention can easily be applied to a surface channel as well.

Further, the depth of the well may be adjusted by adjusting the thickness of the insulating film under the electrode, as is well known. In addition to the simple structure described above, the charge-coupled device of the present invention is capable of stable, low-noise operation because there is no crossing of connection wires at the electrodes of the input section, which are adversely affected by noise induction. It has various advantages such as reduced production cost and improved yield based on the simplicity of the process, and is extremely advantageous when applied to imaging devices, signal processing devices, etc.

[Brief explanation of the drawing]

FIG. 1 is a plan view showing a pattern of a charge weir and an impurity doped region in one embodiment of the present invention, and FIG. 2 is a plan view showing the shape of an electrode in the above embodiment. 1-9: Source region, 11-13: Charge weir, 21-26
:-Time accumulation area, 31-38: Guide layer.

Claims (1)

[Claims] 1 A plurality of source regions are arranged in a matrix on the surface of a semiconductor substrate, and a plurality of column channels are defined by providing a strip-shaped charge weir extending vertically between each row of the source regions, and one strip-shaped charge is provided in each column channel. A hook-shaped charge weir is formed that extends horizontally from the weir and surrounds each of the source regions in an inverted L shape to define an input section with an open bottom end. A first band-shaped gate electrode communicating between the input section and the column channel is disposed horizontally, and between the first gate electrode and the source region of each row, the input section of each column and the column channel are also shared. a second extending horizontally covering the
The third and fourth strip-shaped gate electrodes are successively arranged adjacent to each other, and a fifth gate electrode is formed between the fourth gate electrode and the first gate electrode of the adjacent row in a pattern that avoids the source region.
A strip gate electrode is arranged horizontally, and the second strip gate electrode is arranged horizontally.
, the potential wells formed under the third and fourth gate electrodes become deeper in the order of the second, fourth, and third gate electrodes in the input section, and become deeper in the order of the second, third, and fourth gate electrodes in the channel section. The surface potential is set so that it becomes deeper in the order of the gate electrode, and the signal charge accumulated from the source region, under the fourth gate electrode of the input section, and under the third gate electrode is transferred to the channel section by controlling the second gate electrode. A charge coupling characterized in that the charge is automatically transferred to the well under the fourth gate electrode via the well under the first gate electrode and the well under the second and third gate electrodes in the channel portion, which are connected to each other. Device.