JPS5928306B2 - phase modulator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a phase modulator that performs phase modulation of a carrier wave using a digital signal, and particularly relates to a phase modulator that performs polyphase phase modulation.

TDMA (Time Division Multiple
Access) method, SPADE (Singlecha
nnelpercarrierPCMAAccessDe
mandassignmentEquipment) method, SCPC (SingleChannelPerCa
Such a phase modulator is used in the .

FIG. 1 is a block diagram showing an example of a conventional phase modulator, in which 11 and 12 are digital signal input terminals, 13 is a carrier signal input terminal, and 21 and 22 are input terminals for a carrier signal.
are amplifiers, 31 and 32 are low-pass filters, 41 and 42 are mixers, 5 is a phase shifter that shifts the phase of the carrier wave by 90 degrees, 6 is a hybrid circuit, 7 is a directional coupler, and 8 is an attenuator. , 9 is a phase shifter, and 10 is an output terminal for a phase modulation signal. FIG. 2 is a vector diagram for explaining the operation of the circuit of FIG. 1, and the operation of the circuit of FIG. 1 will be explained below with reference to FIG.

When transmitting digital signals, two consecutive bits are set as one set, in other words, bit → dibit conversion is performed, and the four types of signals represented by this set of two bits are transmitted.
10. Corresponding to the logic of "OU", "00", "10",
The phase of the carrier wave can be transmitted as four types of phases having a phase interval of 90 degrees.

Figure 2 shows logic "11", "01", "00", "10"
An example is shown in which the phases of carrier waves are transmitted as vectors of C, 1, Co, , COO, C, and O, respectively, corresponding to the respective signals. Suppose that out of a set of 2-bit digital signals, the upper bit is the first bit and the lower bit is the second bit, the first bit is represented by the signal P, the second bit is represented by the signal Q, and the signals are combined into one set. The signals P and Q that belong are applied at the same time, with the signal P being applied to the input terminal 11 and the signal Q being applied to the input terminal 12.

Amplifiers 21 and 22 amplify signals P and Q, respectively, and output a DC voltage with an amplitude of +1 when these signals are logic "1", and output a DC voltage with an amplitude of -1 when these signals are logic "0".
outputs a DC voltage of If the carrier wave input to the input terminal 13 is represented by a vector Vp in FIG. 2, the output carrier wave of the phase shifter 5 can be represented by a vector VQ. Vectors P and Q have the same amplitude and differ in phase by 90 degrees.
The low-pass filters 31 and 32 remove high frequency components included in the outputs of the amplifiers 21 and 22 in order to limit the frequency bandwidth of the phase modulation signal to be transmitted. The mixer 41 combines the carrier wave indicated by the vector Vp with the low pass filter 31.
Analog multiplication with the output of Therefore, if the signal P is logic "1", the output of the mixer 41 is indicated by the vector Vp, and if the signal P is logic "0", the output of the mixer 41 is indicated by the vector -P. Also, mixer 42 is vector VQ
The carrier wave shown by is analog multiplied by the output of the low-pass filter 32. Therefore, if the signal Q is a logic "1", the output of the mixer 42 is indicated by the vector Q, and if the signal Q is a logic "0", the output of the mixer 42 is indicated by the vector -Q. Hybrid circuit 6 includes mixer 41 and mixer 42
Synthesize the output of . Therefore, the logic [11], "01", "00",
Corresponding to "10", the output vector of the hybrid circuit 6 is Cll=VP+Q,CO,=-VP+VQ,COO
=-Vp-Q, ClO=p-Q, and each becomes a vector with a phase interval of 90p and the same amplitude as shown in FIG.

That is, the signals “1U,” “O1”, “00”, “10”
Correct phase modulation output can be obtained. However, at the output point of the hybrid circuit 6, the correct phase modulation output as shown in FIG.
2 to the output of the hybrid circuit 6, the vector at the output point of the hybrid circuit 6 becomes as shown by the solid line in FIG.

Figure 3 is a vector diagram showing the output phase of the circuit in Figure 1.
In FIG. 3, the same symbols as in FIG. 2 have the same meanings, and the vector VR. is a vector that equivalently represents the inaccuracy of analog multiplication in the mixers 41 and 42, carrier wave leakage, etc. At the output point of the hybrid circuit 6, the vectors Cll, CO, , COO shown in FIG. , ClO is added to the vector VR, so the composite vector is C1
/, COl', COO', ClO',
The phase spacing is not exactly 90 degrees, and its amplitude also varies. The attenuator 8, phase shifter 9, and directional coupler 7 in FIG. 1 are circuits for compensating for imperfections in phase modulation as shown by the solid line in FIG. The carrier wave voltage corresponding to the vector Vs having the relationship of
The carrier wave inputted from
', COl', CO♂, C! Add to the phase modulation signal corresponding to ♂.

As a result, the output terminal 10 has vectors Cll, CO, .
Correct phase modulation signals represented by COO and ClO are obtained. Although the conventional phase modulator is constructed as shown in FIG. 1 and operates as described above, its disadvantage is that it must include a directional coupler 7, an attenuator 8, and a phase shifter 9 at the carrier frequency. The problem was that the structures of these devices were complicated and large. The present invention aims to eliminate the above-mentioned drawbacks in the conventional phase modulator, and for this purpose, the present invention eliminates the directional coupler 7, attenuator 8, and phase shifter 9 in the conventional device, and The leakage of the carrier wave corresponding to the vector VR shown in FIG. 3 is compensated for by offsetting the input signals of the mixers 41 and 42 in a direct current manner.Embodiments of the present invention will be described below with reference to the drawings. do.

FIG. 4 is a block diagram showing one embodiment of this invention.
The same reference numerals as in the figure indicate the same or corresponding parts, and in FIG. 4, the mixers 41 and 42 are the first mixer 41 and the second
It's called Mixa 42.

51 is a first offsetter, and 52 is a second offsetter.

Figure 5 is a vector diagram for explaining the operation of the circuit in Figure 4. The same symbols as in Figure 3 have the same meanings, V△P is a component force of vector Vs in the direction of vector P, and Q to V is Vector V
This is the component force of s in the vector VQ direction. If the first offsetr 51 gives an offset of a value corresponding to the vector P, and the second offsetter 52 gives an offset of a value equivalent to the vector VΔQ, the logic of the signal P becomes "1".
When the logic of the signal P is "0", the output of the mixer 41 becomes the vector 1Vp', and when the logic of the signal Q is "1", the output of the mixer 42 becomes the vector p'. becomes the vector VQI, and when the logic of the signal Q is "0", the output of the mixer 42 becomes the vector 1Vj.

Therefore, if the output vector of the hybrid circuit 6 corresponds to the logic "11", "01", "00", and "10" of the two-bit signal set explained earlier, the vector R
If the value of is zero, it should be possible to represent it by the points marked with "x" in FIG.

In reality, there is a vector R equivalent to carrier wave leakage, so the vector VR is added to each vector marked with an "X" in Figure 5, and at each point marked with an "O". In other words, a correct phase modulation signal can be obtained at the output terminal 10. In actual adjustment, the first and second offsetrs 51, 5
The direction and magnitude of the offset given in step 2 can be adjusted arbitrarily within a predetermined range, and the adjustments are made so that a correct phase modulation signal can be obtained. As is clear from a comparison between FIG. 1 and FIG. Phaser 9
can be omitted, making the device simple and inexpensive.

The embodiment shown in FIG. 4 corresponds to the conventional circuit shown in FIG. 1, and is a phase modulator that makes four phases of 22-4 correspond to four types of logic expressed by one set of 2-bit signals. However, by combining the circuits shown in FIG.
It is well known that a phase modulator can be constructed, and it is easy for those who understand the explanation of FIG. 4 to apply this invention to simplify the construction of such a known 2n phase modulator. It is.

[Brief explanation of drawings]

Figure 1 is a block diagram showing an example of a conventional phase modulator, Figure 2 is a vector diagram to explain the operation of the circuit in Figure 1, and Figure 3 is a vector diagram showing the output phase of the circuit in Figure 1. figure,
FIG. 4 is a block diagram showing one embodiment of the present invention, and FIG. 5 is a vector diagram for explaining the operation of the circuit shown in FIG. 4. In these figures, 11 is a first bit signal input terminal, 12 is a second bit signal input terminal, 13 is a carrier wave signal input terminal, 41 is a first mixer, 42 is a second mixer, and 5 is a transfer terminal. 51 is a first offsetr, 52 is a second offsetr, 6 is a hybrid circuit, and 10 is an output terminal.

Claims (1)

[Claims] 1. In a phase modulator that takes a set of two consecutive bits of a digital signal and outputs carrier waves phase-modulated to 45 degrees, 135 degrees, 225 degrees, and 315 degrees, respectively, corresponding to the bit pattern, the above-mentioned one set The first bit of
A first amplifier inputs a bit and outputs a DC voltage of a predetermined magnitude that becomes positive or negative polarity depending on the logic of the bit; a second amplifier that outputs a DC voltage of the predetermined magnitude that has positive polarity or negative polarity depending on the logic; a first offsetr to add to the output;
a second offseter that adds a DC voltage that can be arbitrarily adjusted within a predetermined range of positive polarity and negative polarity to the output of the second amplifier; a first mixer that performs analog multiplication of the output of the carrier wave output with the 0 degree phase, a phase shifter that shifts the phase of the carrier wave output of the 0 degree phase by 90 degrees, and a second mixer that performs analog multiplication of the output of the second offsetr and the output of the phase shifter. A phase modulator comprising: a mixer; and means for combining the output of the second mixer with the output of the first mixer.