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JPS5928314B2 - Deflection circuits in scanning electron microscopes, etc. - Google Patents
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JPS5928314B2 - Deflection circuits in scanning electron microscopes, etc. - Google Patents

Deflection circuits in scanning electron microscopes, etc.

Info

Publication number
JPS5928314B2
JPS5928314B2 JP54155103A JP15510379A JPS5928314B2 JP S5928314 B2 JPS5928314 B2 JP S5928314B2 JP 54155103 A JP54155103 A JP 54155103A JP 15510379 A JP15510379 A JP 15510379A JP S5928314 B2 JPS5928314 B2 JP S5928314B2
Authority
JP
Japan
Prior art keywords
voltage
transistor
scanning
period
deflection coil
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54155103A
Other languages
Japanese (ja)
Other versions
JPS5678278A (en
Inventor
勝治 佐原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jeol Ltd
Original Assignee
Nihon Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nihon Denshi KK filed Critical Nihon Denshi KK
Priority to JP54155103A priority Critical patent/JPS5928314B2/en
Publication of JPS5678278A publication Critical patent/JPS5678278A/en
Publication of JPS5928314B2 publication Critical patent/JPS5928314B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/26Electron or ion microscopes; Electron or ion diffraction tubes
    • H01J37/28Electron or ion microscopes; Electron or ion diffraction tubes with scanning beams

Landscapes

  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Details Of Television Scanning (AREA)

Description

【発明の詳細な説明】 本発明は走査型電子顕微鏡、X線マイクロアナライザ等
に用いて好適な偏向回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a deflection circuit suitable for use in scanning electron microscopes, X-ray microanalyzers, and the like.

走査型電子顕微鏡においては細く絞つた電子線を偏向コ
イルを用いて試料上で2次元的に走査し、それに起因し
て試料から発生する反射電子、2次電子等の情報を試料
上での電子線走査に同期した表示装置に導入して試料像
を得ている。
In a scanning electron microscope, a narrowly focused electron beam is scanned two-dimensionally over a sample using a deflection coil, and information on reflected electrons, secondary electrons, etc. generated from the sample is collected from the electrons on the sample. A sample image is obtained by introducing it into a display device synchronized with line scanning.

そして偏向コイルを駆動する偏向回路としては走査周期
を観察用の0.1秒程度から写真撮影用の数百秒まで広
い範囲にわたつて変化させる必要があるため単一周期の
商用テレビジョンの様會こパルス駆動方式ではなく、例
えば第1図に示す様な所謂電流駆動方式の回路が用いら
れている。同図において1はトランジスタQ、、Q2か
ら構成される電力増巾用コンプリメンタリ回路、2は該
コンプリメンタリ回路1の出力に接続された偏向コイル
、3は該コンプリメンタリ回路をドライブすると共に上
記偏向コイル2に流れる電流を検出する検出抵抗4から
の検出信号がフィードバックされる誤差増巾器である。
第2図aは上記偏向回路におけるコンプリメンタリ回路
の入出力電圧波形を同図bは偏向コイル2に流れる電流
波形を示す。電流波形かられかる様に帰線期間tlには
走査期間を2よりも大きな電圧が必要であり、回路の電
源電圧もそれに応じたV1と−V2が用いられる。一方
最近では走査電子顕微鏡でも商用テレビジョンと同等程
度の高速走査が要求され、そのために帰線期間を短くす
ると増巾器3の出力電圧は数百Vもの高電圧が必要とな
り、該増巾器の電源電圧V1もそれに伴なつて高くしな
ければならない。
As for the deflection circuit that drives the deflection coil, it is necessary to vary the scanning cycle over a wide range from about 0.1 seconds for observation to several hundred seconds for photography, so it is similar to a single cycle commercial television. For example, a so-called current drive type circuit as shown in FIG. 1 is used instead of a pulse drive type circuit. In the figure, 1 is a complementary circuit for power amplification consisting of transistors Q, Q2, 2 is a deflection coil connected to the output of the complementary circuit 1, and 3 is a drive circuit for driving the complementary circuit and also for driving the deflection coil 2. This is an error amplifier to which a detection signal from a detection resistor 4 that detects a flowing current is fed back.
FIG. 2a shows the input and output voltage waveforms of the complementary circuit in the deflection circuit, and FIG. 2b shows the current waveforms flowing through the deflection coil 2. As can be seen from the current waveform, the retrace period tl requires a voltage larger than the scanning period 2, and the circuit power supply voltages V1 and -V2 are used accordingly. On the other hand, recently, even scanning electron microscopes are required to perform high-speed scanning comparable to that of commercial televisions, and for this reason, shortening the retrace period requires the output voltage of the amplifier 3 to be as high as several hundreds of volts. The power supply voltage V1 must be increased accordingly.

ところがこの様に大振巾出力で且つ周波数特性の良い増
巾器を得ることは極めて困難である。又トランジスタQ
1には走査期間に本来必要でない高電圧V1が印加され
ており、その分余計に電力を消費するため熱的な面で設
計がむずかしかつた。本発明はこの点に鑑みてなされた
ものであり、帰線期間を検出する手段を設け、該検出手
段からの信号に基づいて帰線期間のみ偏向コイルヘ高電
圧を印加することにより上述した欠点を除くことのでき
る偏向回路を提供することを目的とするものである。以
下図面を用いて本発明を詳説する。第3図は本発明の一
実施例の構成を示す。第1図の従来例に加えてトランジ
スタQ1のコレクタにV1よりも低い電圧V3を印加で
きる様な切換スイッチ5、コンプリメンタリ回路1の入
力部に電圧V1を印加できる様な切換スイッチ6、そし
て増巾器3からの出力を予め定められた一定電圧V4(
第2図a参照)と比較することにより帰線期間t1を検
出するレベル検出回路7が新たに設けられており、該レ
ベル検出回路7の出力によつて帰線期間t1のみ切換ス
イツチ5,6を常開接点Aの側へ倒す様になされている
。尚8はV1が増巾器3に影響を与えないようにするた
めの保護用ダイオードである。ここで上記電圧3は第2
図aに示す様に走査期間に必要な電圧よりも若干高くV
1よりも大巾に低く設定されているため、走査期間T2
には正しい走査電流が偏向コイル2へ供給される。
However, it is extremely difficult to obtain an amplifier with such a large amplitude output and good frequency characteristics. Also transistor Q
1, a high voltage V1 which is not originally necessary is applied during the scanning period, which consumes extra power, making the design difficult from a thermal standpoint. The present invention has been made in view of this point, and it solves the above-mentioned drawbacks by providing means for detecting the retrace period and applying a high voltage to the deflection coil only during the retrace period based on a signal from the detection means. The purpose is to provide a deflection circuit that can be removed. The present invention will be explained in detail below using the drawings. FIG. 3 shows the configuration of an embodiment of the present invention. In addition to the conventional example shown in FIG. 1, there is also a changeover switch 5 that can apply a voltage V3 lower than V1 to the collector of the transistor Q1, a changeover switch 6 that can apply a voltage V1 to the input part of the complementary circuit 1, and an amplification switch 5. The output from the device 3 is connected to a predetermined constant voltage V4 (
A level detection circuit 7 is newly provided which detects the retrace period t1 by comparing it with the retrace period t1 (see FIG. is arranged so that it is tilted toward the normally open contact A side. Note that 8 is a protection diode for preventing V1 from affecting the amplifier 3. Here, the voltage 3 is the second
As shown in Figure a, V is slightly higher than the voltage required for the scanning period.
Since it is set much lower than 1, the scanning period T2
In this case, the correct scanning current is supplied to the deflection coil 2.

そして帰線期間t1にはスイツチ5,6が接点A側に倒
されコンプリメンタリ回路1の入力にはV,が印加され
るためトランジスタQ1は導通状態になり、偏向コイル
2にはV,がそのまま印加される。従つてその期間偏向
コイル2には急激に立上る帰線電流が流れる。この様に
本発明によればレベル検出器7によつて帰線期間を検出
し、その期間のみトランジスタQ,のコレクタ電圧を高
めると共にQ1を導通状態にするため増巾器3の出力電
圧は低電圧V3で十分であり、又トランジスタQ1には
走査期間に高電圧が印加されないため消費電力は大巾に
減少する。
During retrace period t1, switches 5 and 6 are turned to the contact A side, and V is applied to the input of complementary circuit 1, so transistor Q1 becomes conductive, and V remains applied to deflection coil 2. be done. Therefore, during that period, a rapidly rising return current flows through the deflection coil 2. As described above, according to the present invention, the level detector 7 detects the blanking period, and only during that period, the collector voltage of the transistor Q is increased and Q1 is made conductive, so that the output voltage of the amplifier 3 is low. The voltage V3 is sufficient, and since no high voltage is applied to the transistor Q1 during the scanning period, power consumption is greatly reduced.

又、走査型電子顕微鏡等では肉眼観察時には商用テレビ
ジヨンと同等程度の高速走査から、撮影時の1画面数1
00秒程度の超低速走査まで広範囲に切換えられ、それ
に伴つて帰線期間も数μ秒〜数m秒の範囲で変化する。
Furthermore, with scanning electron microscopes, etc., when observing with the naked eye, the scanning speed is comparable to that of commercial television;
The scanning speed can be changed over a wide range up to very low speed scanning of about 0.00 seconds, and the retrace period also changes in the range of several microseconds to several milliseconds.

特に撮影時は帰線期間が長いので、その期間に偏向コイ
ルへ印加される電圧も低くて良く、V4よりも低くなる
。従つて撮影時にはレベル検出回路7は動作せず、電源
電圧の切換が行われなくなる。そのため、電源電圧切換
時のノイズが発生しないばかりか、常にフイードバツク
が働いて直線性の良い走査電流を偏向コイルへ供給する
ことが可能となり、ノイズによる画質の低下がなく、且
つ直線性の良い走査電流により歪のない鮮明な走査型電
子顕微鏡像を撮影することができる。第4図は本発明の
第2の実施例の構成を示し、本実施例ではトランジスタ
Qlのコレクタにはダイオード9を介して低電圧V3が
常に供給され、同じくベースには帰線期間に高電圧V1
がスイツチ10を介して印加される。
In particular, since the retrace period is long during photographing, the voltage applied to the deflection coil during this period may also be low, and is lower than V4. Therefore, during photographing, the level detection circuit 7 does not operate, and the power supply voltage is not switched. Therefore, not only does noise not occur when switching the power supply voltage, but feedback is constantly working and it is possible to supply a scanning current with good linearity to the deflection coil, which eliminates deterioration in image quality due to noise and allows scanning with good linearity. The current allows clear, distortion-free scanning electron microscope images to be taken. FIG. 4 shows the configuration of a second embodiment of the present invention. In this embodiment, a low voltage V3 is always supplied to the collector of the transistor Ql via a diode 9, and a high voltage V3 is also supplied to the base during the retrace period. V1
is applied via switch 10.

この様な構成となせば走査期間にはスイツチ10が0F
Fとなるので偏向コイル2には低電圧V3,−V2によ
る走査電流が流れ、帰線期間にはスイツチ10が0Nと
なりトランジスタQ1のベースに高電圧1が印加される
ため偏向コイル2にはベース・エミツタ接合を介して該
高電圧V1が印加される。
With this configuration, the switch 10 is set to 0F during the scanning period.
F, so a scanning current with low voltages V3 and -V2 flows through the deflection coil 2, and during the retrace period, the switch 10 becomes 0N and high voltage 1 is applied to the base of the transistor Q1, so the deflection coil 2 has a low voltage V3 and -V2. - The high voltage V1 is applied via the emitter junction.

従つてその期間偏向コイル2には急激に立上る帰線電流
が流れる。本実施例においても増巾器3の電源は低電圧
3で十分であり、又トランジスタQ1の消費電力も少な
く抑えることができる。
Therefore, during that period, a rapidly rising return current flows through the deflection coil 2. In this embodiment as well, a low voltage 3 is sufficient as the power source for the amplifier 3, and the power consumption of the transistor Q1 can also be kept low.

尚上述した実施例中のスイツチとしては半導体スイツチ
等早い動作速度を持つものが適している。
As the switch in the above-described embodiment, a semiconductor switch or the like having a high operating speed is suitable.

以上詳述した如く本発明によれば、走査信号に基づいて
帰線期間を検出する手段を設け、帰線期間のみトランジ
スタQ1のコレクタ又はベースに高電圧V1を印加する
と共に該トランジスタを導通状態として該高電圧をトラ
ンジスタを介して偏向コイルへ供給することにより、増
巾器3の電源電圧を低め、又トランジスタQ1の消費電
力を低く抑えることができる。更に、本発明では走査信
号を一定レベルV4と比較することにより帰線期間を判
別しているため、帰線期間の電圧が低くなる撮影時等の
低速走査時には電源電圧の切換が行われず、鮮明な像を
撮影することが可能となるという大きな効果も得られる
As detailed above, according to the present invention, a means for detecting the blanking period is provided based on the scanning signal, and only during the blanking period, the high voltage V1 is applied to the collector or base of the transistor Q1, and the transistor is made conductive. By supplying the high voltage to the deflection coil through the transistor, the power supply voltage of the amplifier 3 can be lowered, and the power consumption of the transistor Q1 can be kept low. Furthermore, in the present invention, since the retrace period is determined by comparing the scanning signal with a constant level V4, the power supply voltage is not switched during low-speed scanning such as during shooting when the voltage during the retrace period is low, resulting in sharp images. This also has the great effect of making it possible to take a picture of the subject.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の偏向回路の一例を示す図、第2図は偏向
コイルに印加される電圧と流れる電流の波形を示す図、
第3図及び第4図は本発明の一実施例の構成を示す図で
ある。 1:コンプリメンタリ回路、2:偏向コイル、3:誤差
増巾器、4:検出抵抗、5,6:スイツチ、7リレベル
検出器、8:ダイオード。
FIG. 1 is a diagram showing an example of a conventional deflection circuit, FIG. 2 is a diagram showing the waveforms of the voltage applied to the deflection coil and the flowing current,
FIGS. 3 and 4 are diagrams showing the configuration of an embodiment of the present invention. 1: complementary circuit, 2: deflection coil, 3: error amplifier, 4: detection resistor, 5, 6: switch, 7 relevel detector, 8: diode.

Claims (1)

【特許請求の範囲】[Claims] 1 偏向コイルに電流を供給するためのトランジスタと
、該トランジスタに走査信号を供給するための増幅器と
を備えた偏向回路において、走査信号を所定レベルと比
較することにより帰線期間を検出するレベル判別手段と
、該レベル判別手段によつて制御され帰線期間のみ上記
トランジスタのコレクタ又はベースにそれ以外の期間よ
りも高い電圧V_1を印加する切換手段を設け、該トラ
ンジスタを介して該電圧を偏向コイルに印加するように
構成したことを特徴とする走査型電子顕微鏡等における
偏向回路。
1 Level determination for detecting blanking period by comparing the scanning signal with a predetermined level in a deflection circuit equipped with a transistor for supplying current to a deflection coil and an amplifier for supplying a scanning signal to the transistor and a switching means for applying a voltage V_1 higher than the other period to the collector or base of the transistor only during the retrace period and controlled by the level discriminating means, and applying the voltage to the deflection coil through the transistor. A deflection circuit for a scanning electron microscope, etc., characterized in that the deflection circuit is configured to apply a voltage to the scanning electron microscope.
JP54155103A 1979-11-30 1979-11-30 Deflection circuits in scanning electron microscopes, etc. Expired JPS5928314B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54155103A JPS5928314B2 (en) 1979-11-30 1979-11-30 Deflection circuits in scanning electron microscopes, etc.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54155103A JPS5928314B2 (en) 1979-11-30 1979-11-30 Deflection circuits in scanning electron microscopes, etc.

Publications (2)

Publication Number Publication Date
JPS5678278A JPS5678278A (en) 1981-06-27
JPS5928314B2 true JPS5928314B2 (en) 1984-07-12

Family

ID=15598676

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54155103A Expired JPS5928314B2 (en) 1979-11-30 1979-11-30 Deflection circuits in scanning electron microscopes, etc.

Country Status (1)

Country Link
JP (1) JPS5928314B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0759043B2 (en) * 1989-03-02 1995-06-21 シャープ株式会社 Vertical deflection circuit
JPH02266691A (en) * 1989-04-06 1990-10-31 Sharp Corp Vertical deflection circuit

Also Published As

Publication number Publication date
JPS5678278A (en) 1981-06-27

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