JPS5930273B2 - ensemble effect circuit - Google Patents
ensemble effect circuitInfo
- Publication number
- JPS5930273B2 JPS5930273B2 JP51121099A JP12109976A JPS5930273B2 JP S5930273 B2 JPS5930273 B2 JP S5930273B2 JP 51121099 A JP51121099 A JP 51121099A JP 12109976 A JP12109976 A JP 12109976A JP S5930273 B2 JPS5930273 B2 JP S5930273B2
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- signal
- circuit
- output
- musical tone
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000000694 effects Effects 0.000 title claims description 9
- 238000006243 chemical reaction Methods 0.000 claims description 31
- 230000010355 oscillation Effects 0.000 claims description 3
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 2
- 239000011295 pitch Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 6
- 238000001514 detection method Methods 0.000 description 3
- 101150115078 BBD2 gene Proteins 0.000 description 2
- 230000002238 attenuated effect Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
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- Electrophonic Musical Instruments (AREA)
Description
【発明の詳細な説明】
本発明は楽音信号に多彩な音色効果及び合奏効果を付加
するための回路方式に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit system for adding various tone effects and ensemble effects to musical tone signals.
本発明によれば、単音を任意の音程に変換できるばかり
でなく、和音のような複雑な楽音も任意の音程に変換す
ることが可能であり、原音と変換された音とにより非常
に音色豊かな合奏効果が得られる。According to the present invention, it is not only possible to convert a single note into an arbitrary pitch, but also a complex musical tone such as a chord can be converted into an arbitrary pitch, and the original sound and the converted sound can have a very rich timbre. A great ensemble effect can be obtained.
以下、図によつてその回路動作を説明する。第1図は、
本発明の基本的な構成を表わす回路ブロック図である。The circuit operation will be explained below with reference to the drawings. Figure 1 shows
FIG. 1 is a circuit block diagram showing the basic configuration of the present invention.
固定周波数発振器OSCIの出力信号が、点にを通つて
、例えば分周比1/Nのブログラマフプ功ウンターPC
lに加わると、上記出力信号の周波数は1/Nに逓降さ
れて点fに現われ、位相比較器PD1に加えられる。The output signal of the fixed frequency oscillator OSCI is passed through a point, for example, to a programmer counter PC with a frequency division ratio of 1/N.
1, the frequency of the output signal is stepped down by 1/N and appears at point f, which is applied to the phase comparator PD1.
該PD1と電圧制御発振器VC01と例えば分周比1/
MのプログラマブルカウンターPC2とは、フエーズロ
ツクドループいわゆるPLL回路を形成するので、点g
に現われる信号は点fに現われる信号と同じ周波数にな
るため、点れには結局、に点に現われた出力信号周波数
の1/N÷1/M=M/Nの周波数の信号が得られる。
一方、点Cを経て、電子遅延周波数変換回路FCIを通
過した上記発振器OSCIの出力信号は周波数変換され
て点dに現われるが、上記点れの信号及び点dの信号は
位相比較器PD2に加えられ、その周波数差より検出さ
れた検出信号が点eに現われて電圧制御発振器VC02
に入力される。The PD1 and the voltage controlled oscillator VC01, for example, have a frequency division ratio of 1/
Since the programmable counter PC2 of M forms a phase-locked loop so-called PLL circuit, the point g
Since the signal appearing at point f has the same frequency as the signal appearing at point f, a signal having a frequency of 1/N÷1/M=M/N of the output signal frequency appearing at point f is obtained at the point.
On the other hand, the output signal of the oscillator OSCI that has passed through the electronic delay frequency conversion circuit FCI via point C is frequency converted and appears at point d, but the signal at the above point and the signal at point d are added to the phase comparator PD2. A detection signal detected from the frequency difference appears at point e and is output to the voltage controlled oscillator VC02.
is input.
該VC02に制御される変調波発振器LFOの出力信号
はクロックパルス発振器Clの発振器波数を周波数変調
し、該発振器CLの出力信号が上記周波数変換回路FC
Iの遅延時間を変調して周波数変換を行なつているわけ
であるが、上記各回路プロツクPD2,CO2,LFO
,CL,FClで一種のサーボ回路を形成し、点dと点
hに現われる信号の周波数が同じになるように上記電圧
制御発振器VCO2が動作するので、点dの信号と点c
の信号との周波数比は点hの信号と点kの信号との周波
数比と同じになり、この場合M/Nとなる。電子遅延周
波数変換回路FC2は上記周波数変換回路FClと同じ
回路構成のものであり、上記同一のクロツクパルス発振
器CLによつて同時に変調されているので、周波数変換
比率は上記回路FClと同率になるため、入力端子1N
1に加えられたM/Nの比率で変換されて出力端子0U
T2に現われる。The output signal of the modulated wave oscillator LFO controlled by the VC02 frequency modulates the oscillator wave number of the clock pulse oscillator Cl, and the output signal of the oscillator CL is transmitted to the frequency conversion circuit FC.
Frequency conversion is performed by modulating the delay time of I, and each of the above circuit blocks PD2, CO2, LFO
, CL, and FCl form a kind of servo circuit, and the voltage-controlled oscillator VCO2 operates so that the frequencies of the signals appearing at points d and h are the same, so that the signal at point d and the point c
The frequency ratio between the signal at point h and the signal at point k is the same as the frequency ratio between the signal at point h and the signal at point k, in this case M/N. The electronic delay frequency conversion circuit FC2 has the same circuit configuration as the frequency conversion circuit FCl, and is simultaneously modulated by the same clock pulse oscillator CL, so that the frequency conversion ratio is the same as that of the circuit FCl. Input terminal 1N
The output terminal 0U is converted by the ratio of M/N added to 1.
Appears at T2.
上記プログラマブルカウンターPCl,PC2の分周比
は任意に選べるので、分周比をそれぞれ任意の比率で設
定すれば、出力端子0UT2からは出力端子0UT1よ
り得られる変調を受けない原楽音信号と混合して音色豊
かな合奏効果を伴つた楽音信号を得ることができる。第
2図は本発明の一実施例を示す回路プロツク図である。The frequency division ratios of the programmable counters PCl and PC2 can be arbitrarily selected, so if the frequency division ratios are set to arbitrary ratios, the output terminal 0UT2 will be mixed with the unmodulated original musical tone signal obtained from the output terminal 0UT1. It is possible to obtain a musical tone signal with a rich ensemble effect. FIG. 2 is a circuit block diagram showing one embodiment of the present invention.
第1の電子遅延周波数変換回路は、電子遅延素子BBD
3,BBD4、振幅変調回路MOD3,MOD4で構成
され、電圧制御発振器VCO2の出力によつて制御され
る鋸歯状波発振器0SC2,0SC3、サイン波発振器
0SC4により駆動される0固定周波数発振器0SC1
の出力は点cを通り、電子遅延素子BBD3,BBD4
で周波数変調を受け、振幅変調回路MOD3,MOD4
で振幅変調されて周波数を変換された信号として点dに
現われるが、周波数変換の様子を第3図の波形図を用い
て説明する。The first electronic delay frequency conversion circuit includes an electronic delay element BBD
3, BBD4, a fixed frequency oscillator 0SC1 driven by a sawtooth wave oscillator 0SC2, 0SC3, a sine wave oscillator 0SC4, which is composed of amplitude modulation circuits MOD3 and MOD4, and controlled by the output of the voltage controlled oscillator VCO2.
The output of passes through point c and electronic delay elements BBD3, BBD4
receives frequency modulation, and amplitude modulation circuits MOD3 and MOD4
The signal appears at point d as a signal whose amplitude has been modulated and whose frequency has been converted.The state of the frequency conversion will be explained using the waveform diagram of FIG.
固定周波数発振器0SC1の出力信号(波形1)は、鋸
歯状波(波形2)で周波数変調されるクロツクパルス発
振器CLlによつて駆動される電子遅延素子BBD3を
通つて波形1よりも周波数の高い波形3の如き信号とな
る。The output signal (waveform 1) of the fixed frequency oscillator 0SC1 passes through an electronic delay element BBD3 driven by a clock pulse oscillator CLl which is frequency-modulated with a sawtooth wave (waveform 2), and outputs a waveform 3 having a higher frequency than waveform 1. The signal will be as follows.
同様にして、電子遅延素子BBD4を通過する上記発振
器0SC1の出力信号は鋸歯状波xと90記位相を異に
する鋸歯状波Y(波形4)によつて周波数変調されるク
ロツクパルス発振器CL2によつて周波数変調を受けて
上記波形3と、周波数及び波形を同じくする波形5の如
き信号となる。上記信号3及び5はそれぞれ、振幅変調
回路MOD3及びMOD4で振幅変調を受けて波形9及
び7の如き信号となるが、上記振幅変調回路MOD3,
MOD4の各変調用サイン波Q,Qは互いに180Oの
位相差を有し、且つ信号3及び5の周波数が急に低下す
る期間T3及びT,と上記サイン波Q及びQの各振幅の
谷とが一致するような位相関係に設定してあるため、上
記T3,t5の期間内における波形成分は極度に減殺さ
れて、信号7と9とが合成されて点dに現われた信号は
波形10の如き一定の周波数と振幅を有する信号であり
、固定周波数発振器0SC1の出力信号1が一定の比率
で周波数変換されたものになつている。また、この周波
数変換比率は、前述の基本回路の如く、プログラマブル
カウンターPCl及びPC2の各分周比によつて決まる
ので、ピツチコントロール入力端子1N3に接続された
ピツチコントロール回路PICによつてプログラマブル
カウンターPCl,PC2の各分周比を設定すれば、任
意の周波数変換比率を設定することができる。例えば固
定周波数発振器0SC1の発振周波数を1kHzとして
、プログラマブルカウンターPCl,PC2の各分周比
を1/4,1/5に設定すると、k点の信号0kHz)
はf点では250Hzとなり、g点の信号がf点と同じ
250Hzになるためにフエーズロツクドループ回路P
LLが動作してh点には250×5(z)即ち1250
zの信号が得られる。つまり、プログラマブルカウンタ
ーPClの分周比1/4を同PC2の分周比1/5で割
つた値、1.25が周波数変換比率である。上述の如く
、第1の電子遅延周波数変換回路はフエーズロツクドル
ープ回路PLLで設定された周波数変換比率で固定周波
数発振器0SC1の出力信号1を周波数変換するので、
前述の基本回路の如く第2の電子遅延周波数変換回路即
ち電子遅延素子BBDl,BBD2,振幅変調回路MO
Dl,MOD2で構成された回路も同様にして楽音信号
入力端子1N1より加えられたa点の楽音信号を、フエ
ーズロツクドループ回路PLLで設定された変換比率で
周波数変換し、b点には設定された比率で周波数変換さ
れた楽音信号が得られるのである。入力端子1N1に加
えられる楽音信号は単音のみでなく、複音でも良く、和
音例えばCMコードを入力して周波数変換比率5/4に
設定するとEMコードの出力楽音信号が得られる。また
、ノイズキラ一回路G1は、入力楽音信号の無い場合の
耳ざわりな回路雑音をなくするためのもので、入力楽音
信号の有無を検出する検出回路GDの出力信号によつて
該G1のゲートが制御されて、入力楽音信号のある時の
み第1の電子遅延周波数変換回路で周波数変換された楽
音信号を通過させ、出力端子0UT2より出力される。Similarly, the output signal of the oscillator 0SC1 passing through the electronic delay element BBD4 is frequency-modulated by the clock pulse oscillator CL2 by a sawtooth wave Y (waveform 4) having a phase difference of 90 degrees from the sawtooth wave x. Then, it undergoes frequency modulation and becomes a signal such as waveform 5 having the same frequency and waveform as waveform 3 above. The signals 3 and 5 undergo amplitude modulation in the amplitude modulation circuits MOD3 and MOD4, respectively, and become signals with waveforms 9 and 7.
The modulation sine waves Q and Q of MOD4 have a phase difference of 180O, and the periods T3 and T in which the frequencies of signals 3 and 5 suddenly decrease, and the troughs of the amplitudes of the sine waves Q and Q. Since the phase relationship is set such that they match, the waveform components within the periods T3 and t5 are extremely attenuated, and the signal that appears at point d when signals 7 and 9 are combined is the same as waveform 10. The output signal 1 of the fixed frequency oscillator 0SC1 is frequency-converted at a constant ratio. Also, as in the basic circuit described above, this frequency conversion ratio is determined by the frequency division ratios of the programmable counters PCl and PC2, so the pitch control circuit PIC connected to the pitch control input terminal 1N3 controls the programmable counter PCl , PC2, an arbitrary frequency conversion ratio can be set. For example, if the oscillation frequency of the fixed frequency oscillator 0SC1 is 1 kHz and the division ratios of the programmable counters PCl and PC2 are set to 1/4 and 1/5, the signal at point k is 0 kHz)
is 250Hz at point f, and since the signal at point g is the same 250Hz as point f, the phase-locked loop circuit P
LL operates and at point h there are 250×5(z) or 1250
A signal of z is obtained. That is, the frequency conversion ratio is 1.25, which is the value obtained by dividing the frequency division ratio 1/4 of the programmable counter PC1 by the frequency division ratio 1/5 of the programmable counter PC2. As mentioned above, the first electronic delay frequency conversion circuit frequency converts the output signal 1 of the fixed frequency oscillator 0SC1 at the frequency conversion ratio set by the phase locked loop circuit PLL.
As in the basic circuit described above, a second electronic delay frequency conversion circuit, that is, electronic delay elements BBDl, BBD2, and an amplitude modulation circuit MO
Similarly, the circuit composed of Dl and MOD2 converts the frequency of the musical tone signal at point a, which is applied from the musical tone signal input terminal 1N1, at the conversion ratio set by the phase-locked loop circuit PLL, and converts the frequency at point b. Thus, a musical tone signal whose frequency is converted at the same ratio is obtained. The musical tone signal applied to the input terminal 1N1 may be not only a single tone but also a compound tone. When a chord, for example a CM code, is input and the frequency conversion ratio is set to 5/4, an output musical tone signal of an EM code is obtained. Further, the noise killer circuit G1 is for eliminating unpleasant circuit noise when there is no input musical tone signal, and the gate of this G1 is controlled by the output signal of the detection circuit GD that detects the presence or absence of the input musical tone signal. The frequency-converted musical tone signal is passed through the first electronic delay frequency conversion circuit only when there is an input musical tone signal, and is output from the output terminal 0UT2.
以上のようにして本発明による合奏効果回路の出力端子
0UT2からは任意の変換比率で周波数変換された出力
楽音信号が得られるので、単音が任意の音程に変換でき
るばかりでなく、和音のような複雑な楽音も任意の音程
に変換することができ、また、該出力楽音信号と出力端
子0UT1の出力信号即ち原楽音信号とを電気的に混合
することにより、またはそれぞれスピーカーで放音して
音響的に放音することにより非常に音色豊かな合奏効果
が得られる。As described above, the output terminal 0UT2 of the ensemble effect circuit according to the present invention provides an output musical tone signal frequency-converted at an arbitrary conversion ratio, so that not only a single note can be converted to an arbitrary pitch, but also a chord-like signal. Complex musical tones can also be converted into arbitrary pitches, and the output musical tone signal and the output signal of the output terminal 0UT1, that is, the original musical tone signal, can be electrically mixed or emitted from a speaker. By emitting the sound in a specific manner, an ensemble effect with a very rich tone can be obtained.
第1図は、本発明の基本的な構成を表わす回路プロツク
図、第2図は本発明の一実施例を示す回路プロツク図、
第3図は第2図における周波数変換の状態を示す波形図
である。
0SC1・・・・・・固定周波数発振器、PCl,PC
2・・・・・・プログラマブルカウンター、PDl,P
D,・・・・・・位相比較器、VCOl,VCO2・・
・・・・電圧制御発振器、FCl,FC2・・・・・・
電子遅延周波数変換回路、LFO・・・・・・変調波発
振器、CL・・・・・・クロツクパルス発振器、1N1
・・・・・・入力端子、0UT1,0UT2・・・・・
・出力端子、BBDl,BBD2,BBD3,BBD4
・・・・・・電子遅延素子、MODl,MOD2,MO
D3,MOD4・・・・・・振幅変調回路、0SC2,
0SC3・・・・・・鋸歯状波発振器、0SC4・・・
・・・サイン波発振器、X,Y・・・・・・鋸歯状波、
Q,Q・・・・・・サイン波、T3,t5・・・・・・
期間、PIC・・・・・・ピツチコントロール回路、P
LL・・・・・・フエーズカツクトレープ回路、G1・
・・・・・ノイズキラ一回路、GD・・・・・・検出回
路、CLl,CL2・・・・・・クロツクパルス発振器
、IN3・・・・・・ピツチコントロール入力端子。FIG. 1 is a circuit block diagram showing the basic configuration of the present invention, FIG. 2 is a circuit block diagram showing an embodiment of the present invention,
FIG. 3 is a waveform diagram showing the state of frequency conversion in FIG. 2. 0SC1...Fixed frequency oscillator, PCl, PC
2...Programmable counter, PDl, P
D, ... Phase comparator, VCOl, VCO2...
...Voltage controlled oscillator, FCl, FC2...
Electronic delay frequency conversion circuit, LFO...Modulated wave oscillator, CL...Clock pulse oscillator, 1N1
...Input terminal, 0UT1, 0UT2...
・Output terminal, BBDl, BBD2, BBD3, BBD4
...Electronic delay element, MODl, MOD2, MO
D3, MOD4... Amplitude modulation circuit, 0SC2,
0SC3...Sawtooth wave oscillator, 0SC4...
...Sine wave oscillator, X, Y...Sawtooth wave,
Q, Q...Sine wave, T3, t5...
Period, PIC...Pitch control circuit, P
LL...Phase cut trape circuit, G1.
...Noise killer circuit, GD...Detection circuit, CLl, CL2...Clock pulse oscillator, IN3...Pitch control input terminal.
Claims (1)
号の周波数を変換出力する第1の電子遅延周波数変換回
路と、楽音信号を入力として該入力楽音信号の周波数を
変換出力する第2の電子遅延周波数変換回路と、上記第
1及び第2の電子遅延周波数変換回路の各遅延時間を共
通に制御するクロックパルス発振器又は該各クロックパ
ルス発振器の発信周波数相互間に一定の関係をもつよう
に設定されたクロックパルス発振器と、該クロックパル
ス発振器の発信周波数を周波数変調する変調用信号を出
力する変調信号発生回路と、上記固定周波数発振器の出
力信号を入力し任意の変換比率で該信号を周波数変換し
て出力する周波数任意変換回路とを具備し、上記変調信
号発生回路は上記第1の電子遅延周波数変換回路及び上
記周波数任意変換回路の各出力信号を入力して、該各出
力信号が同一周波数になるような周波数の変調信号を上
記クロックパルス発振器の周波数変調用信号として出力
するように構成し、上記周波数任意変換回路の周波数変
換比率を所望の比率に設定することにより、上記第2の
電子遅延周波数変換回路の出力端子から前記入力楽音信
号の周波数が上記所望の比率で変換された出力楽音信号
が得られ、該周波数変換を受けない原入力楽音信号と該
出力楽音信号とを電気的に又はスピーカーを介して音響
的に混合して、所望の音程関係の複音による多彩な音色
効果が得られることを特徴とする合奏効果回路。1 A first electronic delay frequency conversion circuit that receives an output signal of a fixed frequency oscillator as input and converts and outputs the frequency of the input signal; and a second electronic delay frequency converter that receives a musical tone signal as input and converts and outputs the frequency of the input musical tone signal. a clock pulse oscillator that commonly controls each delay time of the conversion circuit and the first and second electronic delay frequency conversion circuits, or a clock pulse oscillator that is set to have a certain relationship between the oscillation frequencies of each of the clock pulse oscillators; A clock pulse oscillator, a modulation signal generation circuit that outputs a modulation signal for frequency modulating the oscillation frequency of the clock pulse oscillator, and inputting the output signal of the fixed frequency oscillator and frequency converting the signal at an arbitrary conversion ratio. and a frequency arbitrary conversion circuit for outputting, the modulation signal generation circuit inputs each output signal of the first electronic delay frequency conversion circuit and the frequency arbitrary conversion circuit, so that each output signal has the same frequency. By configuring the circuit to output a modulation signal with a frequency as a frequency modulation signal of the clock pulse oscillator, and setting the frequency conversion ratio of the frequency arbitrary conversion circuit to a desired ratio, An output musical tone signal in which the frequency of the input musical tone signal is converted at the desired ratio is obtained from the output terminal of the conversion circuit, and the original input musical tone signal that has not undergone the frequency conversion and the output musical tone signal are connected electrically or through a speaker. 1. An ensemble effect circuit characterized in that a variety of timbre effects can be obtained by acoustically mixing multiple tones in a desired pitch relationship.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP51121099A JPS5930273B2 (en) | 1976-10-07 | 1976-10-07 | ensemble effect circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP51121099A JPS5930273B2 (en) | 1976-10-07 | 1976-10-07 | ensemble effect circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5346017A JPS5346017A (en) | 1978-04-25 |
| JPS5930273B2 true JPS5930273B2 (en) | 1984-07-26 |
Family
ID=14802841
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP51121099A Expired JPS5930273B2 (en) | 1976-10-07 | 1976-10-07 | ensemble effect circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5930273B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10961751B2 (en) | 2016-07-20 | 2021-03-30 | Ansei Corporation | Vehicle door lock apparatus |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63190402U (en) * | 1987-05-28 | 1988-12-07 |
-
1976
- 1976-10-07 JP JP51121099A patent/JPS5930273B2/en not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10961751B2 (en) | 2016-07-20 | 2021-03-30 | Ansei Corporation | Vehicle door lock apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5346017A (en) | 1978-04-25 |
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