JPS5931028B2 - time adjustment device - Google Patents

Description

[Detailed description of the invention] The present invention relates to a time adjustment device.

Conventionally, for example, there is a world clock that generates a pulse every time a rotating body rotates a predetermined angle, and adjusts the time difference by increasing or decreasing the contents of a reversible counter depending on the direction of rotation.

However, according to this method, if the pulse and carry signal are supplied in duplicate, an error occurs in the contents of the reversible counter.

Therefore, in the present invention, when the carry signal and the correction pulse are supplied redundantly, the phases of the two are shifted and then supplied to the timekeeping device.

An embodiment of the present invention will be described below based on the drawings.

Figure 1 is a longitudinal sectional view of the exterior of this device, and Figure 2 is a vertical cross-sectional view of the exterior of the device.
It is a developed view with the outer frame removed.

In FIGS. 1 and 2, reference numeral 1 designates a watch body that incorporates a drive circuit 5 and also has a time display section 1at.

Reference numeral 1b denotes a groove formed in the watch body 1, into which two light-receiving elements 1d and le, such as photodiodes, are mounted.

Reference numeral 2 denotes a rotating disk that rotatably fits into the side surface of the display portion 1a of the watch body 1, and holes 2a...2a are provided at every 15 degrees.

2b is the place name display surface, which is divided into every 15 degrees.
With Tokyo as the standard, major place names from around the world are listed every 15 degrees of longitude.

Reference numeral 3 denotes a lamp, which is provided facing the light receiving elements 1d and 1e.

The light from the lamp 3 passes through the hole 2affi to the light receiving elements 1d and 1e.
However, when the rotary disk 2 is rotated clockwise, the light from the lamp 3 is supplied to the light receiving elements 1d and 1e in this order, and outputs are generated in this order.

If the rotation is counterclockwise, the output will be generated in the reverse order.

The light receiving elements 1d, 1e, the rotating disk 2, the lamp 3, etc. constitute a pulse generator.

Reference numeral 4 denotes an outer frame, which rotatably fixes the rotating disk 2 to the watch body 1.

Details of the drive circuit 5 will be explained based on FIG. 3.

6 is a reference signal generator such as a crystal oscillator, and 7 is a frequency divider.

8, 9.10 are a sexagesimal counter for seconds, a decimal counter for minutes, and a hexadecimal counter for tens of minutes, respectively.

11 and 12 are decoders, and 13 and 14 are display elements made of, for example, liquid crystal and formed with a number pattern.

15 is a decimal reversible counter that counts the first digit of time, and constitutes a timekeeping device.

16 is a grist switch such as a digital switch, and when the load force of the reversible counter 15 is supplied, the data content of the preset switch 16 is read into the reversible counter 15.

17 is a decoder, and 18 and 19 are display elements made of, for example, liquid crystal and formed with a number pattern, and display the first and tenth digits of time, respectively.

20.21 is the light receiving element 1d. This is an amplifier that amplifies the detection signal 1e.

22°23...31 are flip-flop circuits,
32°33...46 is Nantes Gate.

The gate circuit 34 constitutes a first control circuit, and the flip-flop circuit 27 and gate circuit 41 constitute a second control circuit.

47, 48...64 are inverters, and 65 is a delay element.

66 is an AND gate.

67 and 68 are lamps that indicate AM and PM, respectively.

69 is a light emitting diode, which blinks at intervals of about 1 second.

70 is a resistor, 71 is a manual switch for setting and resetting the flip-flop circuit 31, and 71a is a differentiation circuit for differentiating the falling edge of a pulse.

2 is a selection circuit for the detection signal of the rotating direction of the rotating disk 20, and 2 is a signal control circuit that prevents the carry signal from the counter 10 from duplicating the output of the selection circuit 2.

A and B are the outputs of the light receiving elements 1d and 1e, respectively.

E is a power source. The gate circuit 38 is an inhibit gate circuit, the gate circuits 34, 41, the inverter 53, and the flip-flop circuit 27 constitute a correction pulse generation circuit, and the gate circuit 37 constitutes a control circuit.

Next, the operation will be explained.

Now, in Fig. 1, if meridian 2c is Tokyo, and the time is 8:10 p.m., the time in area 2d, which is 15 degrees longitude away east of Tokyo, can be read as follows.

Rotate the rotating disk 2 clockwise to align the meridian 2d with the arrow 1c.

One of these extra-large 2a crosses the lamp 3 and has a light receiving element 1d,
The light from the lamp 3 enters Ie in this order.

Therefore, in FIG. 3, the pulses Pa and Pb of FIGS. 4A and 4B are generated at the outputs of amplifiers 20 and 21, respectively.

When the pulse Pa rises, the output of the gate circuit 66 falls, one pulse is generated from the differentiator circuit 71a, the flip-flop circuits 22 and 23 are reset, and pulses Pc and Pd are generated at the respective outputs c and d. .

The falling edge of the pulse Pc resets the flip-flop circuit 28 via the flip-flop circuit 22, and a pulse P e yPf is generated at its output e'p f, and the input of the Nandt gate 40.39 is l Q 91. 1".

The flip-flop circuit 22 is activated by the falling edge of the pulse Pa.
is triggered, and the flip-flop circuit 25 is triggered by its output pulse Pc.

It is assumed that the flip-flop circuit 25 is reset in the initial state, its output Q falls, and therefore the output of the Nant gate 37 rises.

At this time, it is assumed that the flip-flop circuit 24 has been reset in the initial state, and its output Q is held at °1", so the output of the Nant gate 38 does not fall.
Nando game) 39.40 single person power becomes '1''.

Therefore, the output of the Nant gate 39 falls, the count content of the reversible counter 15 is incremented by one and becomes 9, and the display section 1a
9:10 is displayed.

On the other hand, the inverted level "0" of the Q output of the flip-flop circuit 25 inverts the output of the Nant's gate 33 to "1" and holds it at If lt+, which is the output of the Nand's gate 35.

Since a 50 Hz pulse is supplied from the divider 7 to the output of the Nantes gates 35 and 41, the flip-flop circuit 26 is triggered at the first falling edge of the 50 Hz pulse after the output level of the Nantes gate 33 is inverted. Ru.

Therefore, at the rising edge of the next pulse, the output of the Nant gate 36 is inverted to 0''.

This inverted pulse is delayed like a pulse Pg via the delay element 65 and is sent to the flip-flop circuit 24.25°26.
Reset.

Therefore, the output of the inverter 55 is held at "0" to close the NAND game (Nando game) 39.40, and the flip-flop circuit 28 is triggered by the fall of the pulse Pd and returns to the initial state.

Next, a case will be described in which the rotary disk 2 is rotated counterclockwise by 15 degrees.

At this time, the light receiving elements Id and 1e include the element 1e, contrary to the above.
, 1d, the light from the lamp 3 is supplied in this order.

Therefore, contrary to the above, the output d of the flip-flop circuit 23 falls first, triggering the flip-flop circuit 28, which closes the Nant gate 39 and opens the Nant gate 40.

Thereafter, in exactly the same manner as described above, the count content of the reversible counter 15 is decreased by one using the output of the Nandt gate 40, and the count is delayed by one hour.

Similarly to the above, flip-flop circuits 24, 25 .
26 is reset, and the flip-flop circuit 28 is reset by the output of the flip-flop circuit 22.

When the carry signal from the minute counter 10 is supplied during the operation, it is necessary to prevent the two signals from overlapping.

This case will be explained below.

It is assumed that the rotating disk 2 is rotated clockwise when the counter 10 performs a digit operation.

First, the clip-flop circuit 24 is triggered by the carry operation, the level of the Q output is inverted, and a carry pulse is generated.
The count content of the reversible counter 15 is incremented by one.

At this time, the output of the Nant gate 37 is inverted to 1''' by the operation of the rotating disk 2, but the flip-flop circuit 24
Since the q output of inverter 5 is held at °0'''
The output of 5 is '0'' (Nando game) 39 and 40 are closed.

Similarly to the above, when the flip-flop circuits 24, 25, and 26 are reset by the rise of the output g, the output of the Nant gate 34 rises, the output of the inverter 53 falls, and the flip-flop circuit 27 is triggered. The output Q is inverted to 0'', and the output of the Nant gate 37 is inverted to 0.degree.

At this time, since the output of the flip-flop circuit 24 is held at 1", the output of the inverter 55 is inverted to 1".

By the way, since the flip-flop circuit 28 is in the reset state, the count content of the reversible counter is incremented by one.

Note that the flip-flop circuit 27 uses this Q output and the frequency divider I
It is reset by the output of

Further, when the rotation of the rotary disk 2 is counterclockwise, a carry signal is generated for the counter 10 in the same manner as described above, the reversible counter 15 is incremented by one, and the count content is increased by one by the output of the Nant gate 40. reduce.

Next, the morning and afternoon identification displays will be explained.

Assuming that the time zone is in the afternoon and the lamp 68 is turned on, a case will be described in which the time zone shifts from this state to the morning time zone.

The reversible counter 15 counts 1 at 11:00 pm, and the flip-flop circuit 29 is in the set state.

Then, at 12 o'clock, the count output of the reversible counter 15 inverts the output of the Nant gate 45 to 0''.

This inverted output is connected to the Nant gate 46 and the inverter 62.
The state of the flip-flop circuit 31 is inverted via the ?, and the lamp 67 is turned on to display AMffi.

On the other hand, the inverted output of the NAND gate 45 resets the flip-flop circuit 29 and the reversible counter 15, and displays 0 o'clock on the display elements 18 and 19.

In the case of addition counting, it operates as described above.

By the way, when the content of the reversible counter 15 becomes 0, it is 10 o'clock and 12 o'clock, but in the case of subtraction counting, when one is subtracted from 10 o'clock, the content of the reversible counter 15 becomes 0 to 9,
When one is subtracted from 12 o'clock, it must be 0 to 1.

Therefore, the case of subtraction counting will be explained.

If the current time is 1 a.m. and the disk 2 shown in the first figure is rotated counterclockwise in the drawing from this state, the Nantes gate 4
At the first pulse generated from 0, the reversible counter 150 is switched to the subtraction counting circuit side, and at the same time the contents of the reversible counter 15 change from ``1'' to 0''.

Therefore, midnight is displayed on the display sections 18 and 19.

When the disk 2 is further rotated counterclockwise, a second pulse is generated from the Nandt gate 40, the content of the reversible counter 15 becomes "9", and the output of the terminal AI + DI becomes °0-".
0'', and the single power of the Nant gate 43 is maintained at ``1''.

On the other hand, the level of the digit output terminal of the subtraction counting circuit in the reversible counter 15 is inverted, triggering the flip-flop circuit 30 and
The output f 9+ is inverted to Q 91.

Therefore, the output of the Nant gate 43 is inverted to .degree. 1'', inputted for writing, and fully opened to write the content 1 of the preset switch 16 to the reversible counter 15.

Furthermore, the flip-flop circuit 29 is triggered by the carry output of the addition counting circuit side of the reversible counter 15, and the Q output becomes °゛1'''.
occurs.

Therefore, the display elements 18 and 19 display 11 o'clock.

Further, the Nant gate 46 is inverted to "0" by the inverted level "0" of the Nant gate 43, and triggers the flip-flop circuit 31.

Therefore, the afternoon lamp 68 is turned on.

When the disc 2 is further rotated and the contents of the reversible counter 15 change from 0 to '9', the flip-flop circuit 30 is triggered and the Q output becomes '1', so the Nant gate 43 is not affected by the other person's power. The output of 43 is held at '1'.

On the other hand, the Q output of the flip-flop circuit 29 is inverted to 0'' by the output from the adder circuit, and the lighting of the display element 19 is turned off.

Therefore, only "9'" is displayed on the display element 18.

Next, an embodiment in which a date display device is added to the above device will be described.

In Figure 5, 72 is the international date line, and on the actual current side, it is divided into 15 degrees of longitude with Tokyo as the standard.
a...2a', so the hole 2a is not located on the date change line 72.

73 is a hole provided on the date line 72 on a different circumference from the holes 2a... 2a, 74 is a lamp, and a groove 75 similar to the groove 1b of the above embodiment is opposed. In addition, a light receiving element is embedded in the groove 75.

Therefore, when the hole 73 crosses in front of the lamp 74, the light receiving element catches the light from the lamp 74.

Note that the same reference numerals as in FIGS. 1 and 2 indicate the same parts.

The circuit of the watch body in the above configuration will be explained.

In FIG. 6, 76 is an amplifier that amplifies the output H of the light receiving element, and 7γ is a flip-flop circuit.

78 is a 31-decimal reversible counter that counts the date, and 79
is a decoder.

80.81 are display elements for displaying the 10th and 1st digits of a date, for example, on a liquid crystal display, forming a digit pattern.

82 and 83 are inverters, and 84 is an AND gate.

85 is a manual switch for correcting the date.

Reference numeral 86 is a 24-ary reversible counter for counting time, and is supplied with the same input as the reversible counter 15 of the previous embodiment.

87 is a decoder, and 88.89 are each time 1
Rank.

It is a display element that displays the 10th place, for example, a liquid crystal display or the like with a Japanese numeral button formed thereon.

Note that the same reference numerals as in FIG. 3 indicate the same parts.

Next, the operation will be explained.

Now, when the rotary disk 2 is rotated clockwise from the state shown in FIG. 5, the hole 2a crosses the lamp 3, and the count of the reversible counter 86 is incremented by one as in the previous embodiment.

At the same time, a pulse is generated at the output J of the selection circuit I, which triggers the flip-flop circuit 77 via the inverter 51, thereby maintaining the single power of the AND gate 84 at "1".

Subsequently, when the hole 73 crosses in front of the lamp 74, a pulse is generated at the output H of the light receiving element and is supplied to the AND gate 84 via the amplifier 76.

Therefore, the output of the AND gate 84 is supplied to the signal control circuit H via the inverter 83 at the rising edge, and as in the previous embodiment, the count content of the reversible counter 78 is incremented by one.
Advance the date by one day.

Further, the rising signal of the AND gate 84 is applied to the inverter 8
2 to reset the flip-flop circuit 77.

Note that when the rotary disk 2 is rotated counterclockwise and the hole 73 crosses in front of the lamp 74, the count content of the reversible counter 78 is subtracted by one as in the previous embodiment.

Further, the operation when the carry signal of the reversible counter 86 and the count signal to the reversible counter 78 due to the rotation of the rotary disk 2 are simultaneously supplied to the signal control circuit H is the same as in the previous embodiment.

In the above embodiment, a lamp and a light receiving element are used to detect the rotating disk, but a magnetically sensitive element or a mechanical switch such as a microswitch may be used instead.

Also, instead of using a rotating disk, a globe or the like may be used.

Furthermore, in the first embodiment, the time was displayed in decimal, but
If it is displayed in 4 decimal notation, there is no need to display AM/PM.

Furthermore, in the second embodiment, the date line detection device may be similar to the time change line detection device, and the rotational direction of the rotating disk may also be detected at the same time.

As described in detail above, according to the present invention, since overlap of carry pulses and correction pulses is prevented, accurate time can always be displayed.

[Brief explanation of drawings]

FIG. 1 is a vertical sectional view of the exterior of an embodiment of the present invention, FIG. 2 is a developed view of the main parts of the embodiment of FIG. 1, FIG. 3 is a circuit diagram of an embodiment of the present invention, and FIG. The figure is a time chart for explanation,
FIG. 5 is a plan view of a main part of another embodiment, and FIG. 6 is a circuit diagram of the embodiment of FIG. 1d, 1e... Light receiving element, 2... Rotating disk, 3, 7
4...Lamp, 2a...2a, 73...Hole, 15
...Clock circuit, ■...Signal control circuit, 24,
25.27...Flip-flop circuit, 34,
41...Gate circuit, 37...Control circuit, 38...Prohibition gate circuit.

Claims (1)

[Claims] 1. A pulse generator that generates correction pulses by manual operation, a timekeeping device that measures time using carry pulses, and when the correction pulse and carry pulse overlap, the correction pulse is supplied to the timekeeping device. A prohibition gate circuit that prohibits the above, a correction pulse generation circuit that generates one pulse when the carry pulse stops generating when the above overlap occurs, and a control circuit that supplies the pulse from this correction pulse generation circuit to the above timing device. A time adjustment device consisting of.