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JPS5931212B2 - Method for manufacturing compound semiconductor device - Google Patents
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JPS5931212B2 - Method for manufacturing compound semiconductor device - Google Patents

Method for manufacturing compound semiconductor device

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Publication number
JPS5931212B2
JPS5931212B2 JP49101717A JP10171774A JPS5931212B2 JP S5931212 B2 JPS5931212 B2 JP S5931212B2 JP 49101717 A JP49101717 A JP 49101717A JP 10171774 A JP10171774 A JP 10171774A JP S5931212 B2 JPS5931212 B2 JP S5931212B2
Authority
JP
Japan
Prior art keywords
electrode
compound semiconductor
heat treatment
wafer
light emitting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP49101717A
Other languages
Japanese (ja)
Other versions
JPS5128483A (en
Inventor
喜進 早川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP49101717A priority Critical patent/JPS5931212B2/en
Publication of JPS5128483A publication Critical patent/JPS5128483A/en
Publication of JPS5931212B2 publication Critical patent/JPS5931212B2/en
Expired legal-status Critical Current

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Description

【発明の詳細な説明】 本発明は発光ダイオード等の化合物半導体装置の製造方
法に関し、特にGaAs、CaP等のI一V化合物半導
体を用いた発光ダイオードのP型結晶に低抵抗接触する
電極の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing compound semiconductor devices such as light emitting diodes, and in particular to manufacturing an electrode that makes low resistance contact with a P-type crystal of a light emitting diode using an I-V compound semiconductor such as GaAs or CaP. Regarding the method.

GaPを用いた赤色および緑色発光ダイオードやSiの
両性不純物の性質を使い一度の成長でP−N接合を形成
する赤外発光ダイオードなどのP型結晶に対するオーム
性電極材料として金(Au)−Zn、Au−Zn−Ni
、Au−Zn−インジウム(In)Au−ヘリウム(B
e)などの金系オーミック電極材料が広く用いられてい
る。上記GaP発光ダイオードのP型結晶中の不純物濃
度は約1017儂−3が最適であり、GaP自体バンド
巾が大きいことおよび残留不純物が多く不純物補償して
いるためオーム性接触が得られにくい。GaAs発光ダ
イオードはSiのGa格子点を置換するものとAs格子
点を置換するものの割合が温度で変わることを利用して
P−N接合を形成しているためP型形晶は不純物補償し
ているためオーム性接触が得られにくい。オーム性接触
が得にくい結晶にオーム性電極を形成するため拡散又は
イオン注入法で表面の不純物濃度を増大せしめる方法が
通常行なわれており、上記GaP、GaAs、GaxA
4−xAS発光ダイオードに対しても亜鉛を拡散し表面
濃度を増大せしめた上で上記金系電極材料を付加しオー
ム性電極を形成している。GaAsとGaPの混晶であ
るGaAs1−xPxを用いた発光ダイオードでは、ア
ルミニウムが単独で良好なオーム性電極となり、拡散し
てP−N接合を形成し、その拡散表面にAlを蒸着し、
熱処理する方法が行なわれている。AlはGaAsxP
1−xのP型電極としては良好であるがGaAs、Ga
P、GaxA爲−xAsに対しては仕事関数が一致しな
いのでオーム性接触を得るのは難しい。
Gold (Au)-Zn is used as an ohmic electrode material for P-type crystals such as red and green light-emitting diodes using GaP and infrared light-emitting diodes that form a P-N junction in a single growth using the amphoteric impurity properties of Si. , Au-Zn-Ni
, Au-Zn-indium (In) Au-helium (B
Gold-based ohmic electrode materials such as e) are widely used. The optimal impurity concentration in the P-type crystal of the GaP light emitting diode is approximately 1017°-3, and it is difficult to obtain ohmic contact because GaP itself has a large band width and there are many residual impurities for impurity compensation. GaAs light emitting diodes form a P-N junction by taking advantage of the fact that the ratio of Ga lattice points and As lattice points in Si changes with temperature, so P-type crystals compensate for impurities. Because of this, it is difficult to obtain ohmic contact. In order to form ohmic electrodes on crystals where ohmic contact is difficult to obtain, a method of increasing the impurity concentration on the surface by diffusion or ion implantation is commonly used.
Also for the 4-xAS light emitting diode, zinc is diffused to increase the surface concentration and then the gold-based electrode material is added to form an ohmic electrode. In a light emitting diode using GaAs1-xPx, which is a mixed crystal of GaAs and GaP, aluminum alone becomes a good ohmic electrode, diffuses to form a P-N junction, and deposits Al on the diffusion surface.
A heat treatment method is used. Al is GaAsxP
Although it is good as a P-type electrode for 1-x, GaAs, Ga
It is difficult to obtain ohmic contact for P, GaxA -xAs because the work functions do not match.

GaAs、GaPの発光ダイオードに広く用いられてい
る金系オーム性電極材料は化学的に安定である利点はあ
るが、け料が高価であることやフォトレジスタ技術によ
り選択エッチする場合、使用できるエッチング液および
これにともなう工程が限られてしまう欠点がある。
The gold-based ohmic electrode material widely used in GaAs and GaP light-emitting diodes has the advantage of being chemically stable, but the etching material that can be used is expensive and selective etching using photoresistor technology is difficult. The disadvantage is that the liquid and the processes involved are limited.

又発光ダイオードは低価格が要求されるためペレットの
組み立てを自動化することが必要である。
Furthermore, since light emitting diodes are required to be low in cost, it is necessary to automate the assembly of pellets.

通常の発光ダイオードの組み立てはペレットを共晶金属
材料を用い、N型結晶側をステムにマウントし、P型電
極上に金線をボンディングする方法が行なわれている。
上記の金系電極材料を用いた電極に金線をボンデイング
する場合、ボンデイングが付きにくい欠点があり、特に
自動ボンデイング装置で行なう場合、手動に比ベペレツ
トを加熱する温度を高くすることやボンデイング加重を
大きくすることが必要になり、ボンデイング時にベレツ
トに損傷を与え、素子の特性ならびに信頼度を著しく低
下させることになる。本発明は、上記の欠点を除き、低
価格の材料を用い、素子の特性および信頼度の低下を軽
減し、ポンデイングの自動化を可能にする化合物半導体
装置の製造方法を提供するものである。
A normal light emitting diode is assembled by using a pellet made of eutectic metal material, mounting the N-type crystal side on a stem, and bonding a gold wire onto the P-type electrode.
When bonding a gold wire to an electrode using the above-mentioned gold-based electrode material, there is a drawback that bonding is difficult to achieve.Especially when using automatic bonding equipment, it is necessary to raise the temperature at which the pellet is heated and the bonding load to be applied compared to manual bonding equipment. This would result in damage to the beret during bonding, significantly reducing the characteristics and reliability of the device. The present invention provides a method for manufacturing a compound semiconductor device that eliminates the above-mentioned drawbacks, uses low-cost materials, reduces deterioration in device characteristics and reliability, and enables automation of bonding.

すなわち、本発明によれば、P型−化合物半導体上に5
0A以上、1000Å以下の厚さのニツケル層、500
Å以上、2000λ以下の厚さの亜鉛層、これらより厚
いアルミニウム層を順次形成し、熱処理を行なうことに
よつて上記P型−V化合物半導体への抵抗接触を形成す
ることを特徴とする化合物半導体装置の製造方法が得ら
れる。
That is, according to the present invention, 5
Nickel layer with a thickness of 0 A or more and 1000 Å or less, 500
A compound semiconductor characterized in that a resistive contact to the P-type-V compound semiconductor is formed by successively forming a zinc layer with a thickness of Å or more and 2000λ or less and an aluminum layer thicker than these and performing heat treatment. A method for manufacturing the device is obtained.

本発明の方法では電極オ料の主体がAlであるため金線
との付着が容易であり、金系電極材料に比べ低温でかつ
低ボンデイング加重でのボンデイングが可能となりボン
デイングの自動化を容易にすることができる。
In the method of the present invention, since the electrode material is mainly made of Al, it is easy to adhere to the gold wire, and bonding can be performed at a lower temperature and with a lower bonding load compared to gold-based electrode materials, making it easier to automate bonding. be able to.

次に本発明の実施例を図面を参照して行なう。Next, embodiments of the present invention will be described with reference to the drawings.

実施 1第1図は本発明の実施例に用いられたCaP発
光ダイオード用ウエーハの断面図であり、N型GaP基
板10上にN型エピタキシヤル層11とP型エピタキシ
ヤル層12が液相エピタキシヤル成長により形成されて
いる。
Implementation 1 FIG. 1 is a cross-sectional view of a CaP light emitting diode wafer used in an example of the present invention, in which an N-type epitaxial layer 11 and a P-type epitaxial layer 12 are formed on an N-type GaP substrate 10 by liquid phase epitaxy. It is formed by natural growth.

基板の不純物は硫黄であり、5〜10X1017cTr
L−3の不純物濃度である。赤色発光ダイオード用のウ
エーハではn型エピタキシヤル層11にテルル(Te)
,P型エピタキシヤル層12には亜鉛(Zn)と酸素(
0)がドープされ、緑色特光ダイオード用ウエーハでは
N型エピタキシヤル層11に硫黄(S)と窒素(N),
P型エピキシヤル層にZnとNがドープされている。P
型エピタキシヤル層表面不純物濃度は赤色用、緑色用と
もに1〜3×10170rtL−3である。上記GaP
ウエーハ数枚を亜鉛1007r9とGaPの粉末200
即を加えて石英管内に真空封入する。GaPウエーハを
封入した石英管を炉の均一分布中に挿入し、750℃で
60分間の拡散ノブ を行なう。
The impurity of the substrate is sulfur, 5~10X1017cTr
This is the impurity concentration of L-3. In the wafer for red light emitting diodes, the n-type epitaxial layer 11 is made of tellurium (Te).
, the P-type epitaxial layer 12 contains zinc (Zn) and oxygen (
In the wafer for a green special light diode, the N-type epitaxial layer 11 is doped with sulfur (S), nitrogen (N),
The P-type epitaxial layer is doped with Zn and N. P
The surface impurity concentration of the type epitaxial layer is 1 to 3 x 10170rtL-3 for both red and green. The above GaP
Several wafers were mixed with zinc 1007r9 and GaP powder 200
Add soybean powder and vacuum seal in a quartz tube. The quartz tube containing the GaP wafer is inserted into the uniform distribution furnace and a diffusion knob is performed at 750° C. for 60 minutes.

石英管の一端を急冷し、蒸発した亜鉛を析出させ拡散を
停止させる。拡散したGaPウエーハを硝酸と塩酸の混
合液に浸し、表面の汚れを除去した後、金属製マスクを
のせ真空蒸着装置内に入れNi,Zn,Alを蒸着する
。蒸着された上記金属膜の厚さはGaPウエーハの近く
に置かれたガラスの蒸着膜が付着した部分と付着しない
部分の境界を干渉顕微鏡を使つて測定した。
One end of the quartz tube is rapidly cooled to precipitate the evaporated zinc and stop diffusion. The diffused GaP wafer is immersed in a mixture of nitric acid and hydrochloric acid to remove dirt from the surface, then a metal mask is placed on the wafer and the wafer is placed in a vacuum deposition apparatus to deposit Ni, Zn, and Al. The thickness of the deposited metal film was measured using an interference microscope at the boundary between a portion of glass placed near the GaP wafer to which the deposited film was attached and a portion not attached.

蒸着量の少ないNiおよびZnの膜厚は、蒸発量と膜厚
が比例するものとして推定した。Niを全く蒸着せずZ
nとAlのみ蒸着して低抵抗電極の形成を試みた。Ni
を蒸着しなくてもオーム性接触は得られたが、GaPウ
エーハ表面に拡散時に生じた曇りなどの汚れがあると電
極がはがれやすいことおよび熱処理したとき電極が凝縮
し電極面積が小さくなりやすい欠点があつた。これらの
欠点を防止するためにもNiは50A以上は必要である
。一方Ni膜を2,000人程度蒸着した場合、550
℃、5分間の熱処理で低抵抗接触が得られなかつた。望
ましい低抵抗接触を得るためにはNiは1,000Å以
下が望ましい。第2図はNiの蒸着量を30η、A2の
膜厚を1.5μに固定し、Znの蒸発量を変えたとき、
面積2×10−4c7n−3の電極に対して10mA通
電したときの接触抵抗Ra〔Ω〕の変化を示したもので
あり、熱処理条件は550℃、5分間に設定した。Zn
の蒸発量が100T!If(電極上のZn膜厚は2,0
00λであつた)を越えると金線のボンデイング強度が
低下するためZnの蒸発量は100ワ以下、すなわち2
,000λ以下にすることが好ましい.また接触抵抗を
十分小さくするためにはZnは25η、すなわち500
A以上が望ましい。第3図はNiの蒸発量を30Tf1
9、Znの蒸発量を80〜Alの膜厚を1.5μに固定
し、熱処理温度T〔℃〕を変えたときの上記電極の接触
抵抗Rc〔Ω〕の変化を示すもので、熱処理時間は5分
間に固定した。
The film thickness of Ni and Zn, which have a small amount of evaporation, was estimated on the assumption that the amount of evaporation and the film thickness are proportional. Z without evaporating Ni at all
An attempt was made to form a low resistance electrode by depositing only n and Al. Ni
Ohmic contact was obtained even without vapor deposition, but the disadvantages are that the electrodes tend to peel off if there is cloudiness or other contamination on the surface of the GaP wafer that occurs during diffusion, and that the electrodes tend to condense during heat treatment, resulting in a smaller electrode area. It was hot. In order to prevent these drawbacks, Ni needs to be at least 50A. On the other hand, if a Ni film is deposited by about 2,000 people, 550
A low resistance contact could not be obtained by heat treatment at ℃ for 5 minutes. In order to obtain a desired low resistance contact, the Ni thickness is preferably 1,000 Å or less. Figure 2 shows the results when the amount of Ni evaporated was fixed at 30η, the thickness of A2 was fixed at 1.5μ, and the amount of Zn evaporated was changed.
The figure shows the change in contact resistance Ra [Ω] when a current of 10 mA is applied to an electrode with an area of 2×10 −4 c7 n −3 , and the heat treatment conditions were set at 550° C. for 5 minutes. Zn
The amount of evaporation is 100T! If (the Zn film thickness on the electrode is 2.0
00λ), the bonding strength of the gold wire decreases, so the amount of Zn evaporated is less than 100W, that is, 2
,000λ or less. In addition, in order to make the contact resistance sufficiently small, Zn should be 25η, that is, 500
A or higher is desirable. Figure 3 shows the amount of Ni evaporation at 30Tf1.
9. It shows the change in contact resistance Rc [Ω] of the above electrode when the heat treatment temperature T [°C] is changed with the Zn evaporation amount fixed at 80 and the Al film thickness 1.5μ, and the heat treatment time was fixed at 5 minutes.

熱処理の温度としては450〜600℃とすると接触抵
抗は極めて小さくなつた。第4図は第3図と同じ蒸着条
件で蒸着を行い、熱処理温度を550℃に固定し、熱処
理時間〔MiIl〕を変えたときの前記電極の接触抵抗
Rc〔Ω〕の変化を示す。この結果熱処理時間は3分以
上は必要であることがわかる。上記の実験結果に基づき
P型電極を形成したGaPウエーハの裏面を全体の厚さ
が180μになるまで研摩し、Au+SiI::.Au
を順次に付着して500℃、5分間の熱処理を行ない裏
面電極を形成した。
The contact resistance became extremely small when the heat treatment temperature was 450 to 600°C. FIG. 4 shows the change in the contact resistance Rc [Ω] of the electrode when vapor deposition was performed under the same vapor deposition conditions as in FIG. 3, the heat treatment temperature was fixed at 550° C., and the heat treatment time [Mil] was changed. As a result, it can be seen that a heat treatment time of 3 minutes or more is required. Based on the above experimental results, the back side of the GaP wafer on which the P-type electrode was formed was polished to a total thickness of 180 μm, and Au+SiI::. Au
were sequentially deposited and heat treated at 500° C. for 5 minutes to form a back electrode.

このウエーハをダイアモンドポイントスクライバ一を使
つて、0.4m11四方のペレツトに分割し、発光ダイ
オードペレツトを製作した。このペレツトを用いて自動
ポンデイング装置による組み立てを行なつた結果、金系
オーム性電極に比べ低温、低加重のボンデイングが可能
となり、組み立て後の逆方向電流増大による不良数を約
20%に低減することができた。
This wafer was divided into 0.4 m x 11 pellets using a diamond point scriber to produce light emitting diode pellets. As a result of assembling these pellets using an automatic bonding device, it is possible to bond at a lower temperature and with less stress than with gold-based ohmic electrodes, reducing the number of defects due to increased reverse current after assembly to approximately 20%. I was able to do that.

実施例 2 第5図は本実施例に用いられたシリコン (Si)ドープGaAsのウエーハ断面図であり、N型
基板20の(100)面にSiをドープして液相エピタ
キシヤル成長を行ない一回の成長でN型エピタキシヤル
層21およびP型エピキシヤル層22を形成したもので
ある。
Example 2 FIG. 5 is a cross-sectional view of a silicon (Si)-doped GaAs wafer used in this example. An N-type epitaxial layer 21 and a P-type epitaxial layer 22 are formed in the same growth process.

第5図のGaAsウエーハを通常のエツチング液でl〜
2μエツチングした後ZnlOO即、砒素(As)10
0〜を加えて石英管中に封入し、730℃、1時間拡散
する。
The GaAs wafer shown in Figure 5 was etched with a normal etching solution.
After 2μ etching, ZnlOO immediately, arsenic (As) 10
0~ is added, sealed in a quartz tube, and diffused at 730°C for 1 hour.

拡散した上記ウエーハにメタルマスクをのせて実施例1
と同様な方法でNi,Zn,A2を蒸着し、470℃、
5分間の熱処理を行ない低抵抗接触を得た。本発明によ
る電極の接触抵抗は0.1Ωであり、発光ダイオード等
の電極としては十分実用に供し得るものである。
Example 1 by placing a metal mask on the above diffused wafer
Ni, Zn, and A2 were vapor-deposited in the same manner as in 470°C.
A heat treatment was performed for 5 minutes to obtain a low resistance contact. The contact resistance of the electrode according to the present invention is 0.1Ω, which is sufficient for practical use as an electrode for light emitting diodes and the like.

実施例 3 実施例2に示したシリコンドープGaAsウエーハスに
対して、実施例2に示した工程により亜鉛を拡散したウ
エーハに電極金属材料として亜鉛(Zn)インジウム(
In)、アルミニウム(Al)を用いた。
Example 3 Zinc (Zn), indium (
In) and aluminum (Al) were used.

亜鉛を60W1f7入れたコニカルヒーター1本とイン
ジユームを約5重量?含んだAlを29入れたコニカル
ヒーター2本を蒸着装置内に取り付け所定の真空度で先
ず亜鉛を蒸着し、続いてインジウムを含んだAlを蒸着
した。
One conical heater containing 60W1f7 zinc and about 5 weight of indium? Two conical heaters containing 29% of aluminum containing aluminum were installed in a vapor deposition apparatus, and zinc was first vapor-deposited at a predetermined degree of vacuum, and then aluminum containing indium was vapor-deposited.

全体の厚さは約1μである。上記の金属膜を付加したウ
エーハを窒素を51/Min流したジッター炉で500
℃、5分間の熱処理を行なった。
The total thickness is approximately 1μ. The wafer with the metal film added above was placed in a jitter furnace with nitrogen flowing at 51/min for 500 min.
A heat treatment was performed at ℃ for 5 minutes.

電極間に探針を立て電流と電圧の関係をカーブトレーサ
ーで調べたところほぼ直線性を示し、10mA通電した
ときの抵抗値Rc〔Ω〕は実施例2の金属材料で得られ
た値と同程度の0.1Ωが得られた。
When a probe was placed between the electrodes and the relationship between current and voltage was examined using a curve tracer, it was found to be almost linear, and the resistance value Rc [Ω] when 10 mA was applied was the same as the value obtained with the metal material in Example 2. A value of about 0.1Ω was obtained.

このウエーハの裏面をウエーハス全体の厚さが160μ
になるまで研摩し、通常行なわれているAu+Ge系の
オートミツク電極を形成した。ダイアモンドポイントス
クライバ一によりへき開方向にスクライブし、ペレツト
に分割した。このペレツトをNTC型の自動ボンデイン
グ装置に使つた結果、従来の金系オーミツク電極(ご比
べ、ボンデイングが容易であり、従来の金系電極の場合
に発生した温度サイクルにおける樹脂の変化によるボン
デイング線と電極間のはがれを防ぐことができた。又上
記の方法でつくつたGaAs赤外発光ダイオードの順方
向の電圧は50mAで1.2〜1.4の規格に入つてい
た。
The back side of this wafer has a total thickness of 160 μm.
A commonly used Au+Ge-based automic electrode was formed by polishing the electrode until it became opaque. It was scribed in the cleavage direction with a diamond point scriber and divided into pellets. As a result of using this pellet in an NTC-type automatic bonding device, it was found that bonding was easier than with conventional gold-based ohmic electrodes (compared to conventional gold-based ohmic electrodes), and bonding wires were formed due to changes in the resin during temperature cycles that occurred with conventional gold-based electrodes. Peeling between the electrodes could be prevented.Also, the forward voltage of the GaAs infrared light emitting diode produced by the above method was within the standard of 1.2 to 1.4 at 50 mA.

本実施例に於いてもInは低抵抗接触のためには、A/
!に対しl〜20重量%が望ましい。本発明の実施例は
GaPの発光ダイオードおよびSiドープGaAs発光
ダイオードを例として説明したが、本発明の方法はSi
ドープ以外のGaAs発光ダイオードのP型結晶に対す
る電極形成法として適用できることは言うまでもない。
又実施例ではP型結晶表面の不純物濃度を増大せしめる
ために拡散を行なつた例を示したが、イオン注入やエピ
タキシヤル成長中に不純物をドープして表面濃度を増大
させたウエーハにも適用できるものである。以上詳細に
説明したように本発明の方法によれば低価格の電極材料
を使いかつ自動ボンデイング装置に適用した場合、不良
発生数を低減できる実用的な電極を形成することができ
る。
In this example as well, In is used as A/
! It is desirable that the amount is 1 to 20% by weight. Although the embodiments of the present invention have been described using GaP light emitting diodes and Si-doped GaAs light emitting diodes as examples, the method of the present invention
It goes without saying that this method can also be applied as an electrode formation method for P-type crystals of GaAs light emitting diodes other than doped ones.
In addition, although the example shows an example in which diffusion is performed to increase the impurity concentration on the surface of a P-type crystal, it can also be applied to wafers in which the surface concentration is increased by doping impurities during ion implantation or epitaxial growth. It is possible. As described above in detail, according to the method of the present invention, when using low-cost electrode materials and applying it to an automatic bonding apparatus, it is possible to form a practical electrode that can reduce the number of defects.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図および第5図は本発明の実施例に用いられるウエ
ーハの断面図である。 第2図はZnの蒸発量と電極の接触抵抗の関係、第3図
は熱処理温度と電極の接触抵抗の関係、第4図は熱処理
時間と電極の接触抵抗の関係を示す。10,20・・・
・・・N型基板結晶、11,21・・・・・・N型エピ
タキシヤル層、12,22・・・・・・P型エピタキシ
ヤル層。
1 and 5 are cross-sectional views of wafers used in embodiments of the present invention. FIG. 2 shows the relationship between the amount of Zn evaporated and the contact resistance of the electrode, FIG. 3 shows the relationship between the heat treatment temperature and the contact resistance of the electrode, and FIG. 4 shows the relationship between the heat treatment time and the contact resistance of the electrode. 10, 20...
... N type substrate crystal, 11, 21... N type epitaxial layer, 12, 22... P type epitaxial layer.

Claims (1)

【特許請求の範囲】[Claims] 1 P型III−V化合物半導体上に50Å以上、100
0Å以下の厚さのニッケル層、500Å以上、2000
Å以下の厚さの亜鉛層、これらより厚いアルミニウム層
を順次形成し、熱処理を行なうことによつて前記P型I
II−V化合物半導体への低抵抗接触を形成することを特
徴とする化合物半導体装置の製造方法。
1 50 Å or more, 100 Å on P-type III-V compound semiconductor
Nickel layer with thickness less than 0 Å, more than 500 Å, 2000 Å
By sequentially forming a zinc layer with a thickness of Å or less and an aluminum layer thicker than these, and performing heat treatment, the P-type I
A method of manufacturing a compound semiconductor device comprising forming a low resistance contact to a II-V compound semiconductor.
JP49101717A 1974-09-03 1974-09-03 Method for manufacturing compound semiconductor device Expired JPS5931212B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP49101717A JPS5931212B2 (en) 1974-09-03 1974-09-03 Method for manufacturing compound semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP49101717A JPS5931212B2 (en) 1974-09-03 1974-09-03 Method for manufacturing compound semiconductor device

Publications (2)

Publication Number Publication Date
JPS5128483A JPS5128483A (en) 1976-03-10
JPS5931212B2 true JPS5931212B2 (en) 1984-07-31

Family

ID=14308043

Family Applications (1)

Application Number Title Priority Date Filing Date
JP49101717A Expired JPS5931212B2 (en) 1974-09-03 1974-09-03 Method for manufacturing compound semiconductor device

Country Status (1)

Country Link
JP (1) JPS5931212B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2706660B2 (en) * 1996-01-26 1998-01-28 豊田合成株式会社 Gallium nitride based compound semiconductor electrode forming method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2230078B1 (en) * 1973-05-18 1977-07-29 Radiotechnique Compelec

Also Published As

Publication number Publication date
JPS5128483A (en) 1976-03-10

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