JPS5931256B2 - phase synchronized circuit - Google Patents

Description

[Detailed Description of the Invention] A phase-locked circuit generally uses a phase comparison circuit (hereinafter abbreviated as PD) and a voltage controlled oscillator (hereinafter abbreviated as VCO), compares an input signal and the VCO output with the PD, and uses the PD output to compare the input signal and the VCO output. v
A method is used in which the CO is controlled so that the PD output is balanced to 0, that is, the vCO output and the input signal have a phase difference of 90°.

However, this method has problems with the stability of PD and vCO, and improvements are desired.

The present invention provides a stable and reliable phase synchronization circuit by digitalizing the operations of PD and vCO.

FIG. 1 shows an embodiment of the present invention.

(In the figure, the hour symbol indicates a digital transmission path with a certain number of bits.

) The input signal fi is digitized by the A-D converter circuit 2. However, since the A-D converter circuit 2 is generally incapable of responding to positive/negative polarity changes, the input signal fi is digitized by the DC superimposing circuit 1. A superimposed DC voltage Eo having an amplitude greater than that is superimposed on the signal and applied to the A-D conversion circuit 2 as a single-polarity signal.

In the method of using a full-wave rectifier circuit as a means to make the input signal fi into a single polarity, when the input signal fi is accompanied by unnecessary signals such as noise, these combined waves are generated, which adversely affects the accuracy and stability of phase control. There is a risk of damage.

The output of the A-D converter circuit 2 is switched between the true number and the complement every half cycle of the local signal by the addition/subtraction switching circuit 3, that is, the polarity is digitally inverted, and then the output is sent to the next integration circuit 4. Accumulate.

If the output of the A-D conversion circuit 2 is a constant value, the addition/subtraction switching circuit 3 switches the polarity every half cycle, so the integration result of the integration circuit 4 becomes 0.

In other words, the DC component superimposed by the DC superimposition circuit 1 does not appear in the output of the integration circuit 4.

By this operation, the previously superimposed DC voltage Eo is canceled out in one cycle period or in the integration of an integral multiple thereof, and does not affect the following operation.

For the input signal fi, the following integration will be performed digitally.

This integral becomes O when θ-π/2, and the sign is reversed before and after that.

Here, θ is the phase difference between the input signal fi and the local signal fo,
ω is the angular frequency of the input signal fi.

Therefore, if the output of the integrating circuit 4 is verified every cycle and the phase of the local signal fo is controlled so that it becomes 0, the local signal fo will match the frequency of the input signal fi (fi = fo) and the input signal It is possible to balance the phase difference to 90° with respect to fi.

For this reason, in FIG. 1, a pulse is generated at the conversion point of the local signal fo by the differentiating circuit 9, and the contents of the integrating circuit 4 are transferred to the latch circuit 5 every - period, thereby controlling the pulse rate variable circuit 7, The frequency dividing circuit 80 adjusts and subtracts input pulses to generate a local signal f.

control the phase of

Various methods have been announced for the phase control of the local signal fo using this digital method. For example, pulse rate control uses only the positive and negative signals of the output of the latch circuit 5, performs only small and small control with respect to the reference number, and achieves equilibrium. In order to prevent bunching before and after the point, the phase control time may be adjusted using the magnitude of the output of the latch circuit 5.

There are various methods for this; for example, the latch circuit 50
A method of adjusting the hold time depending on the size can also be used.

FIG. 2 shows another embodiment of the invention.

When the input signal fi is not a single sine wave but contains harmonics, depending on the phase relationship, the above-mentioned θ-π/2
Therefore, the content of the integrating circuit 4 is not necessarily O.

To compensate for this residual part, the phase of the fundamental wave is changed to θ=π/
At 5, which is slightly off from 2, the integrated value becomes O.

In other words, an error will occur in phase synchronization. FIG. 2 shows a method that is effective in such cases, in which a full-wave rectified sine wave is digitally created by the frequency dividing circuit 8, the sine wave generating circuit 11, and the D-A converter circuit 10, and then the A-D converter circuit 2 A digital signal corresponding to the product of the full-wave rectified waveform and the input signal is applied to the addition/subtraction switching circuit 3.

In this case, the output is a digital signal expressed by the following equation.

(IAn sinωt−)Eo)XBsin(ω,t+
φ) Here, An: n arrow harmonic amplitude of input signal fi ωn: n arrow harmonic angular frequency Eo of input signal fi: superimposed DC voltage B: reference current amplitude φ: reference current phase angle Therefore, this signal is connected to the integrating circuit If n=4 is integrated for one period, all terms other than n=1 become 0, so that it is not affected by the harmonics of the input signal and is correctly balanced at φ-π/2.

As described above (in the commonly used method of controlling vCO from PD specific output using PD and vCO, PD and VCO are
Although there was a problem with the stability of CO, according to the method of the present invention, a DC component is superimposed on the input signal fi to make it a single polarity.
This is added to the A-D converter circuit 2, and the current of the full-wave rectified waveform of the fundamental sine wave of the local signal fo is used as the reference current of the A-D converter circuit 20, and the obtained output is obtained every half cycle of the local signal fo. Addition and addition are performed in the integrating circuit 4 by switching between true and complement numbers.
By performing subtraction, even if harmonics exist in the input signal fi, they are canceled out and synchronized correctly with the phase of the fundamental wave, making it possible to realize an extremely stable and highly accurate phase synchronization circuit.

[Brief explanation of drawings]

FIG. 1 shows one embodiment of the present invention, and FIG. 2 shows another embodiment. 1...DC superimposition circuit, 2...A-
D conversion circuit, 3...Addition/subtraction switching circuit, 4.
...Integrator circuit, 5...Latch circuit, 6.
...Oscillation circuit, 7...Pulse rate variable circuit, 8...Divider circuit, 9...Differentiation circuit, 10...D- A conversion circuit, 11...
・Sine wave generation circuit, Eo...superimposed DC voltage, I
o: DC current, fo: Local signal,
fi...Input signal.

Claims (1)

[Claims] 1. Direct current is superimposed on the analog input signal to prevent polarity reversal, this is converted into a digital code by an A-D conversion circuit, and this is added/subtracted by an integration circuit according to the polarity of the fundamental wave of the local signal. What is claimed is: 1. A phase synchronized circuit that performs integration by an integral multiple of the period, and controls the phase of a local signal so that the integration result becomes zero. 2 The current of the full-wave rectified waveform of the fundamental sine wave of the local signal is A
-A phase-locked circuit with memory used as a reference current for D conversion.