JPS5932023B2 - Internal device control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an internal device control method for detecting and controlling an abnormality in an internal device in an information processing system such as an electronic exchange having autonomously operating internal devices.

In an information processing system such as an electronic exchange, for example, as shown in FIG. The situation is being closely monitored.

In the case of a command to the internal equipment of the communication path system of an electronic exchange, the command is issued to the internal equipment after reading the monitoring status of the maintenance device 3 and confirming the presence or absence of an abnormality, which has the drawback of complicating the process. Ta. In the case where the above-mentioned internal device operates autonomously, if a command is issued after reading the monitoring status in the maintenance device 3, if the internal device malfunctions within the delay time until the command ◆ is sent, It is unclear whether the command was accepted normally or not.

Therefore, even after sending out the finger ◆, it is necessary to read the monitoring status of the maintenance device 3 again using the program to check whether the internal device is normal or not, which makes the program processing even more complicated. There are drawbacks. The present invention has been made to improve the above-mentioned drawbacks, and aims to facilitate the detection of an abnormality in an autonomously operating internal device, and to prevent erroneous control in the event of an abnormality through simple processing.

Examples will be described in detail below. FIG. 2 is a block diagram of the main part of the embodiment of the present invention, and is for the case where it is applied to an electronic switching system.

In the figure, CPU is a central processing unit that controls the communication path system, SPUl to SPUn are communication path control devices as internal devices that operate autonomously, and INF sends commands from the central processing unit CPU to the communication path control device. At the same time, a connector that transfers the response signal from the communication path control device to the central processing unit CPU, ESE is an external monitoring device that externally monitors whether or not there is an abnormality in the communication path control device, and 0BR is a command from the central processing unit CPU. An out-buffer circuit that constitutes a transmission circuit that receives signals and transmits them to a communication path control device, DEC is a communication path control device, a decoder (decoding circuit) that selects one of SPU1 to SPUn, and BR is a communication path. An inbuffer circuit that receives response signals from the control device and SPUn, G is a gate circuit that controls the reception of the inbuffer circuit 1BR, and DET is an abnormality display circuit that displays an abnormal state corresponding to the communication path control device. The reception of the response signal from the communication path control device whose abnormal state is displayed by the Gerrit circuit G to the inverter circuit IBR is suppressed, and the response signal from the central processing unit C is not transferred. In other words, if the communication path control device specified by the central processing unit CPU is in an abnormal state and is displayed on the abnormality display circuit DET,
This response signal from the communication path control device is suppressed by the gate circuit G of the connector 1NF. For example, central processing unit C
The PU detects that the communication path control signal is in an abnormal state when the communication path control device that issued the command does not receive a response signal even after a certain period of time has elapsed. FIG. 3 is a block diagram of the abnormality display circuit DET in FIG.
MO is a memory device such as a flip flop that stores and displays an abnormal state signal from the communication path control device SPU, ~SP↓ or an abnormal state signal from the external monitoring device ESE, A, ~AO are an AND gate, and 0R is an OR gate. It is. Central processing unit C
Commands from the PU are transferred to the designated communication path control device via the connector 1NF.

That is, it is received by the out-buffer circuit 0BR of the connector 1NF, decoded by the decoder DEC, and the designated communication path control devices SPU1 to SPUn are transferred to the out-buffer circuit 0B.
Receive command signals via R. Communication path control unit SPU
A response signal and a response activation confirmation signal indicating that the next command can be received are sent from l~SPUn, and the response signal is sent to the gate circuit G of the connector 1NF.
The signal is input to the inbuffer circuit 1BR through the inbuffer circuit 1BR, and is transferred from the inbuffer circuit 1BR to the central processing unit CpU.
On the other hand, the response activation confirmation signal corresponding to the communication path control device is received by the abnormality display circuit DET, and the response activation confirmation signal and the memory M
The gate circuit G of the inbuffer circuit BR is inhibited by AND conditions A1 to An of the output signals of the decoder DEC and the output signals of the decoder DEC and the output signals of the decoder DEC. For example, if the communication path control device SPU detects that it is in an abnormal state due to its autonomous operation or self-diagnosis function, or if the external monitoring device ESE detects that the communication path control device SPU is in an abnormal state. If so, memory M1 is set.

This communication path control device SPU is then
When l is specified and a command signal is sent from the central processing unit CPU, and a response signal is sent from the communication path control unit SPUl, the decoded output of the decoder DEC and the response activation confirmation signal from the communication path control unit SPUl are stored. The set output of the device M1 is input to the AND gate A, and its output is 61
Therefore, the gate circuit G is connected via the gate 0R.
Since the gate circuit G is closed, the response signal from the communication path control device SPU1 is inhibited at the connector 1NF. Thereby, the central processing unit CPU can identify that the communication path control unit SPU is in an abnormal state because there is no response. Even if an abnormal state occurs before the device receives the command signal and sends out the response signal, when the abnormal state signal is added to the memory and is set, the response signal will be sent to the connector 1NF as described above. Since the data is suppressed and not transferred to the central processing unit CPU, it is identified that the data is in an abnormal state.

Note that when the communication path control device returns to a normal state from an abnormal state, the memory is reset. As mentioned above,
Based on the output of the memory device that stores the abnormal state of the communication path control device, the selection signal from the decoder DEC, and the response activation confirmation signal from the communication path control device, the response signal from the communication path control device is output when the communication path control device is in an abnormal state. This will not affect the sending of command signals to other normal communication path control devices and the transfer of response signals from normal communication path control devices.

As explained above, according to the present invention, since the response signal from the autonomously operating internal device is controlled by the contents of the abnormality display circuit DET, it is necessary to check the state of the internal device in advance by a program. Since there are no , program processing becomes easier.

Further, since the abnormality display circuit DET quickly indicates an abnormality in the internal device and suppresses a response signal from the internal device in an abnormal state, it is possible to prevent the spread of failures. Furthermore, if the abnormality display circuit is read periodically, the state of the autonomously operating internal devices can be grasped, and abnormalities can be detected early. In the embodiment of the present invention, an example is explained in which all the response activation confirmation signals are transmitted from the communication path control device, but the connection unit 1NF may interpret the commands from the central processing unit CPU to the communication path control device. Subsequently, a response activation confirmation signal may be generated by the connector NF. However, if you do so, the connector 1NF
This method not only requires hardware for terminating commands from each channel control device, but also has the drawback that the hardware of the connector 1NF increases. Therefore, the embodiment of the present invention is easier to implement.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a conventional information processing system such as an electronic exchange, Fig. 2 is a block diagram of a main part of an embodiment of the present invention, and Fig. 3 is a block diagram of an abnormality display circuit in Fig. 2. It is a diagram. CPU is the central processing unit, NF is the connector, SPUl~SP
Un is a communication path control device as an internal device, ESE is an external monitoring device, 0BR is an out-buffer circuit, IBR is an in-buffer circuit, DEC is a decoder, DET is an abnormality display circuit, G is a gate circuit, and M, ~Mn are memory devices. be.

Claims (1)

[Claims] 1. In an information processing system in which a central processing unit and one or more autonomously operating internal devices are connected via a connector, the connector displays an abnormality in the internal device corresponding to the internal device. an abnormality display circuit; a transmission circuit that sends a command signal from the central processing unit to the internal device;
a receiving circuit that receives a response signal from the internal device and transfers it to the central processing unit, the transmitting circuit of the connector operates independently of the abnormality display circuit, and the receiving circuit An internal device control method characterized in that a response signal from an internal device whose abnormality is displayed on the abnormality display circuit is suppressed.