JPS5937652B2 - Differential protection relay device - Google Patents

Description

[Detailed Description of the Invention] This invention provides differential protection in which the protected system can reliably provide differential protection without being affected by power flow by transmitting each terminal current to all other terminals in a bus bar, power transmission line, etc. The present invention relates to a relay device, particularly its abnormality detection method.

In recent years, due to the need to increase power demand, the Super High Power Transmission Line is often made into a 3-terminal system, but because of the heavy current and 3-terminal system, the conventional general-purpose protective relay system, directional comparison conveyance protective relay, is used. The protection relay method, or the phase comparison transfer protection relay method, has many limitations in its protection ability.

For this reason, attention is being paid to the application of a current differential transfer protection system that provides reliable protection under any system conditions.

As is well known, when applying the current differential method to protection of power transmission lines where the terminals are separated from each other, it is necessary to transmit the current of each terminal to all other terminals, and it is necessary to transmit the current of each terminal to all other terminals. etc.

Therefore, although it is simply called current differential, it is extremely complicated and includes a modulation circuit that modulates the current to make it suitable for transmission, a transmission line, and a demodulation circuit that receives the transmitted waveform and reproduces the original waveform. Since many circuits are inserted in the middle, even if a problem occurs in any part of the circuit, it will not be possible to faithfully reproduce the current waveform. Also, since the transmission line is generally exposed to the air, it will be susceptible to noise, etc. It is affected by the disturbance caused by the intrusion of the differential protection, and there is a possibility that an erroneous judgment will be made when performing differential protection.

This invention is intended to prevent erroneous judgments of protective relays due to abnormalities in transmission lines, etc., by transmitting an unmodulated constant frequency (hereinafter referred to as a pilot signal) when transmitting a current signal, and after transmission, the frequency of the pilot signal is The purpose of the present invention is to obtain a differential protection relay device that determines the magnitude of an abnormality based on the magnitude of change and its duration, and prevents a protective relay from locking in the case of an abnormality that does not affect differential protection.

For convenience of explanation, both the conventional abnormality detection method and the embodiment of the abnormality detection method according to the present invention are cases in which a differential protection relay device is applied to a two-terminal power transmission line, and the transmission method is frequency modulation (hereinafter referred to as FM modulation). The case where noise invades the transmission path will be explained.

Figure 1 is for explaining the circuit configuration of differential protection using the FM modulation method applied to two-terminal transmission line protection at the A end and B end, and 1 and 11 are circuit breakers (hereinafter referred to as CB). ,2,
12 is a CT, 3 and 13 are current-voltage converters (hereinafter referred to as I-V converters) that convert the CT secondary current into voltage to facilitate processing, and 4.14 is a frequency for transmitting the instantaneous value of voltage. A voltage-frequency converter (hereinafter referred to as a V-F converter) that converts the magnitude of
6. 16 is a receiving section for receiving signals from other terminals, 7.
Reference numeral 17 denotes a frequency-voltage converter (hereinafter referred to as an F-V converter) that converts the magnitude of the received frequency into an instantaneous value of voltage.

8 and 18 are differential protection circuits that perform differential protection by inputting the voltage values of the I-V converters 3 and 13 and the voltage values of the F-V converters 7 and 17; According to the judgment of the circuit, when a system fault occurs within the section of A end and B end, output is output and commands are sent to CBI and 11 respectively.
Configured to stop power transmission.

2 and 3 are explanatory diagrams of the operation of FIG. 1. FIG. 2 explains the principle of differential protection against an external accident X in the system, and FIG. 3 explains the principle of differential protection against an internal accident Y.

In Figure 1, if an external accident occurs at point X,
The fault currents flowing through CT1.11 have opposite polarities and become penetrating currents.

Figure 2a shows this current, with the A and B ends having opposite phases.

b is the output of the IV converter 3.13, and from this output, an FM modulated output as shown in C is obtained from the V-F converters 4 and 14.

That is, when the waveform is large, the frequency is increased, and when the waveform is small, the frequency is controlled to be small.

The FM modulated waves are mutually transmitted and received as shown in d, and demodulated by F--2 converters 7 and 17 as shown in e, and converted back to voltage.

f2g shows the internal state of the differential protection circuit 8゜18, f is the force calculation of b and e, which forms the operating force, and g
is the sum of b and e, which forms the restraining force.

Therefore, in FIG. 2, the operating force is zero at both ends A and B, and only the suppressing force exists, so no output is output from the differential protection circuit.

Therefore, the CB will not be opened.

FIG. 3 is an explanatory diagram when an internal fault occurs at point Y in FIG. 1, and the fault current at end B clearly goes in the opposite direction to the fault at point X.

Therefore, in Fig. 3, compared to Fig. 2, a, b, c at the B end are
, d at the A end.

Since e is in the opposite phase, the operating force of the differential protection circuit is the sum of b and e, which produces an output and becomes f, and the suppressing force is the sum of b and e.
By subtracting , the output disappears as shown in g.

Therefore, in Fig. 3, only the operating force exists at both ends A and B, and the suppressing force is zero, so an output is output from the differential protection circuit and CB1 and 11 at both ends are opened. .

Although the principle configuration has been explained using a single line diagram in FIG. 1, when the system is differentially protected, the currents at both ends of each phase are compared, so the configuration is as shown in FIG. 4.

This figure 4 shows the conventional configuration of a differential protection relay, and shows the case where current is transmitted from the A terminal to the B terminal, and the same applies when the current is transmitted from the B terminal to the A terminal. .

First, at the A terminal, 23 to 2c are CT and the secondary current is 3a to 3c.
Obtain the voltage by flowing the IV converter shown in 4a to 4.
FM modulation is performed using the V-F converter of c.

The outputs of these phases are transmitted to the B end by transmitters 53 to 5c.

At the B end, this transmission is received by the receivers 16a to 16c, demodulated by the F-V converters 17a to 17C, and used as one input of the differential protection circuits 182 to 18C, and is obtained from the current at the B end. The applied voltages Va' and Vb'.

Differential protection is performed using Vc' as the other input.

If the system fault is internal, the output signal of this differential protection circuit is sent to the B terminal CB (not shown) via the inhibit circuit 22.
and the CB is released.

Now, if noise invades the transmission path, the signal will be transmitted incorrectly at the B end, and the F-V converters 17a to 1
All or part of 7C becomes an erroneous output, and the differential protection circuit 18
All or part of a to 18C will issue an erroneous cutoff signal, which will cause problems when the system is healthy and when an external accident occurs.

Therefore, as a countermeasure against this, it is generally practiced to detect the intrusion of noise and lock the cutoff.

If an oscillator 20 with a constant frequency Fn (period t) is installed at the A end and the transmitter 5n transmits to the B end, the receiver 16 at the B end
n is receiving a constant frequency.

If this is converted into voltage by the F-V converter 17n, a constant voltage of Vn can be obtained.

However, if the noise N enters the transmission path, the receiving frequency is no longer constant and the output of the F-V converter 17n changes to F2, which can be detected by the detector 21.

Therefore, by locking the signals of the differential protection circuits 182 to 18C with the inhibit circuit 22 when the output of the detector 21 is output, erroneous cutoff of CB can be prevented.

23, when the noise N disappears, the differential protection circuit 182~
This is an off-delay timer for coordinating with the recovery time of the differential protection circuits 183 to 18c, and the time T is determined by adding a certain margin time 771 to the recovery time of the differential protection circuits 183 to 18c.

Figure 5 is for explaining the situation when noise enters the constant frequency Fn. A shows the frequency-voltage conversion characteristics, and when Fn, a voltage of Vn is obtained.
When it becomes F2, it becomes F2, and when it becomes Fl, it becomes Vl.

The figure above is a time chart, and d shows the case where the constant frequency (period t) becomes denser due to noise N entering, and the output of the F-V converter 17n is shown in e. .

This can be detected by the level LD of the detector 21, and an output obtained by adding the recovery time T can be obtained by the off-delay timer 23.

Therefore, with the signal shown at h, the above-mentioned inhibit circuit 22
I tried to limit it.

Conventional noise detection methods send a pilot signal on the noise detection phase, demodulate it on the receiving side to obtain a constant voltage, and detect when noise enters by using the change in the demodulated voltage. Ta.

If this abnormality detection method is used against the intrusion of transmission line noise, there will be no protection problem even if the abnormality detection is activated and the differential protection circuit is locked when the system is healthy or during an external fault, as described above. None.

However, if the differential protection circuit is locked every time noise enters, and an internal accident and an abnormality detection operation occur together, the breaker cannot be tripped, and protection may not be possible or the trip time may be delayed. There is a problem that causes a significant delay.

By the way, when we observe the occurrence of noise on transmission lines, we find that the duration of the noise is often less than a few milliseconds, so if the noise disappears by the time the differential protection circuit operates, it is worth There is no need to apply a dynamic protection circuit.

This is reasonable considering that when the lock is applied, at least the time T of the off-delay timer 23 becomes unprotectable.

This invention was made with the aim of eliminating the above-mentioned drawback of the conventional system in which the lock is always locked due to an abnormality in the pilot signal.The invention detects an abnormality based on the magnitude and duration of the frequency change of the pilot signal after transmission. To provide a differential protection relay device which can reduce unnecessary locking and a state in which protection cannot be achieved by determining this.

FIG. 6 is a circuit configuration diagram showing one embodiment of the present invention.
8 are diagrams for explaining the operation.

Fig. 6 is applied to the receiving side of the noise detection phase in Fig. 4, and 21L is the detection level LD based on the first frequency whose input voltage is higher than the constant frequency Fn (period t) of the pilot signal; 21H is a detector that outputs when the input voltage is higher than a detection level LD2 (>LDl) based on a second frequency higher than the first frequency;
24 is an on-delay timer that outputs when the input continues for more than time T1, 25 is an OR circuit, the output of which is connected to the inhibit circuit 22 via the off-delay timer 23, and is connected to the CB from the differential protection circuit (not shown). l-Controls the IJ knob signal.

Next, to explain the operation, in Fig. 7, d is a constant frequency (period t), a large amount of noise N in a short period of time, and a small amount of noise N2 that lasts for a long time, and the period is dense. The F-V converter 17n outputs the output shown in e according to the input frequency.

In response to these noises, N1 is strong for a short time, so each phase current signal from the F-V converters 1γa to 17C becomes a current error signal that is considerably larger than the actual value, and the differential protection circuits 188 to 18c Therefore, when this noise N1 occurs, it is necessary to temporarily lock the differential protection circuit.

Furthermore, since N2 lasts for a long time (this time is set to be longer than T1) to the extent that the differential protection circuit malfunctions, it is necessary to lock the differential protection circuit even when this noise N2 occurs.

Therefore, when the noise is N1, even if its duration is less than T1, the magnitude exceeds the detection level LD2, so the detector 21H operates and generates the output indicated by h.

This output passes through an OR circuit 25 to an off-delay timer 23.
The signal is expanded by time T to become the signal shown at i, which locks the CB trip signals from the differential protection circuits 182 to 18C via the inhibit circuit 22.

Also, when the noise is N2, the magnitude does not exceed the detection level LD2, but it exceeds the detection level LD1, so the detector 21 L
is activated and produces an output indicated by J.

At this time, since the output duration time of the detector 21L is longer than T1, the on-delay timer 24 generates the output shown at k after the elapse of time T.

This output passes through the OR circuit 25 and is output from the off-delay timer 2.
3, the signal is stretched by time T and becomes the signal shown in 1, which is transmitted through the inhibit circuit 22 to the differential protection circuits 18a to 18C.
Locks the CB trip signal from.

Next, consider noise N31 that does not affect differential protection.
FIG. 8 shows a case where N4 invades the transmission path.

d has a constant frequency (period t), and noise N3 which causes an error in the differential protection circuit but disappears in a short time, and noise N4 which causes an error in the differential protection circuit but does not cause an error in the differential protection circuit, enter into the constant frequency and the period changes. This shows the dense state of F-V converter 1.
7n, the output is shown as e depending on the input frequency.

However, the magnitude of the noise N3 is at the detection level LD.

Even if it exceeds T1, the duration is less than T1, so the detector 21L generates the output shown in j, but the on-delay timer 24 does not operate and the differential protection circuit is not locked.

Furthermore, although the noise N4 continues for a period of time T1 or longer, its magnitude does not exceed the detection level LD1, so the detector 21L does not operate and the differential protection circuit is not locked.

In other words, if the time T1 of the on-delay timer 24 is set within the operating time of the differential protection circuit, even if the noise is like N3, that is, even if it is large enough to cause an error in the differential protection circuit, the can be avoided.

FIG. 9 is a circuit configuration diagram showing another embodiment of the present invention.
0 and 11 are diagrams showing an explanation of the operation.

In FIG. 9, 2a is a charging/discharging circuit consisting of a transistor 26, a capacitor 27, and a resistor 23, and 30H is a first charging/discharging circuit whose input voltage is higher than the constant frequency (period t) of the pilot signal.
The detector 30L outputs a detection level when the input voltage is less than or equal to the detection level LD3 based on the frequency of LD4 (< L
D3) This is a detector that outputs when:

Also, the noise N1 t N2 in FIGS. 10 and 11
, N3, and N4 indicate the same noises as those in FIGS. 7 and 8.

Now, when the charging/discharging circuit 2a receives a signal shown as d from the receiver 16n, when there is no signal, the capacitor 2γ is charged through the resistor 28, and when there is a signal, the transistor 26 becomes conductive and the capacitor 27 is discharged. do.

The voltage Vc of this capacitor 2γ is the detection level L D3
, detectors 30H and 30L output if LD4 or less.
given to.

The detector 30H is connected to the on-delay timer 24 and combined with the output of the detector 30L by an OR circuit 25, and the subsequent steps are the same as in FIG.

d in Figure 10 is exactly the same as d in Figure 7, and when there is a signal at d, e instantly becomes O, and when the signal disappears,
This shows \lc increasing with a constant time constant.

When the noise is N, the frequency of the pilot signal is higher than the second frequency higher than the constant frequency, and the period becomes short, so Vc becomes very small and is below the detection level LD4, so the detection in FIG. It is detected by the device 30L and becomes the output h.

Also, when the noise is N2, the frequency of the pilot signal is higher than the first frequency (lower than the second frequency) which is higher than the constant frequency, so Vc is slightly larger and becomes higher than LD4 and lower than LD3, and as shown in j, the frequency of the pilot signal is higher than the first frequency (lower than the second frequency). If the time is longer than the time T1 of the on-delay timer 24 in FIG. 9, it is detected and outputs k.

Therefore, this noise N1. In a case like N2, signals each having a length extended by the time T of the off-delay timer 23 are obtained as shown at i and l, and these serve as lock signals for the differential protection circuit.

d in FIG. 11 is exactly the same as d in FIG. 8, and as shown in e, when the noise is N3, Vc exceeds the level LD4, and L
Since it is less than D3, the detector 30H generates the output shown in j, but the duration is longer than the on-delay timer 24 in FIG.
Since the time T1 is shorter than the time T1, the differential protection circuit is not locked.

Also, the noise N4 has a value that will not cause the differential protection circuit to output an error no matter how long it continues, so the detectors 30H and 30
L does not work.

In the above embodiment, a two-terminal system has been described, but a multi-terminal system with three or more terminals may be used, and the present invention is not limited to FM modulation, but may be implemented in the same manner using other modulation methods.

Furthermore, in the above embodiment, it has been explained that noise is detected by transmitting and receiving a constant frequency and detecting its disturbance, but any other noise detection method may be used as long as the magnitude and duration of the noise can be determined. Even if there is, it can be implemented in the same way.

As described above, according to the present invention, a pilot signal is transmitted when transmitting a current signal, and abnormality detection in the transmission means is determined based on the magnitude of the frequency change of the pilot signal after transmission and its duration. Therefore, it is possible to obtain a differential protection relay device that can reduce the number of situations in which protection cannot be achieved due to unnecessary locking.

[Brief explanation of drawings]

Figure 1 is a circuit configuration diagram of differential protection for a two-terminal power transmission line, Figures 2 and 3 are diagrams explaining its operation, and Figure 4 is a circuit configuration diagram showing a conventional differential protection relay device. FIG. 5 is a diagram explaining a conventional noise detection method, FIG. 6 is a circuit configuration diagram explaining an embodiment of the present invention, FIGS. 7 and 8 are diagrams explaining its operation, and FIG.
The figure is a circuit configuration diagram explaining another embodiment of the present invention.
0 and 11 are explanatory diagrams of the operation, and in the figures,
1a to 1C are CB, 2a to 2c are CT, 3a to 3c are I
-V converters, 4a to 4c are V-, F converters, 5a to 5c
, 5n is a transmitter, 16a to 16C216n are receivers, 1
γa~1γc, lγn are F-■ converters, 18a~18C
is a differential protection circuit, 20 is an oscillator, 21L and 21H are detectors, 22 is an inhibit circuit, 23 is an off-delay timer, 24 is an on-delay timer, 25 is an OR circuit,
26 is a transistor, 21 is a capacitor, 28 is a resistor,
29 is a charging/discharging circuit, and 30L and 30H are detectors. In each figure, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] 1. In a device that modulates the current signal of each terminal forming a protection interval and transmits it to all other terminals, demodulates it at the transmission tip, and then differentially protects each terminal, the transmission of the current signal described above means for transmitting an unmodulated constant frequency signal, and when the frequency of the signal transmitted by this means is higher than a first frequency higher than the constant frequency and continues for a predetermined time or more;
a detection means that outputs an output when the frequency is higher than a second frequency higher than a second frequency; and a detection means that detects the output of a relay that responds based on the difference between the current signal of the transmission source terminal and the terminal current signal of the transmission tip. and means for locking by the output of the differential protection relay device. 2 The detection means includes a frequency-voltage converter that derives a voltage according to the reception frequency, and a first level detector that outputs an output when the output of the frequency-voltage converter is equal to or higher than the voltage level corresponding to the first frequency. and a second level detector that outputs an output when the output of the frequency-voltage converter is equal to or higher than the voltage level corresponding to the second frequency, and an output when the output of the first level detector continues for a predetermined time or more. The differential protection relay according to claim 1, further comprising an on-delay timer and an OR circuit whose inputs are each output of the on-delay timer and the second level detector. Device. 3 The detection means includes a transistor that turns on and off according to the period of the reception frequency, a capacitor that repeats charging and discharging in response to this transistor, and a first output signal that outputs when the voltage of this capacitor is below the voltage level corresponding to the first frequency. 1
a level detector, a second level detector that outputs when the voltage of the capacitor is below a voltage level corresponding to the second frequency, and an output when the output of the first level detector continues for a predetermined time or more. 1. The differential protection joint according to claim 1, further comprising: an on-delay timer that performs the on-delay operation; and an OR circuit that receives the on-delay timer and each output of the second level detector as input. Electrical equipment.