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JPS5937898B2 - GTO thyristor gate control circuit - Google Patents
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JPS5937898B2 - GTO thyristor gate control circuit - Google Patents

GTO thyristor gate control circuit

Info

Publication number
JPS5937898B2
JPS5937898B2 JP53058092A JP5809278A JPS5937898B2 JP S5937898 B2 JPS5937898 B2 JP S5937898B2 JP 53058092 A JP53058092 A JP 53058092A JP 5809278 A JP5809278 A JP 5809278A JP S5937898 B2 JPS5937898 B2 JP S5937898B2
Authority
JP
Japan
Prior art keywords
capacitor
thyristor
voltage
gto thyristor
gto
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53058092A
Other languages
Japanese (ja)
Other versions
JPS54149459A (en
Inventor
敏昭 上符
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meidensha Electric Manufacturing Co Ltd
Original Assignee
Meidensha Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meidensha Electric Manufacturing Co Ltd filed Critical Meidensha Electric Manufacturing Co Ltd
Priority to JP53058092A priority Critical patent/JPS5937898B2/en
Publication of JPS54149459A publication Critical patent/JPS54149459A/en
Publication of JPS5937898B2 publication Critical patent/JPS5937898B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/72Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices having more than two PN junctions; having more than three electrodes; having more than one electrode connected to the same conductivity region
    • H03K17/73Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices having more than two PN junctions; having more than three electrodes; having more than one electrode connected to the same conductivity region for DC voltages or currents

Landscapes

  • Power Conversion In General (AREA)
  • Thyristor Switches And Gates (AREA)
  • Electronic Switches (AREA)

Description

【発明の詳細な説明】 本発明は、GTO(ゲート・ターン・オフ)サイリスタ
用ゲート制御回路に関し、特に大容量GTOサイリスタ
を補助サイリスタにより点弧、消弧する制御回路に関す
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a gate control circuit for a GTO (gate turn off) thyristor, and more particularly to a control circuit for turning on and off a large capacity GTO thyristor using an auxiliary thyristor.

GTOサイリスタは、ゲート・カソード間に正極性電流
を流せばON動作し、負極性電流を流せばOFF動作す
るが、点弧電流が一般のサイリスタに比べて大きく、ま
た消弧電流も大きいものを必要とする。
GTO thyristors turn on when a positive current is passed between the gate and cathode, and turn off when a negative current is passed between the gate and cathode. I need.

また、点弧、消弧電流は立上り傾斜も急峻なものを必要
とする。第1図にはゲート電流波形を例示する。
In addition, the ignition and extinguishing currents need to have steep rising slopes. FIG. 1 illustrates the gate current waveform.

このように、GTOサイリスタではゲート電流が大きく
かつ傾斜の急峻なものを必要とするため、ゲート制御回
路はその制御電力が大きく、制御素子にも大きい容量の
ものを必要とする問題があつた。
As described above, since the GTO thyristor requires a large gate current and a steep slope, the gate control circuit has a problem in that its control power is large and the control element also requires a large capacity.

また、制御素子としで補助の点弧用サイリスタを使用し
、大きな点弧電流、消弧電流を供給することは可能であ
るが、GTOサイリスタはそのゲート・カソード間電圧
が10〜20ボルトに制限される。
In addition, it is possible to use an auxiliary ignition thyristor as a control element to supply large ignition current and extinguishing current, but the gate-cathode voltage of the GTO thyristor is limited to 10 to 20 volts. be done.

従つて、点弧用サイリスタを通して低い電圧源から点弧
電流を供給すると、点弧用サイリスタのVFが大きくか
つターンオン時間も長くなり、急峻な立上りのゲート電
流を供給できない。これにはサイリスタの代りにトラン
ジスタを使用することが考えられるが、トランジスタは
定格電流と許容パルス電流の比が小さく、高価で増幅率
の小さい大容量トランジスタを必要とする。また、トラ
ンジスタは耐圧が低く、ドライブ用の別電源を必要とす
るなど、制御回路の小形化と低コスト化に難点があつた
。本発明は、GTOサイリスタのアノード・カソード間
に印加される高電圧を点弧、消弧電源として利用するこ
とにより、低消費電力、小形、低コストのゲート制御回
路を提供することを目的とする。
Therefore, if the ignition current is supplied from a low voltage source through the ignition thyristor, the VF of the ignition thyristor becomes large and the turn-on time becomes long, making it impossible to supply a gate current with a steep rise. For this purpose, it is possible to use a transistor instead of a thyristor, but the transistor has a small ratio between the rated current and the permissible pulse current, and requires an expensive, large-capacity transistor with a small amplification factor. In addition, transistors have a low breakdown voltage and require a separate power supply for the drive, making it difficult to miniaturize and reduce cost of the control circuit. The present invention aims to provide a gate control circuit with low power consumption, small size, and low cost by utilizing the high voltage applied between the anode and cathode of a GTO thyristor as an ignition/extinguishing power source. .

第2図は本発明の一実施例を示す。FIG. 2 shows an embodiment of the invention.

GTOサイリスタ1には帰還用ダイオード2のほかにD
v/Dt防止用のコンデンサ3、このコンデンサ3の充
電用ダイオード4、放電電流制限用抵抗5を備える。D
v/Dt抑制用コンデンサ3の高圧側端子とGTOサイ
リスタ1のゲートとの間には、電流制限抵抗6、所定電
圧で0N動作する負性抵抗素子としてのダイアツク7、
点弧用サイリスタ8およびコンデンサ9の直列回路を備
える。この直列回路とサイリスタ8のトリガ回路10と
でGTOサイリスタ1の点弧回路を構成する。今、GT
Oサイリスタ1が0FF状態にある場合、コンデンサ3
はダイオード4を通してサイリスタ1のアノード・カソ
ード間電圧に充電されている。
In addition to the feedback diode 2, the GTO thyristor 1 has a D
A capacitor 3 for preventing v/Dt, a diode 4 for charging this capacitor 3, and a resistor 5 for limiting discharge current are provided. D
Between the high voltage side terminal of the v/Dt suppression capacitor 3 and the gate of the GTO thyristor 1, there is a current limiting resistor 6, a diagonal 7 as a negative resistance element that operates at 0N at a predetermined voltage,
It includes a series circuit of an ignition thyristor 8 and a capacitor 9. This series circuit and the trigger circuit 10 of the thyristor 8 constitute the ignition circuit of the GTO thyristor 1. Now, GT
When O thyristor 1 is in 0FF state, capacitor 3
is charged through the diode 4 to the anode-cathode voltage of the thyristor 1.

この状態において、トリガ回路10によりサイリスタ8
を点弧すると、コンデンサ3の電圧がダイアツク7のブ
レークオーバ電圧よりも高ければ、コンデンサ3の電荷
は抵抗6、ダイアツク7、サイリスタ8、コンデンサ9
を通してGTOサイリスタ1の点弧電流としで放電され
、サイリスタ1が点弧する。コンデンサ3の放電電流は
その電圧がコンデンサ9の電圧より低くなるまでコンデ
ンサ9の充電電流として流れ、その間はサイリスタ1の
点弧電流が供給される。また、コンデンサ3の電荷はG
TOサイリスタ1が0N状態に移行する時点から放電抵
抗5を通して放電し、コンデンサ3の電圧はサイリスタ
1の0N電圧VF(2〜3V)まで低下し、この放電過
程においてコンデンサ3の電圧がコンデンサ9の電圧よ
り低くなつた際にサイリスタ8およびダイアツク7の電
流が零になつてサイリスタ8はターンオフする。次に、
サイリスタ1のゲートとカソードとの間には、上記コン
デンサ9を介しでダイアツク11、消弧用サイリスタ1
2および逆流阻止用ダイオード13の直列回路を備える
。この直列回路とサイリスタ12のトリガ回路14とで
サイリスタ1の消弧回路を構成する。今、GTOサイリ
スタ1が0N状態にある場合、前記の如く、コンデンサ
9は点弧動作時に図示の極性に充電されている。
In this state, the trigger circuit 10 causes the thyristor 8 to
When igniting, if the voltage of capacitor 3 is higher than the breakover voltage of diac 7, the charge of capacitor 3 is transferred to resistor 6, diac 7, thyristor 8, capacitor 9.
The ignition current of the GTO thyristor 1 is discharged through the GTO thyristor 1, and the thyristor 1 is ignited. The discharge current of the capacitor 3 flows as a charging current of the capacitor 9 until its voltage becomes lower than the voltage of the capacitor 9, during which time the ignition current of the thyristor 1 is supplied. Also, the charge of capacitor 3 is G
From the point at which the TO thyristor 1 shifts to the 0N state, it is discharged through the discharge resistor 5, and the voltage of the capacitor 3 decreases to the 0N voltage VF (2 to 3 V) of the thyristor 1. During this discharging process, the voltage of the capacitor 3 increases to the voltage of the capacitor 9. When the voltage becomes lower than the voltage, the current in the thyristor 8 and the dielectric 7 becomes zero, and the thyristor 8 is turned off. next,
Between the gate and cathode of the thyristor 1, a dielectric 11 and an arc-extinguishing thyristor 1 are connected via the capacitor 9.
2 and a backflow blocking diode 13 in series. This series circuit and the trigger circuit 14 of the thyristor 12 constitute an arc extinguishing circuit for the thyristor 1. Now, when the GTO thyristor 1 is in the ON state, the capacitor 9 is charged to the illustrated polarity during the ignition operation, as described above.

この状態において、トリガ回路14によりサイリスタ1
2を点弧すると、コンデンサ9の電圧がダイアツク11
のブレークオーバ電圧よりも高ければ、コンデンサ9の
電荷はダイアツク11、サイリスタ12、ダイオード1
3を通してGTOサイリスタ1の消弧電流としで放電さ
れ、サイリスタ1がターンオフする。サイリスタ1はタ
ーンオフ動作でそのカソード・ゲート間のジヤンクシヨ
ンが回復し、高インピーダンスを呈する。このため、コ
ンデンサ9の放電電流は、サイリスタ1のカソード・ゲ
ート間のジヤンクシヨンの回復により、コンデンサ15
と抵抗16を通して流す。この電流によつてコンデンサ
15は充電され、その端子電圧が上昇してサイリスタ1
のカソード・ゲート間耐圧VGK以上になるのを防ぐた
めにサイリスタ17および定電圧ダイオード18を設け
ている。すなわち、コンデンサ15の充電電圧がGKよ
りも低い電圧にあるときに該電圧をダイオード18で検
出し、サイリスタ17を点弧させることでコンデンサ1
5の充電電圧(サイリスタ1のカソード・ゲート間逆電
圧)をダイオード18のツエナ一電圧に規制する。サイ
リスタ17の0N動作後には、コンデンサ9の放電電流
はサイリスタ17およびダイオード19を通してバイパ
スされる。従つて、ターンオフしたGTOサイリスタ1
はそのゲート・カソード間が定電圧ダイオード18のツ
エナ一電圧に逆バイアスされる。従つて、コンデンサ1
5の電圧はダイオード18のツエナ一電圧以上に上昇す
ることはなく、GTOサイリスタ1のゲート・カソード
間の電圧もツエナ一電圧以上にはならず、ブレークオー
バすることもない。
In this state, the trigger circuit 14 causes the thyristor 1 to
When 2 is ignited, the voltage across capacitor 9 is increased to 11.
If the breakover voltage of capacitor 9 is higher than the breakover voltage of
3 as the extinguishing current of the GTO thyristor 1, and the thyristor 1 is turned off. The thyristor 1 recovers its cathode-to-gate junction by the turn-off operation and exhibits high impedance. Therefore, the discharge current of the capacitor 9 is reduced by the recovery of the junction between the cathode and gate of the thyristor 1.
and flows through resistor 16. The capacitor 15 is charged by this current, and its terminal voltage increases, causing the thyristor 1
A thyristor 17 and a constant voltage diode 18 are provided to prevent the cathode-to-gate breakdown voltage from exceeding VGK. That is, when the charging voltage of the capacitor 15 is lower than GK, this voltage is detected by the diode 18 and the thyristor 17 is ignited.
5 (reverse voltage between the cathode and the gate of thyristor 1) is regulated to the Zener voltage of diode 18. After the ON operation of the thyristor 17, the discharge current of the capacitor 9 is bypassed through the thyristor 17 and the diode 19. Therefore, GTO thyristor 1 turned off
is reverse biased between its gate and cathode to the Zener voltage of the constant voltage diode 18. Therefore, capacitor 1
The voltage of the GTO thyristor 1 does not rise above one Zener voltage, and the voltage between the gate and cathode of the GTO thyristor 1 does not rise above one Zener voltage, and there is no breakover.

また、サイリスタ12はコンデンサ9の端子電圧が反転
した時点て逆バイアスを受け、ターンオフする。以上、
明らかにしたとおり、本発明によるゲート制御回路は、
Dv/Dt抑制用コンデンサの充電電荷を点弧用サイリ
スタを通して放電するため、GTOサイリスタのd!/
Dtが軽減されるし、制御回路用の大容量の電源が不要
になり、低消費電力、小形、低コストの制御回路を実現
できる。
Further, the thyristor 12 receives a reverse bias when the terminal voltage of the capacitor 9 is reversed, and is turned off. that's all,
As clarified, the gate control circuit according to the present invention comprises:
In order to discharge the charge in the Dv/Dt suppression capacitor through the ignition thyristor, the d! /
Dt is reduced, a large-capacity power supply for the control circuit is not required, and a control circuit with low power consumption, small size, and low cost can be realized.

また、GTOサイリスタの0N制御期間中にサイリスタ
8を点弧しつづけることによつて誘導負荷時にみられる
電流の断続によるGTOサイリスタのオフに対してもコ
ンデンサ3の充電がサイダツク7のブレークオーバ電圧
まで充電されると再点弧できる。この場合、従来のパル
ス点弧では十分な点弧電流が流れずにDi/Dt耐量不
足による素子破壊が発生するのに対して、本発明の制御
回路ではサイダツクのブレークオーバ電圧と制限抵抗6
によつて点弧電流、点弧開始電圧を決定できるので十分
な点弧電流を供給できる。また、オフ時のゲート・カソ
ード間逆バイアスが定電圧ダイオード18のツエナ一電
圧に規制されるため、消弧回路の電圧を高く設定でき、
サイリスタによる消弧制御が可能になる。
In addition, by continuing to fire the thyristor 8 during the 0N control period of the GTO thyristor, the capacitor 3 can be charged up to the breakover voltage of the sidac 7 even when the GTO thyristor is turned off due to intermittent current that occurs during inductive loads. Once charged, it can be re-ignited. In this case, in the conventional pulse ignition, sufficient ignition current does not flow and element destruction occurs due to insufficient Di/Dt withstand capability, whereas in the control circuit of the present invention, the breakover voltage of the sidac and the limiting resistance 6
Since the ignition current and ignition start voltage can be determined by the above, a sufficient ignition current can be supplied. In addition, since the reverse bias between the gate and cathode when off is regulated to the Zener voltage of the constant voltage diode 18, the voltage of the arc extinguishing circuit can be set high.
Arc extinguishing control using a thyristor becomes possible.

従つで、高電流を高い傾度で流すことができ、ターンオ
フ動作を確実にすると共に大電流に対する耐量の大きい
サイリスタによる小型の消弧回路を構成できる。また、
点弧用、消弧用サイリスタと直列にダイアツクのような
負性抵抗素子を接続するため、点消弧電流は立上りが急
峻で十分な波高値を有するものにでき、スイツチング時
の電力ロスによるGTO素子破壊を防止できる。
Therefore, a small arc-extinguishing circuit can be constructed using a thyristor that allows a high current to flow at a high gradient, ensures reliable turn-off operation, and has a large capacity to withstand large currents. Also,
Since a negative resistance element such as a diaphragm is connected in series with the ignition and extinguishing thyristors, the ignition and extinguishing current can have a steep rise and a sufficient peak value, reducing GTO due to power loss during switching. Device destruction can be prevented.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はGTOサイリスタの点弧、消弧電流波形を示す
図、第2図は本発明によるゲート制御回路の一実施例を
示す回路図である。 1・・・・・・GTOサイリスタ、3・・・・・・d/
Dt抑制用コンデンサ、7,11・・・・・・ダイアツ
ク、8・・・・・・点弧用サイリスタ、10・・・・・
・点弧用トリガ回路、12・・・・・・消弧用サイリス
タ、14・・・・・・消弧用トリガ回路、18・・・・
・・定電圧ダイオード。
FIG. 1 is a diagram showing firing and extinction current waveforms of a GTO thyristor, and FIG. 2 is a circuit diagram showing an embodiment of a gate control circuit according to the present invention. 1...GTO thyristor, 3...d/
Dt suppression capacitor, 7, 11...Diac, 8...Ignition thyristor, 10...
- Ignition trigger circuit, 12... Arc extinguishing thyristor, 14... Arc extinguishing trigger circuit, 18...
... Constant voltage diode.

Claims (1)

【特許請求の範囲】[Claims] 1 GTOサイリスタと並列に該サイリスタのdv/d
t抑制用コンデンサを接続し、このコンデンサとGTO
サイリスタのゲート間に負性抵抗素子を直列に持つスイ
ッチング素子とコンデンサを有する点弧回路を直列に接
続して前記dv/dt抑制用コンデンサの充電電圧が上
記負性抵抗素子で設定する電圧以上にあるときに該dv
/dtの抑制用コンデンサの電荷をGTOサイリスタの
点弧電流として放電させるようにすると共に、前記点弧
回路のコンデンサとGTOサイリスタのカソード間に負
性抵抗素子を直列に持つスイッチング素子を有する消弧
回路を接続し、この消弧回路のスイッチング素子導通時
に前記点弧回路のコンデンサに充電された電圧が上記負
性抵抗素子で設定する電圧以上にあるときに該コンデン
サの電荷をGTOサイリスタの消弧電流として放電させ
かつ該消弧回路はGTOサイリスタのゲート・カソード
間に接続した電圧規制用コンデンサと、この電圧規制用
コンデンサと並列に接続され、該コンデンサの電圧が所
定値に達したとき導通する放電用スイッチング素子とを
有してGTOサイリスタのターンオフ後に上記点弧回路
のコンデンサの放電電流で電圧規制用コンデンサを充電
するように構成したことを特徴とするGTOサイリスタ
のゲート制御回路。
1 dv/d of the thyristor in parallel with the GTO thyristor
Connect the t suppression capacitor and connect this capacitor to GTO.
A switching element having a negative resistance element in series between the gates of the thyristor and an ignition circuit having a capacitor are connected in series so that the charging voltage of the dv/dt suppression capacitor becomes higher than the voltage set by the negative resistance element. At some point, the DV
/dt discharges the electric charge of the suppression capacitor as the ignition current of the GTO thyristor, and has a switching element having a negative resistance element in series between the capacitor of the ignition circuit and the cathode of the GTO thyristor. When the switching element of this arc extinguishing circuit is turned on and the voltage charged in the capacitor of the ignition circuit is higher than the voltage set by the negative resistance element, the charge of the capacitor is turned off to extinguish the GTO thyristor. The arc extinguishing circuit is connected in parallel with a voltage regulating capacitor connected between the gate and cathode of the GTO thyristor, and becomes conductive when the voltage of the capacitor reaches a predetermined value. 1. A gate control circuit for a GTO thyristor, comprising a discharging switching element and configured to charge a voltage regulation capacitor with a discharge current of the capacitor of the ignition circuit after the GTO thyristor is turned off.
JP53058092A 1978-05-16 1978-05-16 GTO thyristor gate control circuit Expired JPS5937898B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53058092A JPS5937898B2 (en) 1978-05-16 1978-05-16 GTO thyristor gate control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53058092A JPS5937898B2 (en) 1978-05-16 1978-05-16 GTO thyristor gate control circuit

Publications (2)

Publication Number Publication Date
JPS54149459A JPS54149459A (en) 1979-11-22
JPS5937898B2 true JPS5937898B2 (en) 1984-09-12

Family

ID=13074297

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53058092A Expired JPS5937898B2 (en) 1978-05-16 1978-05-16 GTO thyristor gate control circuit

Country Status (1)

Country Link
JP (1) JPS5937898B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101984532B (en) * 2010-10-12 2014-03-12 中国电力科学研究院 Thyristor dv/dt protection method

Also Published As

Publication number Publication date
JPS54149459A (en) 1979-11-22

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