Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
JPS5938725B2 - Method of manufacturing thin film capacitors - Google Patents
[go: Go Back, main page]

JPS5938725B2 - Method of manufacturing thin film capacitors - Google Patents

Method of manufacturing thin film capacitors

Info

Publication number
JPS5938725B2
JPS5938725B2 JP13397782A JP13397782A JPS5938725B2 JP S5938725 B2 JPS5938725 B2 JP S5938725B2 JP 13397782 A JP13397782 A JP 13397782A JP 13397782 A JP13397782 A JP 13397782A JP S5938725 B2 JPS5938725 B2 JP S5938725B2
Authority
JP
Japan
Prior art keywords
capacitance
thin film
upper electrode
lower electrode
dielectric thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP13397782A
Other languages
Japanese (ja)
Other versions
JPS5925206A (en
Inventor
正彦 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP13397782A priority Critical patent/JPS5938725B2/en
Publication of JPS5925206A publication Critical patent/JPS5925206A/en
Publication of JPS5938725B2 publication Critical patent/JPS5938725B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Description

【発明の詳細な説明】 本発明はガラス等の絶縁基板上1こTa2N O、Ta
205等の誘電体薄膜を有する薄膜コンデンサの製造方
法1こ関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for depositing Ta2NO, Ta, etc. on an insulating substrate such as glass.
The present invention relates to a method for manufacturing a thin film capacitor having a dielectric thin film such as No. 205.

薄膜コンデンサを作製する場合lこ、容量値調整を行わ
ないで所望静電容量を得ることは困難である。
When manufacturing a thin film capacitor, it is difficult to obtain a desired capacitance without adjusting the capacitance value.

このため、従来は、ガラス基板の上にTa2N又はTa
等の下部電極を第1の部分と第2の部分と1こ区画した
状態に設け、この下部電極を陽極酸化すること1こよっ
てTaN O51JまTa2o、等の誘電体薄膜を設け
、第1の部分の誘電体薄膜lこ主容量用上部電極を設け
ると共fこ第2の部分の誘電体薄膜上fこ複数の容量調
整用上部電極を設け、この段階で下部電極と主容量用上
部電極とgこ計器を接続して静電容量を測定し、所望容
量値が得られない場合lこはレーザビームで主容量用上
部電極と複数の容量調整用上部電極との間を選択的に切
断し、これ1こより所望容量値とした。
For this reason, conventionally, Ta2N or Ta was placed on a glass substrate.
A lower electrode such as TaNO51J or Ta2o is provided in a state where the lower electrode is divided into a first part and a second part, and this lower electrode is anodized. An upper electrode for the main capacitance is provided on the dielectric thin film of the second portion, and a plurality of upper electrodes for capacitance adjustment are provided on the dielectric thin film of the second portion.At this stage, the lower electrode and the upper electrode for the main capacitance are Connect a meter to measure the capacitance, and if the desired capacitance value is not obtained, use a laser beam to selectively cut between the main capacitance upper electrode and multiple capacitance adjustment upper electrodes. The desired capacitance value was determined from this value.

ところが、保護絶縁層を設ける@1こ溶量測定及びレー
ザビームの投射を行うため1こ、この工程中にコンデン
サの特性劣化、損傷等が生じる可能性があった。
However, since the protective insulating layer is provided, the melt amount is measured, and the laser beam is projected, there is a possibility that the characteristics of the capacitor may deteriorate or be damaged during this step.

また、容量調整を行っても、その後に保護絶縁層を設け
たり、回路基板に半田接着すると、熱的影響、応力等の
力学的影響等1こより静電容量が変化し、所望の容量値
を得ることが困難なことがあった。
Furthermore, even if the capacitance is adjusted, if a protective insulating layer is subsequently provided or soldered to the circuit board, the capacitance will change due to thermal effects, mechanical effects such as stress, etc., and the desired capacitance value will not be achieved. It was sometimes difficult to obtain.

そこで、本発明の目的は、所程容量値を容易に得ること
が可能な薄膜コンデンサの製造方法を提供することにあ
る。
SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a method for manufacturing a thin film capacitor that can easily obtain a certain capacitance value.

上記目的を達成するための本発明は、光透過性絶縁基板
上Eこ少なくとも第1の部分と該第1の部分lこ連続す
る第2の部分とから成る下部電極を形成する工程と、酸
化処理によって前記第1の部分及び前記第2の部分の一
部上に誘電体薄膜を形成する工程と、前記第1の部分上
の前記誘電体薄膜上1こ主容量用上部電極を設けると共
lこ前記第2の部分上の前記誘電体薄膜上に複数の容量
調整用上部電極を設け、更に前記主容量用上部電極と前
記複数の容量調整用上部電極とを電気的に夫々接続する
ようIこ複数の接続部を前記絶縁基板上に設ける工程と
、前記主容量用上部電極、前記複数の容量調整用上部電
極、前記複数の接続部、前記誘電体薄膜の露出面、及び
少なくとも前記接続部近傍の前記絶縁基板を覆うように
保護絶縁層を設ける工程と、前記保護絶縁層を設けた後
に、前記下部電極と前記主容量用上部電極と「こ静電容
量測定計器を接続して静電容量を測定する工程と、前記
絶縁基板の前記下部電極が設けられている面と反対の背
面側から前記複数の接続部の内の1つ又は複数のレーザ
ビームを投射し、該接続部を切断するとと1こよって前
記静電容量の値を所程値に調整する工程とを具備してい
ることを特徴とする薄膜コンデ゛ンサの製造方法1こ係
わるものである。
To achieve the above object, the present invention comprises a step of forming a lower electrode on a light-transmissive insulating substrate, comprising at least a first portion and a second portion continuous with the first portion; forming a dielectric thin film on a portion of the first portion and the second portion by treatment; and providing an upper electrode for main capacitance on the dielectric thin film on the first portion; A plurality of capacitance adjustment upper electrodes are provided on the dielectric thin film on the second portion, and the main capacitance adjustment upper electrode and the plurality of capacitance adjustment upper electrodes are electrically connected to each other. a step of providing a plurality of connection parts on the insulating substrate, the main capacitance upper electrode, the plurality of capacitance adjustment upper electrodes, the plurality of connection parts, the exposed surface of the dielectric thin film, and at least the connection. a step of providing a protective insulating layer so as to cover the insulating substrate near the section; and after providing the protective insulating layer, connecting the lower electrode and the upper electrode for main capacitance with a capacitance measuring instrument; measuring the capacitance; and projecting one or more laser beams from the back surface of the insulating substrate opposite to the surface on which the lower electrode is provided to connect the connecting portions. This relates to a method for manufacturing a thin film capacitor, which comprises the steps of cutting and adjusting the capacitance value to a predetermined value.

上記発明によれば、保護絶縁層を形成した後に、ガラス
基板の背面からレーザビームを投射して容量調整するの
で、保護絶縁層形成に基づく容量の変化分も補正するこ
とが可能になる。
According to the above invention, since the capacitance is adjusted by projecting a laser beam from the back surface of the glass substrate after forming the protective insulating layer, it is also possible to correct the change in capacitance due to the formation of the protective insulating layer.

また、保護絶縁層を形成した後lこ、容量測定及びレー
ザビーム投射を行うので、この工程での特性の劣化又は
損傷を防止することが出来る。
Further, since capacitance measurement and laser beam projection are performed after forming the protective insulating layer, deterioration or damage to characteristics in this process can be prevented.

次lこ、第1図及び第2図を参照して本発明の実施例に
係わる薄膜コンデンサの製造方法について述べる。
Next, a method for manufacturing a thin film capacitor according to an embodiment of the present invention will be described with reference to FIGS. 1 and 2.

第1図A−Eは工程順1こ薄膜コンデンサを示す平面図
、第2図A −E 11第1図の各部の断面図である。
1A to 1E are plan views showing the first thin film capacitor in the process order, and FIGS. 2A to 2E are sectional views of various parts of FIG. 1.

まず、約0.5mmの透明ガラス基板1の上1こTa2
N膜を約6000人の厚さにスパッタリング又は蒸着法
等で形成し、これを所定パターン;こフォトエツチング
することによって第1図及び第2図のA1こ示す如く、
第1の部分2aと第2の部分2bとから成る下部電極2
を形成する。
First, the upper part of the transparent glass substrate 1 of about 0.5 mm is made of Ta2.
By forming an N film to a thickness of approximately 6,000 yen by sputtering or vapor deposition, and photoetching this into a predetermined pattern, as shown in A1 of FIGS. 1 and 2,
Lower electrode 2 consisting of a first part 2a and a second part 2b
form.

尚、第2の部分2bは第1の部分2alこ連結され、且
つ分離領域3を介して対向配置されている。
Note that the second portion 2b is connected to the first portion 2al and is placed opposite to the first portion 2al with the separation region 3 interposed therebetween.

次lこ、下部電極2を部分的に陽極酸化することにより
、第1図及び第2図のB[こ示す如く、TaNx0Yか
らなる約3000人の誘電体薄膜4を形成する。
Next, by partially anodizing the lower electrode 2, a dielectric thin film 4 of about 3,000 layers made of TaNx0Y is formed, as shown in FIGS.

次lこ、NiCrを500人及びAuを 1000人の厚さにスパッタリング又は蒸着し、これを
所望パターンlこエツチングすることtこより、第1図
及び第2図のCに示す如く、下部電極2の第1の部分2
a上Iこ対応する主容量用上部電極5、下部電極2の第
2の部分2b上に対応する複数の容量調整用上部電極6
、主容量用上部電極5と調整用上部電極6とを接続する
接続部7を設ける。
Next, NiCr is sputtered or vapor-deposited to a thickness of 500 mm and Au to a thickness of 1000 mm, and this is etched into a desired pattern.Thus, as shown in C of FIGS. 1 and 2, the lower electrode 2 is formed. the first part of 2
A corresponding upper electrode 5 for main capacitance, a plurality of upper electrodes 6 for capacitance adjustment corresponding to the second portion 2b of the lower electrode 2
, a connecting portion 7 for connecting the main capacitance upper electrode 5 and the adjustment upper electrode 6 is provided.

尚、この際同時1こ同一金属で下部電極端子部分8及び
上部電極端子部分9を設ける。
At this time, a lower electrode terminal portion 8 and an upper electrode terminal portion 9 are provided from the same metal.

第1図Cから明らかなよう1こ、複数の容量調整用上部
電極6及び接続部7は、主容量用上部電極5からくし歯
状lこ突出した状態に設ける。
As is clear from FIG. 1C, one or more capacitance adjusting upper electrodes 6 and connecting portions 7 are provided in a state in which they protrude from the main capacitance upper electrode 5 in a comb-like shape.

次1こ、主容量用上部電極5、複数の容量調整用上部電
極6、複数の接続部7、誘電体薄膜4の露出面、及び少
なくとも接続部7の近傍のガラス基板1を覆うよう1こ
エポキシ樹脂からなる保護絶縁層10を第1図及び第2
図のl)1こ示す如く設ける。
Next, place one layer to cover the main capacitance upper electrode 5, the plurality of capacitance adjustment upper electrodes 6, the plurality of connection parts 7, the exposed surface of the dielectric thin film 4, and at least the glass substrate 1 in the vicinity of the connection parts 7. The protective insulating layer 10 made of epoxy resin is shown in FIGS.
1) Provide as shown in the figure.

尚、この絶縁層10は、エポキシ樹脂を塗布し、空気中
150℃で加熱することにより、約12μmの厚さ1こ
形成する。
The insulating layer 10 is formed to have a thickness of about 12 μm by applying an epoxy resin and heating it in air at 150° C.

次に、端子部分8,9を介して下部電極2と主容量用上
部電極5との静電容量測定計器(図示せず)を接続し、
容量測定を行う。
Next, a capacitance measuring instrument (not shown) is connected to the lower electrode 2 and the upper electrode 5 for main capacitance via the terminal parts 8 and 9,
Perform capacitance measurement.

これにより、下部電極2の第1の部分2aと主容量上部
電極5との間の容量と、下部電極2の第2の部分2bと
容量調整用上部電極6との間の容量との和が測定される
As a result, the sum of the capacitance between the first portion 2a of the lower electrode 2 and the main capacitance upper electrode 5 and the capacitance between the second portion 2b of the lower electrode 2 and the capacitance adjustment upper electrode 6 is be measured.

次1こ、この実施例では所望容量よりも大きな溶量が得
られるように設計されているので、複数の接続部7の内
の一部を第1図Eの一部切欠平面図及び第2図Eの断面
図に示すようlこレーザビームで町析し、容量値が所望
値1こなるよう1こ調整する。
Next, since this embodiment is designed to obtain a larger amount of melt than the desired capacity, some of the plurality of connecting portions 7 are shown in the partially cutaway plan view of FIG. As shown in the cross-sectional view of Figure E, the structure is analyzed using a laser beam, and the capacitance value is adjusted once to the desired value.

この際、ガラス基板1が透明であることを利用し、第2
図りの矢印11で示す如く、ガラス基板1の背面側から
Nd:YAGレーザビームを接続部Tfこ投射し、レー
ザビームのエネルギで接続部7を切断する。
At this time, by utilizing the fact that the glass substrate 1 is transparent, the second
As shown by an arrow 11 in the diagram, an Nd:YAG laser beam is projected onto the connection portion Tf from the back side of the glass substrate 1, and the connection portion 7 is cut by the energy of the laser beam.

次1こ、配線導体1こ予め半田が付着されている回路基
板(図示せず)の上fこ、フェスダウンボンデイング形
式lこ第1図及び第2図Elこ示す素子を配置し、約2
70℃の半田リフロー法fこよって端子部分8,9を回
路基板に接続する。
Next, on a circuit board (not shown) on which one wiring conductor has been previously soldered, place the elements shown in the face-down bonding format (FIGS. 1 and 2), and place the elements shown in FIGS.
The terminal portions 8, 9 are connected to the circuit board by a solder reflow method at 70°C.

これlこより、ガラス基板1側から接続部7を見ること
が可能な装着状態となるので、回路基板gこ素子を装着
した後lこ、静電容量を測定し、所望容量となるように
レーザビームで接続部7を]析して容量を調整すること
が可能lこなる。
This makes it possible to see the connection part 7 from the glass substrate 1 side, so after mounting the circuit board element, measure the capacitance and set the laser beam to the desired capacitance. It is possible to adjust the capacitance by analyzing the connection part 7 with the beam.

上述から明らかなよう1こ、本実施例には次の利点があ
る。
As is clear from the above, this embodiment has the following advantages.

(a) 保護絶縁層10を形成すると、容量値0.5
〜2.5%増えるが、保護絶縁層10を形成した後1こ
容量調整を行うので、保護絶縁層10の形成に基づく容
量の変化及びバラツキを除去するように容量調整するこ
とが可能である。
(a) When the protective insulating layer 10 is formed, the capacitance value is 0.5
The capacitance increases by ~2.5%, but since the capacitance is adjusted once after forming the protective insulating layer 10, it is possible to adjust the capacitance so as to eliminate changes and variations in capacitance due to the formation of the protective insulating layer 10. .

(b) 保護絶縁層10を設けた後「こ、測定及びレ
ーザビームIこよる容量調整を行うので、これ等の工程
での特性劣化及び損傷を防止することが出来る。
(b) After providing the protective insulating layer 10, measurement and capacitance adjustment using the laser beam I are performed, so that deterioration of characteristics and damage during these steps can be prevented.

(C) フェスダウンボンデイングした後1こも容量
調整が可能になるので、半田によるボンディング時の熱
等fこよる容量変化の補正も可能fこなる。
(C) Since the capacitance can be adjusted even more after face-down bonding, it is also possible to correct capacitance changes caused by heat during solder bonding.

以上、本発明の実施例について述べたが、本発明1まこ
れに限定されるものでナク、更に変形可能なものである
Although the embodiments of the present invention have been described above, the present invention is limited to the first embodiment and can be further modified.

例えば、下部電極2をTa、誘電体薄膜4をTa205
等としてもよい。
For example, the lower electrode 2 is made of Ta, and the dielectric thin film 4 is made of Ta205.
etc.

また、絶縁層10をSiO2、シリコン樹脂等で形成し
てもよい。
Further, the insulating layer 10 may be formed of SiO2, silicone resin, or the like.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例1こ係わる薄膜コンデンサを工
程順に示す平面図、第2図A、B、C,D、E1ま第1
図のa、b、c、d、e断面図である。 尚図面に用いられている符号1こ於いて、1はガラス基
板、2は下部電極、2aは第1の部分、2bは第2の部
分、4は誘電体薄膜、5は主容量用上部電極、6は容量
調整用上部電極、7は接続部、10は保護絶縁層である
Fig. 1 is a plan view showing the thin film capacitor according to the first embodiment of the present invention in the order of steps;
They are cross-sectional views a, b, c, d, and e in the figure. In the reference numeral 1 used in the drawings, 1 is a glass substrate, 2 is a lower electrode, 2a is a first part, 2b is a second part, 4 is a dielectric thin film, and 5 is an upper electrode for main capacitance. , 6 is an upper electrode for capacitance adjustment, 7 is a connecting portion, and 10 is a protective insulating layer.

Claims (1)

【特許請求の範囲】 1 光透過性絶縁基板上lこ少なくとも第1の部分と該
第1の部分1こ連続する第2の部分とから成る下部電極
を形成する工程と、 酸化処理lこよって前記第1の部分及び前記第2の部分
の一部上に誘電体薄膜を形成する工程と、前記第1の部
分上の前記誘電体薄膜上lこ主容量用上部電極を設ける
と共に前記第2の部分上の前記誘電体薄膜上に複数の容
量調整用上部電極を設け、更に前記主容量用上部電極と
前記複数の容量調整用上部電極とを電気的に夫々接続す
るよう1こ複数の接続部を前記絶縁基板上1と設ける工
程と、前記主容量用上部電極、前記腐敗の容量調整用上
部電極、前記複数の接続部、前記誘電体薄膜の露出面、
及び少なくとも前記接続部近傍の前記絶縁基板を覆うよ
うに保護絶縁層を設ける工程と、前記保護絶縁層を設け
た後に、前記下部電極と前記主容量用上部電極とに静電
容量測定計器を接続して静電容量を測定する工程と、 前記絶縁基板の前記下部電極が設けられている面と反対
の背面側から前記複数の接続部の内の1つ又は複数1こ
レーザビームを投射し、該接続部を切断することlこよ
って前記静電容量の値を所望値に調整する工程と を具備していることを特徴とする薄膜コンデンサの製造
方法。
[Claims] 1. A step of forming a lower electrode on a light-transmissive insulating substrate, comprising at least a first portion and a second portion continuous with the first portion; and oxidation treatment. forming a dielectric thin film on a portion of the first portion and the second portion; providing an upper electrode for main capacitance on the dielectric thin film on the first portion; A plurality of capacitance adjustment upper electrodes are provided on the dielectric thin film on the portion, and one or more connections are provided to electrically connect the main capacitance adjustment upper electrode and the plurality of capacitance adjustment upper electrodes, respectively. a step of providing a part on the insulating substrate 1, the upper electrode for main capacitance, the upper electrode for adjusting capacitance of corrosion, the plurality of connection parts, the exposed surface of the dielectric thin film,
and a step of providing a protective insulating layer so as to cover at least the insulating substrate in the vicinity of the connection portion, and after providing the protective insulating layer, connecting a capacitance measuring instrument to the lower electrode and the upper electrode for main capacitance. projecting a laser beam onto one or more of the plurality of connection portions from the back side of the insulating substrate opposite to the surface on which the lower electrode is provided; A method for manufacturing a thin film capacitor, comprising the steps of: cutting the connecting portion; and adjusting the capacitance value to a desired value.
JP13397782A 1982-07-31 1982-07-31 Method of manufacturing thin film capacitors Expired JPS5938725B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13397782A JPS5938725B2 (en) 1982-07-31 1982-07-31 Method of manufacturing thin film capacitors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13397782A JPS5938725B2 (en) 1982-07-31 1982-07-31 Method of manufacturing thin film capacitors

Publications (2)

Publication Number Publication Date
JPS5925206A JPS5925206A (en) 1984-02-09
JPS5938725B2 true JPS5938725B2 (en) 1984-09-19

Family

ID=15117495

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13397782A Expired JPS5938725B2 (en) 1982-07-31 1982-07-31 Method of manufacturing thin film capacitors

Country Status (1)

Country Link
JP (1) JPS5938725B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7378936B2 (en) * 2005-05-23 2008-05-27 Tektronix, Inc. Circuit element with laser trimmed component

Also Published As

Publication number Publication date
JPS5925206A (en) 1984-02-09

Similar Documents

Publication Publication Date Title
EP0637828B1 (en) Multilayer electronic component, method of manufacturing the same and method of measuring characteristics of the same
US4780702A (en) Chip resistor and method for the manufacture thereof
GB2149922A (en) Capacitive moisture sensor and process for producing same
GB2206741A (en) Electrical resistors of laminar form and methods of making them
JPS62199043A (en) Thin film circuit and manufacture of the same
JPS5938725B2 (en) Method of manufacturing thin film capacitors
KR100386644B1 (en) One-chip electronic composite component and method of manufacturing the same
JPH08213221A (en) Method for manufacturing rectangular thin film chip resistor
JPH0510828A (en) Manufacture of platinum temperature sensor
JP2001284166A (en) Laser trimmable condenser
JPH10321403A (en) Manufacturing method of resistor
JP2001110601A (en) Resistor and manufacturing method thereof
JPH05283280A (en) Chip-shaped laminated ceramic capacitor
JP2739453B2 (en) Capacitor with fuse function and method of manufacturing the same
JPH07226301A (en) Resistor
JPH11176606A (en) Chip component
JP4059967B2 (en) Chip-type composite functional parts
JP2003037001A (en) Chip resistor and manufacturing method therefor
JP2718178B2 (en) Manufacturing method of square plate type thin film chip resistor
JPS6051250B2 (en) Manufacturing method of thin film capacitive element
JPH05347202A (en) Electronic component and adjusting method for resistance value of electronic component
JPS5946416B2 (en) How to form electrode leads
JP3289564B2 (en) Thick film capacitors
JPH10189308A (en) Thick film thermistor resistance adjustment method and thick film thermistor
JPH0140517B2 (en)